===== 05 DPC DMA DPCR | BIOS 19951204 System ROM Version 3.0 11/18/96 A

dma/dpcr
Tests DMA transfer behaviour with various DPCR values.

pass - writeToSPURAM
Testing DMA read with master enable = true, priority = 5
  DPCR was 0x333B3B33, setting to 0x333D3B33
  ... transfer complete
pass - testSPUDMARead
Testing DMA read with master enable = false, priority = 5
  DPCR was 0x333B3B33, setting to 0x33353B33
  ... transfer timed out
Testing DMA read with master enable = false, priority = 0
  DPCR was 0x333B3B33, setting to 0x33303B33
  ... transfer timed out
Done.