===== 06 TIM CPU MULT DIV TIME | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 80017302

cpu/mult div timing (timer 2, system clock)
nop   00000000 00000000: 550 cycles for 100
nop, 20 nops 00000000 00000000: 2572 cycles for 100
mult  00000000 00000003: 1147 cycles for 100
multu 00000000 00000003: 1147 cycles for 100
mult rt 00000003 00000000: 1147 cycles for 100
mult  00000001 00000003: 1147 cycles for 100
multu 00000001 00000003: 1142 cycles for 100
mult rt 00000003 00000001: 1147 cycles for 100
mult  000007FF 00000003: 1147 cycles for 100
multu 000007FF 00000003: 1142 cycles for 100
mult rt 00000003 000007FF: 1147 cycles for 100
mult  00000800 00000003: 1447 cycles for 100
multu 00000800 00000003: 1442 cycles for 100
mult rt 00000003 00000800: 1147 cycles for 100
mult  000FFFFF 00000003: 1447 cycles for 100
multu 000FFFFF 00000003: 1442 cycles for 100
mult rt 00000003 000FFFFF: 1147 cycles for 100
mult  00100000 00000003: 1853 cycles for 100
multu 00100000 00000003: 1842 cycles for 100
mult rt 00000003 00100000: 1147 cycles for 100
mult  7FFFFFFF 00000003: 1847 cycles for 100
multu 7FFFFFFF 00000003: 1842 cycles for 100
mult rt 00000003 7FFFFFFF: 1147 cycles for 100
mult  FFFFFFFF 00000003: 1147 cycles for 100
multu FFFFFFFF 00000003: 1842 cycles for 100
mult rt 00000003 FFFFFFFF: 1147 cycles for 100
mult  80000000 00000003: 1847 cycles for 100
multu 80000000 00000003: 1842 cycles for 100
mult rt 00000003 80000000: 1147 cycles for 100
div   12345678 00000003: 4147 cycles for 100
divu  12345678 00000003: 4147 cycles for 100
div by 0 12345678 00000000: 4149 cycles for 100
mult, 20 nops 7FFFFFFF 00000003: 2572 cycles for 100
div, 20 nops 12345678 00000003: 4156 cycles for 100
mult 00100000 00000003 then n nops then mflo:
mult, 0 nops, mflo: 1847 cycles for 100
mult, 1 nops, mflo: 1848 cycles for 100
mult, 2 nops, mflo: 1844 cycles for 100
mult, 3 nops, mflo: 1847 cycles for 100
mult, 4 nops, mflo: 1847 cycles for 100
mult, 5 nops, mflo: 1848 cycles for 100
mult, 6 nops, mflo: 1857 cycles for 100
mult, 7 nops, mflo: 1852 cycles for 100
mult, 8 nops, mflo: 1852 cycles for 100
mult, 9 nops, mflo: 1861 cycles for 100
mult, 10 nops, mflo: 1868 cycles for 100
mult, 11 nops, mflo: 1866 cycles for 100
mult, 12 nops, mflo: 1772 cycles for 100
mult, 13 nops, mflo: 1864 cycles for 100
mult, 14 nops, mflo: 1970 cycles for 100
div, 5 nops, mflo: 4146 cycles for 100
div, 10 nops, mflo: 4152 cycles for 100
div, 30 nops, mflo: 4181 cycles for 100
div, 33 nops, mflo: 4191 cycles for 100
div, 34 nops, mflo: 4199 cycles for 100
div, 35 nops, mflo: 4088 cycles for 100
div, 36 nops, mflo: 4192 cycles for 100
div, 37 nops, mflo: 4304 cycles for 100
what waits for a busy multiply (rs 00100000):
mult then mfhi: 1850 cycles for 100
mult, no read: 455 cycles for 100
div, no read: 448 cycles for 100
mult then mtlo: 548 cycles for 100
mult then mthi: 548 cycles for 100
mult then mult then mflo: 1947 cycles for 100
mult then mtlo then mflo: 655 cycles for 100
loads, 100 turns of the load and a nop:
RAM KSEG0 8002B4E0 lw: 971 cycles for 100
RAM KSEG1 A002B4E0 lw: 965 cycles for 100
scratchpad 1F800100 lw: 557 cycles for 100
BIOS BFC00100 lw: 2953 cycles for 100
BIOS BFC00100 lh: 1753 cycles for 100
BIOS BFC00100 lb: 1159 cycles for 100
EXP1 1F000084 lb: 1153 cycles for 100
EXP2 1F802000 lb: 1553 cycles for 100
EXP3 1FA00000 lh: 1053 cycles for 100
EXP3 1FA00000 lb: 1053 cycles for 100
I_STAT 1F801070 lw: 757 cycles for 100
DPCR 1F8010F0 lw: 757 cycles for 100
timer 0 1F801100 lw: 757 cycles for 100
JOY_STAT 1F801044 lh: 757 cycles for 100
CDROM status 1F801800 lb: 1258 cycles for 100
GPUSTAT 1F801814 lw: 757 cycles for 100
MDEC status 1F801824 lw: 757 cycles for 100
SPUSTAT 1F801DAE lh: 2253 cycles for 100
SPU word 1F801DAC lw: 4253 cycles for 100
cache control FFFE0130 lw: 558 cycles for 100
RAM lw, used at once: 969 cycles for 100
RAM lw, used after 1 nop: 1275 cycles for 100
RAM lw, used after 2 nops: 1374 cycles for 100
RAM lw, used after 3 nops: 1368 cycles for 100
RAM lw then lw: 1473 cycles for 100
BIOS lw, used at once: 2953 cycles for 100
BIOS lw, used after 3 nops: 3356 cycles for 100
stores, 100 turns of n stores:
RAM, 1 sw: 456 cycles for 100
RAM, 2 sw: 571 cycles for 100
RAM, 3 sw: 678 cycles for 100
RAM, 4 sw: 899 cycles for 100
RAM, 5 sw: 1111 cycles for 100
RAM, 6 sw: 1328 cycles for 100
RAM, 7 sw: 1535 cycles for 100
RAM, 8 sw: 1747 cycles for 100
RAM, 4 sw then lw: 2117 cycles for 100
RAM, sw then lw: 1483 cycles for 100
scratchpad, 1 sw: 448 cycles for 100
scratchpad, 8 sw: 1155 cycles for 100
I_MASK, 1 sw: 452 cycles for 100
I_MASK, 4 sw: 852 cycles for 100
I_MASK, sw then lw: 848 cycles for 100
a store, n instructions, then a load of its word:
RAM sw, 1 nop, lw: 1477 cycles for 100
RAM sw, 2 nops, lw: 1483 cycles for 100
RAM sw, 3 nops, lw: 1492 cycles for 100
RAM sw, 4 nops, lw: 1479 cycles for 100
RAM sw, 6 nops, lw: 1576 cycles for 100
RAM sw, lw of another word: 1472 cycles for 100
RAM 4 sw, lw of another word: 2108 cycles for 100
chain-looping's loop: 1659 cycles for 100
RAM lw, used after 4 nops: 1367 cycles for 100
IO and BIOS loads used after the delay slot:
I_STAT lw, used at once: 757 cycles for 100
I_STAT lw, used after 1 nop: 1056 cycles for 100
I_STAT lw, used after 2 nops: 1155 cycles for 100
I_STAT lw then lw: 1152 cycles for 100
BIOS lw, used after 1 nop: 3256 cycles for 100
BIOS lw, used after 2 nops: 3355 cycles for 100
BIOS lw then lw: 5451 cycles for 100
stores to other devices, each writing back what is there:
GP0 NOP, 1 sw: 449 cycles for 100
GP0 NOP, 4 sw: 837 cycles for 100
CDROM index, 1 sb: 631 cycles for 100
CDROM index, 4 sb: 2433 cycles for 100
SPU main volume, 1 sh: 822 cycles for 100
SPU main volume, 4 sh: 3211 cycles for 100
scratchpad, 4 sw: 752 cycles for 100
RAM, 1 sh: 436 cycles for 100
RAM, 4 sh: 885 cycles for 100
RAM, 4 sb: 869 cycles for 100
mthi and mtlo after a busy multiply (rs 00100000):
mult, mthi, mfhi: 655 cycles for 100
mult, mthi, mflo: 648 cycles for 100
mult, mtlo, mfhi: 648 cycles for 100
code from uncached RAM (KSEG1):
nop loop: 3112 cycles for 100
nop, 20 nops loop: 15298 cycles for 100
RAM lw loop: 3526 cycles for 100
Done.