===== 06 TIM CPU MULT DIV TIME | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 80017402

cpu/mult div timing (timer 2, system clock)
nop   00000000 00000000: 541 cycles for 100
nop, 20 nops 00000000 00000000: 2570 cycles for 100
mult  00000000 00000003: 1141 cycles for 100
multu 00000000 00000003: 1141 cycles for 100
mult rt 00000003 00000000: 1141 cycles for 100
mult  00000001 00000003: 1141 cycles for 100
multu 00000001 00000003: 1137 cycles for 100
mult rt 00000003 00000001: 1141 cycles for 100
mult  000007FF 00000003: 1141 cycles for 100
multu 000007FF 00000003: 1135 cycles for 100
mult rt 00000003 000007FF: 1141 cycles for 100
mult  00000800 00000003: 1441 cycles for 100
multu 00000800 00000003: 1435 cycles for 100
mult rt 00000003 00000800: 1141 cycles for 100
mult  000FFFFF 00000003: 1441 cycles for 100
multu 000FFFFF 00000003: 1435 cycles for 100
mult rt 00000003 000FFFFF: 1141 cycles for 100
mult  00100000 00000003: 1846 cycles for 100
multu 00100000 00000003: 1835 cycles for 100
mult rt 00000003 00100000: 1141 cycles for 100
mult  7FFFFFFF 00000003: 1844 cycles for 100
multu 7FFFFFFF 00000003: 1835 cycles for 100
mult rt 00000003 7FFFFFFF: 1141 cycles for 100
mult  FFFFFFFF 00000003: 1141 cycles for 100
multu FFFFFFFF 00000003: 1835 cycles for 100
mult rt 00000003 FFFFFFFF: 1141 cycles for 100
mult  80000000 00000003: 1841 cycles for 100
multu 80000000 00000003: 1835 cycles for 100
mult rt 00000003 80000000: 1141 cycles for 100
div   12345678 00000003: 4146 cycles for 100
divu  12345678 00000003: 4141 cycles for 100
div by 0 12345678 00000000: 4128 cycles for 100
mult, 20 nops 7FFFFFFF 00000003: 2571 cycles for 100
div, 20 nops 12345678 00000003: 4155 cycles for 100
mult 00100000 00000003 then n nops then mflo:
mult, 0 nops, mflo: 1841 cycles for 100
mult, 1 nops, mflo: 1842 cycles for 100
mult, 2 nops, mflo: 1839 cycles for 100
mult, 3 nops, mflo: 1851 cycles for 100
mult, 4 nops, mflo: 1847 cycles for 100
mult, 5 nops, mflo: 1848 cycles for 100
mult, 6 nops, mflo: 1857 cycles for 100
mult, 7 nops, mflo: 1843 cycles for 100
mult, 8 nops, mflo: 1846 cycles for 100
mult, 9 nops, mflo: 1855 cycles for 100
mult, 10 nops, mflo: 1857 cycles for 100
mult, 11 nops, mflo: 1860 cycles for 100
mult, 12 nops, mflo: 1762 cycles for 100
mult, 13 nops, mflo: 1864 cycles for 100
mult, 14 nops, mflo: 1974 cycles for 100
div, 5 nops, mflo: 4143 cycles for 100
div, 10 nops, mflo: 4143 cycles for 100
div, 30 nops, mflo: 4180 cycles for 100
div, 33 nops, mflo: 4180 cycles for 100
div, 34 nops, mflo: 4199 cycles for 100
div, 35 nops, mflo: 4088 cycles for 100
div, 36 nops, mflo: 4186 cycles for 100
div, 37 nops, mflo: 4294 cycles for 100
what waits for a busy multiply (rs 00100000):
mult then mfhi: 1839 cycles for 100
mult, no read: 444 cycles for 100
div, no read: 447 cycles for 100
mult then mtlo: 553 cycles for 100
mult then mthi: 543 cycles for 100
mult then mult then mflo: 1944 cycles for 100
mult then mtlo then mflo: 649 cycles for 100
loads, 100 turns of the load and a nop:
RAM KSEG0 8002BA00 lw: 968 cycles for 100
RAM KSEG1 A002BA00 lw: 967 cycles for 100
scratchpad 1F800100 lw: 554 cycles for 100
BIOS BFC00100 lw: 2947 cycles for 100
BIOS BFC00100 lh: 1747 cycles for 100
BIOS BFC00100 lb: 1147 cycles for 100
EXP1 1F000084 lb: 1147 cycles for 100
EXP2 1F802000 lb: 1547 cycles for 100
EXP3 1FA00000 lh: 1047 cycles for 100
EXP3 1FA00000 lb: 1047 cycles for 100
I_STAT 1F801070 lw: 751 cycles for 100
DPCR 1F8010F0 lw: 754 cycles for 100
timer 0 1F801100 lw: 751 cycles for 100
JOY_STAT 1F801044 lh: 754 cycles for 100
CDROM status 1F801800 lb: 1247 cycles for 100
GPUSTAT 1F801814 lw: 751 cycles for 100
MDEC status 1F801824 lw: 754 cycles for 100
SPUSTAT 1F801DAE lh: 2247 cycles for 100
SPU word 1F801DAC lw: 4247 cycles for 100
cache control FFFE0130 lw: 551 cycles for 100
RAM lw, used at once: 960 cycles for 100
RAM lw, used after 1 nop: 1267 cycles for 100
RAM lw, used after 2 nops: 1361 cycles for 100
RAM lw, used after 3 nops: 1366 cycles for 100
RAM lw then lw: 1467 cycles for 100
BIOS lw, used at once: 2952 cycles for 100
BIOS lw, used after 3 nops: 3353 cycles for 100
stores, 100 turns of n stores:
RAM, 1 sw: 447 cycles for 100
RAM, 2 sw: 576 cycles for 100
RAM, 3 sw: 675 cycles for 100
RAM, 4 sw: 889 cycles for 100
RAM, 5 sw: 1109 cycles for 100
RAM, 6 sw: 1322 cycles for 100
RAM, 7 sw: 1529 cycles for 100
RAM, 8 sw: 1732 cycles for 100
RAM, 4 sw then lw: 2110 cycles for 100
RAM, sw then lw: 1465 cycles for 100
scratchpad, 1 sw: 442 cycles for 100
scratchpad, 8 sw: 1147 cycles for 100
I_MASK, 1 sw: 446 cycles for 100
I_MASK, 4 sw: 844 cycles for 100
I_MASK, sw then lw: 842 cycles for 100
a store, n instructions, then a load of its word:
RAM sw, 1 nop, lw: 1474 cycles for 100
RAM sw, 2 nops, lw: 1475 cycles for 100
RAM sw, 3 nops, lw: 1481 cycles for 100
RAM sw, 4 nops, lw: 1484 cycles for 100
RAM sw, 6 nops, lw: 1575 cycles for 100
RAM sw, lw of another word: 1458 cycles for 100
RAM 4 sw, lw of another word: 2101 cycles for 100
chain-looping's loop: 1654 cycles for 100
RAM lw, used after 4 nops: 1369 cycles for 100
IO and BIOS loads used after the delay slot:
I_STAT lw, used at once: 752 cycles for 100
I_STAT lw, used after 1 nop: 1050 cycles for 100
I_STAT lw, used after 2 nops: 1148 cycles for 100
I_STAT lw then lw: 1146 cycles for 100
BIOS lw, used after 1 nop: 3250 cycles for 100
BIOS lw, used after 2 nops: 3352 cycles for 100
BIOS lw then lw: 5445 cycles for 100
stores to other devices, each writing back what is there:
GP0 NOP, 1 sw: 443 cycles for 100
GP0 NOP, 4 sw: 826 cycles for 100
CDROM index, 1 sb: 631 cycles for 100
CDROM index, 4 sb: 2427 cycles for 100
SPU main volume, 1 sh: 819 cycles for 100
SPU main volume, 4 sh: 3210 cycles for 100
scratchpad, 4 sw: 746 cycles for 100
RAM, 1 sh: 439 cycles for 100
RAM, 4 sh: 871 cycles for 100
RAM, 4 sb: 897 cycles for 100
mthi and mtlo after a busy multiply (rs 00100000):
mult, mthi, mfhi: 654 cycles for 100
mult, mthi, mflo: 643 cycles for 100
mult, mtlo, mfhi: 643 cycles for 100
code from uncached RAM (KSEG1):
nop loop: 3106 cycles for 100
nop, 20 nops loop: 15298 cycles for 100
RAM lw loop: 3517 cycles for 100
Done.