===== 11 CAP SPU CAPTURE TIMING | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
SPUSTAT bit 11 (spx:716, :723-725) over 1.2 million cycles; then capture IRQs
(spx:848-856), timed from a rise of bit 11, with bit 11 at each hit (h/l).
Transfer control 0004, SPUSTAT bit 11 changes: 61276:0000 257840:0800 454492:0000 651076:0800 847664:0000 1044316:0800
Transfer control 0000, SPUSTAT bit 11 changes: none
Transfer control 0008, SPUSTAT bit 11 changes: 153966:0800 350618:0000 547202:0800 743790:0000 940442:0800 1137026:0000
Transfer control 000C, SPUSTAT bit 11 changes: none
Transfer control 0002, SPUSTAT bit 11 changes: none
IRQ 0000, transfer control 0004, from bit 11 rising, hits: 69786l 463002l 856218l 1249434l
IRQ 0040, transfer control 0004, from bit 11 rising, hits: 393144h 786326h 1179576h 1572758h
IRQ 0080, transfer control 0004, from bit 11 rising, hits: 196511l 589761l 982943l 1376193l
IRQ 00C0, transfer control 0004, from bit 11 rising, hits: 393124h 786306h 1179556h 1572738h
IRQ 0100, transfer control 0004, from bit 11 rising, hits: 196536l 589718l 982968l 1376150l
IRQ 0180, transfer control 0004, from bit 11 rising, hits: 196463l 589713l 982895l 1376145l
IRQ 01FF, transfer control 0004, from bit 11 rising, hits: 193483h 586675h 979881h 1373097h
IRQ 0001, transfer control 0004, from bit 11 rising, hits: 199569l 592785l 986001l 1379217l
IRQ 0100, transfer control 0000, from bit 11 rising (no rise seen), hits: none
IRQ 0100, transfer control 0008, from bit 11 rising, hits: none
IRQ 0200, transfer control 0004, from bit 11 rising, hits: none
Done.