===== 02 RC2 TIMER COUNTER WRITE | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
Timer2 stopped (sync mode 0): write 1234 reads 1234, after 1000 cycles 1234
Timer2 stopped: 32 bit write ABCD4321 reads 4321, write FFFF reads FFFF
Timer2 stopped: counter written = target 8000, mode after 500 cycles 0C01
Timer2 stopped: counter written FFFF, mode after 500 cycles 0C01
Timer2 stopped: counter 4321 then mode write, counter 0000, mode 0401
Timer2 sysclock, two counter reads in a row, the difference: 4 4 4 4 4 4 4 4
Timer2 sysclock, counter written 1000, read at once: 1000 1000 1000 1000 1000 1000 1000 1000
Timer2 sysclock, mode written 0, counter read at once: 0 0 0 0 0 0 0 0
Timer2 sysclock, no reset at target, counter written FFFC FFFD FFFE FFFF 0000, read at once: FFFC FFFD FFFE FFFF 0000
Timer2 sysclock, reset at target 1000, counter written 0FFC 0FFD 0FFE 0FFF 1000, read at once: 0FFC 0FFD 0FFE 0FFF 1000
Timer2 reset at target 1000, counter written 1100, after 400 cycles 12AD, mode 1C08
Timer2 reset at target, target lowered to 100 under the counter, after 400 cycles 0979, mode 0408
Timer2 sysclock/8, counter written 1000, after 800 cycles 1103
Timer0 and Timer1 sysclock, counter written 1000, read at once: 1000 1000
Timer0 and Timer1 sysclock, mode written 0, counter read at once: 0 7
Done.