===== 04 RC4 TIMER FLAGS | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
Timer2 target 300, no reset, after 2000 cycles: mode 0C00 then 0400, counter 2054
Timer2 target 0, no reset, after 200 cycles: mode 0C00 then 0400, counter 235
Timer2 target 0, reset at target, after 200 cycles: mode 0C08 then 0C08, counter 0
Timer2 counter written FFF0, after 200 cycles: mode 1400, counter 210
Timer2 running, counter written onto target 8000: mode after 40 cycles 0C00
Timer2 running, counter written 8001 past target 8000: mode after 40 cycles 0400
Timers 1 and 2 past target: Timer1 mode 0C00, then Timer2 mode 0C00 then 0400
Timer2 sysclock target 5000 no reset, counter when bit 11 is first seen: 5025 5017 5017 5017 5017 5017 5017 5017
Timer2 sysclock target 5000 reset, counter when bit 11 is first seen: 20 15 15 15 15 15 15 15
Timer2 sysclock/8 target 100 no reset, counter when bit 11 is first seen: 102 102 102 102 102 103 101 102
Timer2 sysclock from F000, counter when bit 12 is first seen: 22 20 20 20 20 20 20 20
Done.