===== 01 DUN DMA F8 FC | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
1F8010F8h and 1F8010FCh, "might be remaining length and address?" (channels.txt:132-141): read at the start 7FE7581A 00FFFFFF, while an SPU write runs, after transfers, then written.
While SPU write 16 words x 16 runs:
  poll    t: CHCR F8 FC MADR
      0   549: 01000201 7FEB0A63 00FFFFFF 0011A190
      3  1652: 01000201 7FEB0A63 00FFFFFF 0011A1D0
      6  2725: 01000201 7FEB0A63 00FFFFFF 0011A210
     10  4079: 01000201 7FEB0A63 00FFFFFF 0011A250
     13  5157: 01000201 7FEB0A63 00FFFFFF 0011A290
     16  6227: 01000201 7FEB0A63 00FFFFFF 0011A2D0
     19  7290: 01000201 7FEB0A63 00FFFFFF 0011A310
     23  8641: 01000201 7FEB0A63 00FFFFFF 0011A350
     26  9708: 01000201 7FEB0A63 00FFFFFF 0011A390
     30 11070: 01000201 7FEB0A63 00FFFFFF 0011A3D0
     33 12140: 01000201 7FEB0A63 00FFFFFF 0011A410
     36 13201: 01000201 7FEB0A63 00FFFFFF 0011A450
     39 14273: 01000201 7FEB0A63 00FFFFFF 0011A490
     43 15624: 01000201 7FEB0A63 00FFFFFF 0011A4D0
     46 16696: 01000201 7FEB0A63 00FFFFFF 0011A510
     49 17763: 01000201 79EB0A63 00FFFFFF 0011A550
     50 18128: 00000201 7FEB0A63 00FFFFFF 0011A550
  done after 50 polls
After transfers:
  after an OTC: F8 7FE31AA3 FC 00FFFFFF
  after an SPU read: F8 7FE70AA3 FC 00FFFFFF
  after an OTC from MADR+2: F8 7FE31AA3 FC 00FFFFFF
Written:
  F8 was 7FE31AA3: 0 reads 7FE31AA3, FFFFFFFF reads 7FE31AA3; FC was 00FFFFFF: 0 reads 00FFFFFF, FFFFFFFF reads 00FFFFFF; now 7FE31AA3 00FFFFFF
Done.