===== 09 WRT WRITE TIMING | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480

Stores by write delay; SPU word 00000000, CD index 0:
SPU sh, as set: 827
CDROM sb, as set: 633
POST sb, as set: 1590
SPU sh, write delay 0: 721
SPU sh, write delay 1: 819
SPU sh, write delay 2: 917
SPU sh, write delay 3: 1015
SPU sh, write delay 4: 1102
SPU sh, write delay 5: 1199
SPU sh, write delay 6: 1296
SPU sh, write delay 7: 1393
SPU sh, write delay 8: 1490
SPU sh, write delay 9: 1587
SPU sh, write delay 10: 1684
SPU sh, write delay 11: 1781
SPU sh, write delay 12: 1878
SPU sh, write delay 13: 1975
SPU sh, write delay 14: 2072
SPU sh, write delay 15: 2169
SPU sw, write delay 0: 1299
SPU sw, write delay 1: 1493
SPU sw, write delay 2: 1687
SPU sw, write delay 3: 1881
SPU sw, write delay 4: 2075
SPU sw, write delay 5: 2269
SPU sw, write delay 6: 2463
SPU sw, write delay 7: 2660
SPU sw, write delay 8: 2851
SPU sw, write delay 9: 3045
SPU sw, write delay 10: 3242
SPU sw, write delay 11: 3433
SPU sw, write delay 12: 3630
SPU sw, write delay 13: 3821
SPU sw, write delay 14: 4015
SPU sw, write delay 15: 4209
CDROM sb, write delay 0: 453
CDROM sb, write delay 1: 453
CDROM sb, write delay 2: 541
CDROM sb, write delay 3: 639
CDROM sb, write delay 4: 730
CDROM sb, write delay 5: 827
CDROM sb, write delay 6: 924
CDROM sb, write delay 7: 1022
CDROM sb, write delay 8: 1120
CDROM sb, write delay 9: 1206
CDROM sb, write delay 10: 1303
CDROM sb, write delay 11: 1400
CDROM sb, write delay 12: 1497
CDROM sb, write delay 13: 1594
CDROM sb, write delay 14: 1691
CDROM sb, write delay 15: 1791
POST sb, write delay 0: 920
POST sb, write delay 1: 1018
POST sb, write delay 2: 1116
POST sb, write delay 3: 1202
POST sb, write delay 4: 1299
POST sb, write delay 5: 1396
POST sb, write delay 6: 1493
POST sb, write delay 7: 1590
POST sb, write delay 8: 1687
POST sb, write delay 9: 1784
POST sb, write delay 10: 1881
POST sb, write delay 11: 1978
POST sb, write delay 12: 2075
POST sb, write delay 13: 2172
POST sb, write delay 14: 2269
POST sb, write delay 15: 2366
POST sb, COM1 0: 1396
POST sb, COM1 1: 1493
POST sb, COM1 2: 1590
POST sb, COM1 3: 1687
POST sb, COM1 4: 1784
POST sb, COM1 5: 1881
POST sb, COM1 6: 1978
POST sb, COM1 7: 2075
POST sb, COM1 8: 2172
POST sb, COM1 9: 2269
POST sb, COM1 10: 2372
POST sb, COM1 11: 2463
POST sb, COM1 12: 2560
POST sb, COM1 13: 2663
POST sb, COM1 14: 2754
POST sb, COM1 15: 2851
SPU sh, bit 9 (hold) set: 1015
CDROM sb, bit 9 (hold) set: 818
POST sb, bit 9 (hold) cleared: 1396
SPU word after: 00000000; CD index after: 0
SPU word put back: 00000000; CD index: 0
Done.