===== 01 RDB MEMCTL READ BACK | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 1F801DAA

Memory control read back, every register at each width:
EXP1 base 1F801000: lw 1F000000, KSEG0 1F000000, KSEG1 1F000000, lhu 0000 1F00, lbu 00 00 00 1F
EXP2 base 1F801004: lw 1F802000, KSEG0 1F802000, KSEG1 1F802000, lhu 2000 1F80, lbu 00 20 80 1F
EXP1 delay 1F801008: lw 0013243F, KSEG0 0013243F, KSEG1 0013243F, lhu 243F 0013, lbu 3F 24 13 00
EXP3 delay 1F80100C: lw 00003022, KSEG0 00003022, KSEG1 00003022, lhu 3022 0000, lbu 22 30 00 00
BIOS delay 1F801010: lw 0013243F, KSEG0 0013243F, KSEG1 0013243F, lhu 243F 0013, lbu 3F 24 13 00
SPU delay 1F801014: lw 220931E1, KSEG0 220931E1, KSEG1 220931E1, lhu 31E1 2209, lbu E1 31 09 22
CDROM delay 1F801018: lw 00020943, KSEG0 00020943, KSEG1 00020943, lhu 0943 0002, lbu 43 09 02 00
EXP2 delay 1F80101C: lw 00070777, KSEG0 00070777, KSEG1 00070777, lhu 0777 0007, lbu 77 07 07 00
COM_DELAY 1F801020: lw 00001325, KSEG0 00001325, KSEG1 00001325, lhu 1325 0000, lbu 25 13 00 00
RAM_SIZE 1F801060: lw 00000B88, KSEG0 3C080B88, KSEG1 3C080B88, lhu 0B88 0000, lbu 88 0B 00 00
cache control FFFE0130: lw 0001E988, lhu E988 0001, lbu 88 00 00 00
RAM_SIZE three times: 0C000B88 0C000B88 3C040B88
RAM_SIZE after a BIOS lw: 24840B88
CDROM 1F801800: lw 19191919, lhu 1919, lbu 19
SPU 1F801C00: lw 00000000, lhu 0000 0000
Done.