===== 11 CAP SPU CAPTURE TIMING | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
SPUSTAT bit 11 (spx:716, :723-725) over 1.2 million cycles; then capture IRQs
(spx:848-856), timed from a rise of bit 11, with bit 11 at each hit (h/l).
Transfer control 0004, SPUSTAT bit 11 changes: 164876:0000 361484:0800 558126:0000 754724:0800 951308:0000 1147950:0800
Transfer control 0000, SPUSTAT bit 11 changes: none
Transfer control 0008, SPUSTAT bit 11 changes: 175089:0800 371731:0000 568329:0800 764913:0000 961555:0800 1158153:0000
Transfer control 000C, SPUSTAT bit 11 changes: none
Transfer control 0002, SPUSTAT bit 11 changes: none
IRQ 0000, transfer control 0004, from bit 11 rising, hits: 172727l 565919l 959125l 1352341l
IRQ 0040, transfer control 0004, from bit 11 rising, hits: 393136h 786328h 1179568h 1572760h
IRQ 0080, transfer control 0004, from bit 11 rising, hits: 196509l 589701l 982941l 1376133l
IRQ 00C0, transfer control 0004, from bit 11 rising, hits: 393136h 786328h 1179568h 1572760h
IRQ 0100, transfer control 0004, from bit 11 rising, hits: 196524l 589716l 982908l 1376148l
IRQ 0180, transfer control 0004, from bit 11 rising, hits: 196515l 589755l 982947l 1376187l
IRQ 01FF, transfer control 0004, from bit 11 rising, hits: 193491h 586707h 979923h 1373139h
IRQ 0001, transfer control 0004, from bit 11 rising, hits: 199576l 592792l 986008l 1379224l
IRQ 0100, transfer control 0000, from bit 11 rising (no rise seen), hits: none
IRQ 0100, transfer control 0008, from bit 11 rising, hits: none
IRQ 0200, transfer control 0004, from bit 11 rising, hits: none
Done.