===== 04 T0S T3 TIMER0 SOURCES | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 800154CE
GPUSTAT 5606200F
Timer 0, sources 1, 2, 3 (1 and 3 dotclock, 2 system clock), target 0040h, 140000 cycles. Each row: the mode written (bits 3-7 as in timers.txt:26-30), the
first read of the mode after the write, I_STAT bit 4 edges and their times, mode bit
10 changes (time:value), how many mode reads saw bits 11 and 12, and the counter and
mode at the end. Times are system clocks from the mode write.
T0 mode 0100 target 0040: first read 1D00; IRQ 0; bit 10 changes 0; 11 seen 1, 12 seen 0; end D8C3 0500
T0 mode 0108 target 0040: first read 1D08; IRQ 0; bit 10 changes 0; 11 seen 852, 12 seen 0; end 003B 0D08
T0 mode 0118 target 0040: first read 0D18; IRQ 1 at 196; bit 10 changes 0; 11 seen 852, 12 seen 0; end 0002 0D18
T0 mode 0158 target 0040: first read 0D58; IRQ 853 at 209 391 564 671; bit 10 changes 63 at 5765:0 5944:1 6425:0 6570:1; 11 seen 856, 12 seen 0; end 0023 0558
T0 mode 01D8 target 0040: first read 0DD8; IRQ 427 at 72 177 528 870; bit 10 changes 852 at 279:0 401:1 528:0 680:1; 11 seen 852, 12 seen 0; end 0034 09D8
T0 mode 0160 target 0040: first read 0D60; IRQ 1 at 85; bit 10 changes 0; 11 seen 1, 12 seen 0; end D8BC 0560
T0 mode 0138 target 0040: first read 1D38; IRQ 1 at 209; bit 10 changes 0; 11 seen 853, 12 seen 0; end 002D 0D38
T0 mode 01F8 target 0040: first read 0DF8; IRQ 426 at 209 518 858 1221; bit 10 changes 852 at 209:0 391:1 518:0 736:1; 11 seen 852, 12 seen 0; end 0040 09F8
T0 mode 0200 target 0040: first read 0E00; IRQ 0; bit 10 changes 0; 11 seen 3, 12 seen 2; end 2320 0600
T0 mode 0208 target 0040: first read 0608; IRQ 0; bit 10 changes 0; 11 seen 1804, 12 seen 0; end 0009 0E08
T0 mode 0218 target 0040: first read 0E18; IRQ 1 at 143; bit 10 changes 0; 11 seen 1803, 12 seen 0; end 002F 0E18
T0 mode 0258 target 0040: first read 0E58; IRQ 1357 at 90 327 479 589; bit 10 changes 68 at 90:0 327:1 8351:0 8496:1; 11 seen 1357, 12 seen 0; end 0022 0E58
T0 mode 02D8 target 0040: first read 0ED8; IRQ 1060 at 72 254 483 636; bit 10 changes 541 at 254:0 483:1 636:0 991:1; 11 seen 1330, 12 seen 0; end 0000 0AD8
T0 mode 0260 target 0040: first read 0E60; IRQ 3 at 77 65582 131076; bit 10 changes 0; 11 seen 3, 12 seen 2; end 230A 0660
T0 mode 0238 target 0040: first read 1E38; IRQ 1 at 89; bit 10 changes 0; 11 seen 1804, 12 seen 0; end 0028 0E38
T0 mode 02F8 target 0040: first read 0EF8; IRQ 1055 at 143 331 483 667; bit 10 changes 543 at 143:0 331:1 667:0 825:1; 11 seen 1330, 12 seen 0; end 0006 0AF8
T0 mode 0300 target 0040: first read 0F00; IRQ 0; bit 10 changes 0; 11 seen 1, 12 seen 0; end D8C4 0700
T0 mode 0308 target 0040: first read 1F08; IRQ 0; bit 10 changes 0; 11 seen 853, 12 seen 0; end 0041 0F08
T0 mode 0318 target 0040: first read 0F18; IRQ 1 at 209; bit 10 changes 0; 11 seen 852, 12 seen 0; end 0006 0F18
T0 mode 0358 target 0040: first read 0F58; IRQ 852 at 200 398 571 678; bit 10 changes 76 at 851:0 1021:1 1507:0 1652:1; 11 seen 855, 12 seen 0; end 0007 0F58
T0 mode 03D8 target 0040: first read 0FD8; IRQ 427 at 214 563 842 1208; bit 10 changes 852 at 214:0 375:1 563:0 715:1; 11 seen 853, 12 seen 0; end 0014 0BD8
T0 mode 0360 target 0040: first read 0F60; IRQ 1 at 72; bit 10 changes 0; 11 seen 1, 12 seen 0; end D8CF 0760
T0 mode 0338 target 0040: first read 1F38; IRQ 1 at 202; bit 10 changes 0; 11 seen 852, 12 seen 0; end 0004 0F38
T0 mode 03F8 target 0040: first read 0FF8; IRQ 426 at 209 519 862 1160; bit 10 changes 852 at 209:0 391:1 519:0 740:1; 11 seen 853, 12 seen 0; end 0036 0BF8
Dotclock (source 1) at each display width, reset, IRQ at target 0100h, repeat:
Width 256, GPUSTAT 5600200F. T0 mode 0158 target 0100: first read 0D58; IRQ 37 at 1660 3255 4888 6524; bit 10 changes 0; 11 seen 37, 12 seen 0; end 0028 0558
Width 320, GPUSTAT D602200F. T0 mode 0158 target 0100: first read 0D58; IRQ 46 at 1336 2663 3962 5273; bit 10 changes 0; 11 seen 46, 12 seen 0; end 0041 0558
Width 368, GPUSTAT 5601200F. T0 mode 0158 target 0100: first read 0D58; IRQ 52 at 1204 2334 3435 4607; bit 10 changes 2 at 28431:0 28605:1; 11 seen 52, 12 seen 0; end 00D8 0558
Width 512, GPUSTAT D604200F. T0 mode 0158 target 0100: first read 0D58; IRQ 73 at 864 1669 2503 3271; bit 10 changes 0; 11 seen 73, 12 seen 0; end 0005 0D58
Width 640, GPUSTAT 5606200F. T0 mode 0158 target 0100: first read 0D58; IRQ 92 at 674 1341 1981 2627; bit 10 changes 8 at 4588:0 4768:1 35812:0 35957:1; 11 seen 95, 12 seen 0; end 0065 0558
Done.