===== 06 T2S T3 TIMER2 SOURCES | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 800154CE
Timer 2, sources 1, 2, 3 (1 system clock, 2 and 3 system clock / 8), target 0040h, 140000. Each row: the mode written (bits 3-7 as in timers.txt:26-30), the
first read of the mode after the write, I_STAT bit 6 edges and their times, mode bit
10 changes (time:value), how many mode reads saw bits 11 and 12, and the counter and
mode at the end. Times are system clocks from the mode write.
T2 mode 0100 target 0040: first read 1D00; IRQ 0; bit 10 changes 0; 11 seen 3, 12 seen 2; end 22EC 0500
T2 mode 0108 target 0040: first read 0508; IRQ 0; bit 10 changes 0; 11 seen 1804, 12 seen 0; end 0014 0D08
T2 mode 0118 target 0040: first read 0D18; IRQ 1 at 85; bit 10 changes 0; 11 seen 1803, 12 seen 0; end 0001 0D18
T2 mode 0158 target 0040: first read 0D58; IRQ 1365 at 143 268 375 482; bit 10 changes 48 at 693:0 872:1 2837:0 2982:1; 11 seen 1365, 12 seen 0; end 000F 0D58
T2 mode 01D8 target 0040: first read 0DD8; IRQ 1038 at 72 258 493 600; bit 10 changes 569 at 258:0 600:1 932:0 1156:1; 11 seen 1327, 12 seen 0; end 0019 09D8
T2 mode 0160 target 0040: first read 0D60; IRQ 3 at 85 65582 131103; bit 10 changes 0; 11 seen 3, 12 seen 2; end 231D 0560
T2 mode 0138 target 0040: first read 1D38; IRQ 1 at 143; bit 10 changes 0; 11 seen 1803, 12 seen 0; end 003C 0D38
T2 mode 01F8 target 0040: first read 0DF8; IRQ 1035 at 143 334 492 649; bit 10 changes 567 at 143:0 334:1 492:0 756:1; 11 seen 1325, 12 seen 0; end 0038 09F8
T2 mode 0200 target 0040: first read 0E00; IRQ 1 at 85; bit 10 changes 0; 11 seen 1, 12 seen 0; end 4465 0600
T2 mode 0208 target 0040: first read 0608; IRQ 0; bit 10 changes 0; 11 seen 273, 12 seen 0; end 001F 0608
T2 mode 0218 target 0040: first read 0E18; IRQ 1 at 547; bit 10 changes 0; 11 seen 273, 12 seen 0; end 0020 0618
T2 mode 0258 target 0040: first read 0E58; IRQ 273 at 530 1071 1576 2084; bit 10 changes 0; 11 seen 273, 12 seen 0; end 0021 0658
T2 mode 02D8 target 0040: first read 0ED8; IRQ 137 at 543 1592 2593 3623; bit 10 changes 273 at 543:0 1064:1 1592:0 2075:1; 11 seen 273, 12 seen 0; end 0022 02D8
T2 mode 0260 target 0040: first read 0E60; IRQ 0; bit 10 changes 0; 11 seen 1, 12 seen 0; end 4461 0660
T2 mode 0238 target 0040: first read 0638; IRQ 1 at 526; bit 10 changes 0; 11 seen 273, 12 seen 0; end 0026 0638
T2 mode 02F8 target 0040: first read 0EF8; IRQ 137 at 539 1589 2599 3631; bit 10 changes 273 at 539:0 1061:1 1589:0 2076:1; 11 seen 273, 12 seen 0; end 0021 02F8
T2 mode 0300 target 0040: first read 0F00; IRQ 0; bit 10 changes 0; 11 seen 1, 12 seen 0; end 4461 0700
T2 mode 0308 target 0040: first read 0708; IRQ 0; bit 10 changes 0; 11 seen 273, 12 seen 0; end 001F 0708
T2 mode 0318 target 0040: first read 0F18; IRQ 1 at 544; bit 10 changes 0; 11 seen 273, 12 seen 0; end 0023 0718
T2 mode 0358 target 0040: first read 0F58; IRQ 273 at 592 1058 1567 2074; bit 10 changes 0; 11 seen 273, 12 seen 0; end 0026 0758
T2 mode 03D8 target 0040: first read 0FD8; IRQ 138 at 76 582 1548 2623; bit 10 changes 273 at 582:0 1094:1 1644:0 2101:1; 11 seen 273, 12 seen 0; end 0021 03D8
T2 mode 0360 target 0040: first read 0F60; IRQ 0; bit 10 changes 0; 11 seen 1, 12 seen 0; end 445F 0760
T2 mode 0338 target 0040: first read 0738; IRQ 1 at 531; bit 10 changes 0; 11 seen 273, 12 seen 0; end 001E 0738
T2 mode 03F8 target 0040: first read 0FF8; IRQ 137 at 539 1589 2599 3631; bit 10 changes 273 at 539:0 1061:1 1589:0 2076:1; 11 seen 274, 12 seen 0; end 0021 03F8
Done.