===== 10 TSY T3 SYNC AND IRQ | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 800154CE
Each timer at the system clock, target 0100h, reset, IRQ at target, repeat (0058h),
with sync bits 0-2 as shown (timers.txt:14-25; 0002h-0006h have sync enable off),
600000 cycles (a frame and a bit). The fields as in T0M.
T0 mode 0059 target 0100: first read 1C59; IRQ 1742 at 344 1144 1383 1622; bit 10 changes 112 at 10735:0 10913:1 18827:0 18972:1; 11 seen 1713, 12 seen 0; end 0017 0C59
T0 mode 005B target 0100: first read 0C5B; IRQ 2229 at 332 539 850 1223; bit 10 changes 150 at 6267:0 6439:1 21083:0 21232:1; 11 seen 2186, 12 seen 0; end 00D6 0C5B
T0 mode 005D target 0100: first read 0C5D; IRQ 558 at 1258 1530 3423 3662; bit 10 changes 34 at 37821:0 37993:1 74667:0 74822:1; 11 seen 546, 12 seen 0; end 0000 045D
T0 mode 005F target 0100: first read 0C5F; IRQ 2319 at 1792 2060 2303 2544; bit 10 changes 202 at 7695:0 7861:1 12339:0 12484:1; 11 seen 2265, 12 seen 0; end 001D 0C5F
T0 mode 005A target 0100: first read 0C5A; IRQ 2326 at 89 315 560 800; bit 10 changes 194 at 2867:0 3033:1 8285:0 8430:1; 11 seen 2286, 12 seen 0; end 00BB 085A
T0 mode 005C target 0100: first read 0C5C; IRQ 2325 at 328 535 840 1084; bit 10 changes 222 at 4158:0 4324:1 17057:0 17206:1; 11 seen 2206, 12 seen 0; end 00AB 045C
T0 mode 005E target 0100: first read 0C5E; IRQ 2326 at 94 320 567 806; bit 10 changes 244 at 2103:0 2269:1 2618:0 2763:1; 11 seen 2224, 12 seen 0; end 009E 045E
T1 mode 0059 target 0100: first read 0459; IRQ 2133 at 328 596 836 1077; bit 10 changes 212 at 6222:0 6388:1 11640:0 11785:1; 11 seen 2037, 12 seen 0; end 00C3 0C59
T1 mode 005B target 0100: first read 0C5B; IRQ 2325 at 85 311 556 800; bit 10 changes 208 at 6996:0 7165:1 10092:0 10237:1; 11 seen 2260, 12 seen 0; end 0009 0C5B
T1 mode 005D target 0100: first read 0C5D; IRQ 198 at 328 596 835 1076; bit 10 changes 16 at 520107:0 520273:1 525784:0 525929:1; 11 seen 193, 12 seen 0; end 0000 045D
T1 mode 005F target 0100: first read 045F; IRQ 566 at 454109 454380 454619 454858; bit 10 changes 58 at 463127:0 463293:1 466224:0 466372:1; 11 seen 539, 12 seen 0; end 00D7 0C5F
T1 mode 005A target 0100: first read 0C5A; IRQ 2325 at 329 541 851 1093; bit 10 changes 238 at 7512:0 7678:1 9317:0 9462:1; 11 seen 2230, 12 seen 0; end 00E0 0C5A
T1 mode 005C target 0100: first read 0C5C; IRQ 2325 at 328 597 838 1077; bit 10 changes 234 at 1835:0 2005:1 6995:0 7144:1; 11 seen 2229, 12 seen 0; end 00E1 0C5C
T1 mode 005E target 0100: first read 0C5E; IRQ 2325 at 328 597 838 1077; bit 10 changes 234 at 1835:0 2005:1 6995:0 7144:1; 11 seen 2229, 12 seen 0; end 00E1 0C5E
T2 mode 0059 target 0100: first read 1C59; IRQ 0; bit 10 changes 0; 11 seen 0, 12 seen 0; end 0000 0459
T2 mode 005B target 0100: first read 045B; IRQ 2325 at 328 596 835 1075; bit 10 changes 258 at 4152:0 4324:1 9576:0 9721:1; 11 seen 2229, 12 seen 0; end 00A6 045B
T2 mode 005D target 0100: first read 0C5D; IRQ 2326 at 85 316 560 799; bit 10 changes 216 at 3642:0 3809:1 6222:0 6369:1; 11 seen 2215, 12 seen 0; end 00C5 0C5D
T2 mode 005F target 0100: first read 0C5F; IRQ 0; bit 10 changes 0; 11 seen 0, 12 seen 0; end 0000 045F
T2 mode 005A target 0100: first read 045A; IRQ 2325 at 332 534 843 1082; bit 10 changes 194 at 4931:0 5097:1 8285:0 8430:1; 11 seen 2287, 12 seen 0; end 00BB 085A
T2 mode 005C target 0100: first read 0C5C; IRQ 2325 at 328 532 840 1081; bit 10 changes 210 at 2094:0 2262:1 18348:0 18493:1; 11 seen 2211, 12 seen 0; end 00C5 0C5C
T2 mode 005E target 0100: first read 0C5E; IRQ 2325 at 329 536 841 1086; bit 10 changes 220 at 17315:0 17485:1 20412:0 20557:1; 11 seen 2201, 12 seen 0; end 00E2 0C5E
Timer 1 in hblank (source 1) with sync modes 0-3, target 0010h:
T1 mode 0159 target 0010: first read 0D59; IRQ 15 at 34447 68911 103332 137767; bit 10 changes 2 at 241098:0 241264:1; 11 seen 16, 12 seen 0; end 000E 0559
T1 mode 015B target 0010: first read 0D5B; IRQ 16 at 34442 68911 103332 137776; bit 10 changes 0; 11 seen 17, 12 seen 0; end 000E 055B
T1 mode 015D target 0010: first read 0D5D; IRQ 1 at 140264; bit 10 changes 0; 11 seen 1, 12 seen 0; end 0000 055D
T1 mode 015F target 0010: first read 055F; IRQ 15 at 101893 136363 170784 205227; bit 10 changes 2 at 377408:0 377579:1; 11 seen 15, 12 seen 0; end 0007 055F
Timer 0 in dotclock (source 1) with sync modes 0-3, target 0100h:
T0 mode 0159 target 0100: first read 1D59; IRQ 230 at 1253 1856 2567 3739; bit 10 changes 8 at 95899:0 96068:1 98393:0 98538:1; 11 seen 231, 12 seen 0; end 004B 0559
T0 mode 015B target 0100: first read 0D5B; IRQ 278 at 869 1533 2174 3033; bit 10 changes 24 at 12943:0 13088:1 13793:0 13938:1; 11 seen 282, 12 seen 0; end 00BB 055B
T0 mode 015D target 0100: first read 0D5D; IRQ 0; bit 10 changes 0; 11 seen 0, 12 seen 0; end 001F 055D
T0 mode 015F target 0100: first read 055F; IRQ 305 at 1930 2574 3279 3919; bit 10 changes 30 at 1930:0 2133:1 20148:0 20293:1; 11 seen 309, 12 seen 0; end 0090 055F
Done.