===== 05 DPR D2 THREE PRIORITY | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 1F801DAA
OTC of 1024 words, GPU VRAM read of 512 words (16 x 32) and SPU read of 512 words
(16 x 32), all three armed with their DPCR enables off, then one DPCR write with the
priorities shown (channels.txt:89-110: 0 highest; ties go to the higher channel).
Clocks (timer / 8, times 8) from the DPCR write until each channel's bit 24 clears.
Priority OTC 0 GPU 1 SPU 2: done OTC 1376, GPU read 2400, SPU read 36944 (342 polls)
Priority OTC 0 GPU 2 SPU 1: done OTC 1328, GPU read 2448, SPU read 36872 (340 polls)
Priority OTC 1 GPU 0 SPU 2: done OTC 1368, GPU read 2432, SPU read 37000 (343 polls)
Priority OTC 1 GPU 2 SPU 0: done OTC 1480, GPU read 2568, SPU read 35912 (331 polls)
Priority OTC 2 GPU 0 SPU 1: done OTC 1528, GPU read 2288, SPU read 35920 (331 polls)
Priority OTC 2 GPU 1 SPU 0: done OTC 1480, GPU read 2280, SPU read 36096 (332 polls)
Priority OTC 3 GPU 3 SPU 3: done OTC 1280, GPU read 2384, SPU read 37040 (344 polls)
Priority OTC 7 GPU 0 SPU 0: done OTC 256, GPU read 2328, SPU read 36272 (335 polls)
Priority OTC 0 GPU 7 SPU 7: done OTC 1280, GPU read 2368, SPU read 37048 (344 polls)
Priority OTC 7 GPU 7 SPU 0: done OTC 1280, GPU read 2392, SPU read 36088 (332 polls)
Done.