===== 06 GST GPUSTAT 13 31 LINES | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
GPUSTAT bits 31 and 13, one sample a scanline, 1000 cycles after each T1 hblank tick,
from the first tick after an IRQ0; one hex digit is 4 lines, the first line the MSB.
640x240, display Y 0
 IRQ0 seen at samples: 0 262 525
 bit31   0-263 000001555555555555555555555555555555555555555555555555555555555554
 bit31 264-527 000002AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA8
 bit13   0-263 FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
 bit13 264-527 FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
640x240, display Y 1
 IRQ0 seen at samples: 0 262 525
 bit31   0-263 FFFFFEAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAB
 bit31 264-527 FFFFFD555555555555555555555555555555555555555555555555555555555557
 bit13   0-263 FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
 bit13 264-527 FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
640x480 interlaced, display Y 0
 IRQ0 seen at samples: 0 261 524
 bit31   0-263 000000000000000000000000000000000000000000000000000000000000000000
 bit31 264-527 00000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF0
 bit13   0-263 0FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
 bit13 264-527 E00000000000000000000000000000000000000000000000000000000000000000
640x480 interlaced, display Y 1
 IRQ0 seen at samples: 0 261 524
 bit31   0-263 FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
 bit31 264-527 FFFFF000000000000000000000000000000000000000000000000000000000000F
 bit13   0-263 0FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
 bit13 264-527 E00000000000000000000000000000000000000000000000000000000000000000
320x480 interlaced, display Y 0
 IRQ0 seen at samples: 0 261 524
 bit31   0-263 000000000000000000000000000000000000000000000000000000000000000000
 bit31 264-527 00000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF0
 bit13   0-263 0FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
 bit13 264-527 E00000000000000000000000000000000000000000000000000000000000000000
640 wide, interlace on, vertical resolution bit clear
 IRQ0 seen at samples: 0 261 524
 bit31   0-263 000002AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA8
 bit31 264-527 000005555555555555555555555555555555555555555555555555555555555550
 bit13   0-263 0FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
 bit13 264-527 E00000000000000000000000000000000000000000000000000000000000000000
640 wide, vertical resolution bit set, interlace off
 no hblank tick after sample 0
 IRQ0 seen at samples:
 bit31   0-263 000000000000000000000000000000000000000000000000000000000000000000
 bit31 264-527 000000000000000000000000000000000000000000000000000000000000000000
 bit13   0-263 000000000000000000000000000000000000000000000000000000000000000000
 bit13 264-527 000000000000000000000000000000000000000000000000000000000000000000
640x240, display disabled by GP1(03h)
 IRQ0 seen at samples: 0 262 525
 bit31   0-263 000001555555555555555555555555555555555555555555555555555555555554
 bit31 264-527 000002AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA8
 bit13   0-263 000000000000000000000000000000000000000000000000000000000000000000
 bit13 264-527 000000000000000000000000000000000000000000000000000000000000000000
Interlace switched: bit 13 at each IRQ0 then 5000 cycles later.
 480i: 1/1 0/0 1/1 0/0
 240p at once 0: 0 0 0
 480i at once 0: 1 0 1 0
 interlace, 240 lines, at once 0: 1 0 1 0
Done.