===== 11 CAP SPU CAPTURE TIMING | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
SPUSTAT bit 11 (spx:716, :723-725) over 1.2 million cycles; then capture IRQs
(spx:848-856), timed from a rise of bit 11, with bit 11 at each hit (h/l).
Transfer control 0004, SPUSTAT bit 11 changes: 71999:0800 268631:0000 465215:0800 661809:0000 858455:0800 1055039:0000
Transfer control 0000, SPUSTAT bit 11 changes: none
Transfer control 0008, SPUSTAT bit 11 changes: 374:0000 196965:0800 393573:0000 590181:0800 786789:0000 983397:0800 1180005:0000
Transfer control 000C, SPUSTAT bit 11 changes: none
Transfer control 0002, SPUSTAT bit 11 changes: none
IRQ 0000, transfer control 0004, from bit 11 rising, hits: none
IRQ 0040, transfer control 0004, from bit 11 rising, hits: none
IRQ 0080, transfer control 0004, from bit 11 rising, hits: none
IRQ 00C0, transfer control 0004, from bit 11 rising, hits: none
IRQ 0100, transfer control 0004, from bit 11 rising, hits: none
IRQ 0180, transfer control 0004, from bit 11 rising, hits: none
IRQ 01FF, transfer control 0004, from bit 11 rising, hits: none
IRQ 0001, transfer control 0004, from bit 11 rising, hits: none
IRQ 0100, transfer control 0000, from bit 11 rising (no rise seen), hits: none
IRQ 0100, transfer control 0008, from bit 11 rising, hits: none
IRQ 0200, transfer control 0004, from bit 11 rising, hits: none
Done.