===== 04 T0S T3 TIMER0 SOURCES | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 1F801DAA
GPUSTAT 5606200F
Timer 0, sources 1, 2, 3 (1 and 3 dotclock, 2 system clock), target 0040h, 140000 cycles. Each row: the mode written (bits 3-7 as in timers.txt:26-30), the
first read of the mode after the write, I_STAT bit 4 edges and their times, mode bit
10 changes (time:value), how many mode reads saw bits 11 and 12, and the counter and
mode at the end. Times are system clocks from the mode write.
T0 mode 0100 target 0040: first read 1D00; IRQ 0; bit 10 changes 0; 11 seen 1, 12 seen 0; end D8C7 0500
T0 mode 0108 target 0040: first read 1D08; IRQ 0; bit 10 changes 0; 11 seen 852, 12 seen 0; end 0040 0D08
T0 mode 0118 target 0040: first read 0D18; IRQ 1 at 196; bit 10 changes 0; 11 seen 853, 12 seen 0; end 0033 0D18
T0 mode 0158 target 0040: first read 0D58; IRQ 852 at 209 391 564 671; bit 10 changes 70 at 5767:0 5946:1 10199:0 10348:1; 11 seen 852, 12 seen 0; end 003D 0D58
T0 mode 01D8 target 0040: first read 0DD8; IRQ 426 at 210 566 840 1207; bit 10 changes 852 at 210:0 378:1 566:0 718:1; 11 seen 852, 12 seen 0; end 003D 09D8
T0 mode 0160 target 0040: first read 0D60; IRQ 0; bit 10 changes 0; 11 seen 1, 12 seen 0; end D8BE 0560
T0 mode 0138 target 0040: first read 1D38; IRQ 1 at 214; bit 10 changes 0; 11 seen 853, 12 seen 0; end 0000 0D38
T0 mode 01F8 target 0040: first read 0DF8; IRQ 426 at 209 518 872 1166; bit 10 changes 852 at 209:0 396:1 518:0 740:1; 11 seen 852, 12 seen 0; end 003F 09F8
T0 mode 0200 target 0040: first read 0E00; IRQ 0; bit 10 changes 0; 11 seen 3, 12 seen 2; end 22F3 0600
T0 mode 0208 target 0040: first read 0608; IRQ 0; bit 10 changes 0; 11 seen 1804, 12 seen 0; end 0001 0E08
T0 mode 0218 target 0040: first read 0E18; IRQ 1 at 145; bit 10 changes 0; 11 seen 1803, 12 seen 0; end 002E 0E18
T0 mode 0258 target 0040: first read 0E58; IRQ 1357 at 90 327 479 589; bit 10 changes 68 at 90:0 327:1 8351:0 8496:1; 11 seen 1357, 12 seen 0; end 0022 0E58
T0 mode 02D8 target 0040: first read 0ED8; IRQ 1060 at 72 254 483 636; bit 10 changes 541 at 254:0 483:1 636:0 991:1; 11 seen 1330, 12 seen 0; end 0000 0AD8
T0 mode 0260 target 0040: first read 0E60; IRQ 3 at 77 65582 131076; bit 10 changes 0; 11 seen 3, 12 seen 2; end 230A 0660
T0 mode 0238 target 0040: first read 1E38; IRQ 1 at 89; bit 10 changes 0; 11 seen 1804, 12 seen 0; end 0028 0E38
T0 mode 02F8 target 0040: first read 0EF8; IRQ 1055 at 143 331 483 667; bit 10 changes 543 at 143:0 331:1 667:0 825:1; 11 seen 1330, 12 seen 0; end 0006 0AF8
T0 mode 0300 target 0040: first read 0F00; IRQ 0; bit 10 changes 0; 11 seen 1, 12 seen 0; end D8C4 0700
T0 mode 0308 target 0040: first read 1F08; IRQ 0; bit 10 changes 0; 11 seen 853, 12 seen 0; end 0040 0F08
T0 mode 0318 target 0040: first read 0F18; IRQ 1 at 209; bit 10 changes 0; 11 seen 854, 12 seen 0; end 003F 0F18
T0 mode 0358 target 0040: first read 0F58; IRQ 852 at 200 403 510 688; bit 10 changes 72 at 688:0 867:1 6270:0 6415:1; 11 seen 852, 12 seen 0; end 0037 0F58
T0 mode 03D8 target 0040: first read 0FD8; IRQ 426 at 209 565 845 1205; bit 10 changes 852 at 209:0 374:1 565:0 717:1; 11 seen 852, 12 seen 0; end 0037 0BD8
T0 mode 0360 target 0040: first read 0F60; IRQ 0; bit 10 changes 0; 11 seen 1, 12 seen 0; end D8C2 0760
T0 mode 0338 target 0040: first read 1F38; IRQ 1 at 196; bit 10 changes 0; 11 seen 853, 12 seen 0; end 0032 0F38
T0 mode 03F8 target 0040: first read 0FF8; IRQ 426 at 209 519 862 1160; bit 10 changes 852 at 209:0 391:1 519:0 740:1; 11 seen 854, 12 seen 0; end 0005 0BF8
Dotclock (source 1) at each display width, reset, IRQ at target 0100h, repeat:
Width 256, GPUSTAT 5600200F. T0 mode 0158 target 0100: first read 0D58; IRQ 38 at 98 1647 3283 4909; bit 10 changes 4 at 21049:0 21223:1 46905:0 47050:1; 11 seen 39, 12 seen 0; end 0025 0558
Width 320, GPUSTAT 5602200F. T0 mode 0158 target 0100: first read 0D58; IRQ 46 at 1330 2660 3956 5251; bit 10 changes 2 at 37690:0 37866:1; 11 seen 46, 12 seen 0; end 003D 0558
Width 368, GPUSTAT 5601200F. T0 mode 0158 target 0100: first read 0D58; IRQ 52 at 1198 2328 3435 4608; bit 10 changes 4 at 5713:0 5887:1 28432:0 28579:1; 11 seen 53, 12 seen 0; end 00D5 0558
Width 512, GPUSTAT 5604200F. T0 mode 0158 target 0100: first read 0D58; IRQ 73 at 875 1674 2508 3277; bit 10 changes 4 at 17077:0 17257:1 49523:0 49668:1; 11 seen 77, 12 seen 0; end 00FF 0D58
Width 640, GPUSTAT D606200F. T0 mode 0158 target 0100: first read 0D58; IRQ 92 at 736 1334 1973 2675; bit 10 changes 0; 11 seen 93, 12 seen 0; end 0048 0558
Done.