===== 05 T1S T3 TIMER1 SOURCES | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 1F801DAA
Timer 1, sources 1, 2, 3 (1 and 3 hblank, 2 system clock), target 0004h, 140000 cycles. Each row: the mode written (bits 3-7 as in timers.txt:26-30), the
first read of the mode after the write, I_STAT bit 5 edges and their times, mode bit
10 changes (time:value), how many mode reads saw bits 11 and 12, and the counter and
mode at the end. Times are system clocks from the mode write.
T1 mode 0100 target 0004: first read 0500; IRQ 0; bit 10 changes 0; 11 seen 29, 12 seen 0; end 0041 0500
T1 mode 0108 target 0004: first read 0508; IRQ 0; bit 10 changes 0; 11 seen 17, 12 seen 0; end 0001 0508
T1 mode 0118 target 0004: first read 0D18; IRQ 1 at 8438; bit 10 changes 0; 11 seen 16, 12 seen 0; end 0001 0518
T1 mode 0158 target 0004: first read 0D58; IRQ 16 at 7443 16054 24669 33265; bit 10 changes 0; 11 seen 16, 12 seen 0; end 0001 0558
T1 mode 01D8 target 0004: first read 0DD8; IRQ 8 at 6909 24149 41345 58562; bit 10 changes 16 at 6909:0 15534:1 24149:0 32736:1; 11 seen 16, 12 seen 0; end 0001 05D8
T1 mode 0160 target 0004: first read 0D60; IRQ 0; bit 10 changes 0; 11 seen 28, 12 seen 0; end 0041 0560
T1 mode 0138 target 0004: first read 0538; IRQ 1 at 6839; bit 10 changes 0; 11 seen 16, 12 seen 0; end 0001 0538
T1 mode 01F8 target 0004: first read 0DF8; IRQ 8 at 8178 25425 42623 59840; bit 10 changes 16 at 8178:0 16817:1 25425:0 34011:1; 11 seen 16, 12 seen 0; end 0001 05F8
T1 mode 0200 target 0004: first read 0E00; IRQ 0; bit 10 changes 0; 11 seen 3, 12 seen 2; end 22F3 0600
T1 mode 0208 target 0004: first read 0608; IRQ 0; bit 10 changes 0; 11 seen 1805, 12 seen 0; end 0000 0E08
T1 mode 0218 target 0004: first read 0E18; IRQ 1 at 72; bit 10 changes 0; 11 seen 1804, 12 seen 0; end 0002 0E18
T1 mode 0258 target 0004: first read 0E58; IRQ 1234 at 85 332 488 595; bit 10 changes 688 at 85:0 332:1 708:0 853:1; 11 seen 1234, 12 seen 0; end 0000 0E58
T1 mode 02D8 target 0004: first read 0ED8; IRQ 1245 at 72 192 299 408; bit 10 changes 665 at 715:0 960:1 1105:0 1454:1; 11 seen 1245, 12 seen 0; end 0004 0ED8
T1 mode 0260 target 0004: first read 0E60; IRQ 3 at 72 65588 131091; bit 10 changes 0; 11 seen 3, 12 seen 2; end 2327 0660
T1 mode 0238 target 0004: first read 1E38; IRQ 1 at 85; bit 10 changes 0; 11 seen 1803, 12 seen 0; end 0001 0E38
T1 mode 02F8 target 0004: first read 0EF8; IRQ 1245 at 72 192 299 406; bit 10 changes 668 at 406:0 587:1 837:0 1082:1; 11 seen 1245, 12 seen 0; end 0001 0AF8
T1 mode 0300 target 0004: first read 0F00; IRQ 1 at 85; bit 10 changes 0; 11 seen 29, 12 seen 0; end 0041 0700
T1 mode 0308 target 0004: first read 0708; IRQ 0; bit 10 changes 0; 11 seen 16, 12 seen 0; end 0001 0708
T1 mode 0318 target 0004: first read 0F18; IRQ 1 at 7778; bit 10 changes 0; 11 seen 16, 12 seen 0; end 0001 0718
T1 mode 0358 target 0004: first read 0F58; IRQ 16 at 7754 16391 25001 33597; bit 10 changes 0; 11 seen 17, 12 seen 0; end 0001 0758
T1 mode 03D8 target 0004: first read 0FD8; IRQ 8 at 7107 24289 41565 58783; bit 10 changes 16 at 7107:0 15732:1 24385:0 32935:1; 11 seen 16, 12 seen 0; end 0001 07D8
T1 mode 0360 target 0004: first read 0F60; IRQ 0; bit 10 changes 0; 11 seen 29, 12 seen 0; end 0041 0760
T1 mode 0338 target 0004: first read 0738; IRQ 1 at 7096; bit 10 changes 0; 11 seen 16, 12 seen 0; end 0001 0738
T1 mode 03F8 target 0004: first read 0FF8; IRQ 8 at 8372 25617 42820 60096; bit 10 changes 16 at 8481:0 16995:1 25617:0 34271:1; 11 seen 16, 12 seen 0; end 0001 07F8
Done.