===== 14 HPL GPU DRAWSYNC POLL | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 1F801DAA
What a DrawSync-style poll sees: during a DMA2 list, how many times GPUSTAT.26 rose
before the channel ended and after, when bits 26 and 28 were set for good (64 reads
in a row), and the last change (gpu.txt:1023-1026).
8 gouraud triangles 64: [26 rose 0 then 1, first at 17995, channel done 13601, idle for good 17995, last change 17995] [26 rose 0 then 1, first at 18009, channel done 13549, idle for good 18009, last change 18009] [26 rose 0 then 1, first at 18006, channel done 13549, idle for good 18006, last change 18006] [26 rose 0 then 1, first at 17995, channel done 13607, idle for good 17995, last change 17995]
32 sprites 16x16: [26 rose 0 then 1, first at 5813, channel done 5470, idle for good 5813, last change 5813] [26 rose 0 then 1, first at 5635, channel done 5358, idle for good 5635, last change 5635] [26 rose 0 then 1, first at 5641, channel done 5358, idle for good 5641, last change 5641] [26 rose 0 then 1, first at 5667, channel done 5320, idle for good 5667, last change 5667]
fill 256x248 then a flat tri 16: [26 rose 0 then 1, first at 5492, channel done 174, idle for good 5492, last change 5492] [26 rose 0 then 1, first at 5493, channel done 175, idle for good 5493, last change 5493] [26 rose 0 then 1, first at 5491, channel done 174, idle for good 5491, last change 5491] [26 rose 0 then 1, first at 5491, channel done 174, idle for good 5491, last change 5491]
tri, copy 128x128, tri: [26 rose 0 then 1, first at 21168, channel done 251, idle for good 21168, last change 21168] [26 rose 0 then 1, first at 21175, channel done 256, idle for good 21175, last change 21175] [26 rose 0 then 1, first at 21164, channel done 251, idle for good 21164, last change 21164] [26 rose 0 then 1, first at 21164, channel done 251, idle for good 21164, last change 21164]
Done.