===== 09 WRT WRITE TIMING | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480

Stores by write delay; SPU word 00000000, CD index 1:
SPU sh, as set: 828
CDROM sb, as set: 651
POST sb, as set: 1600
SPU sh, write delay 0: 730
SPU sh, write delay 1: 828
SPU sh, write delay 2: 926
SPU sh, write delay 3: 1024
SPU sh, write delay 4: 1123
SPU sh, write delay 5: 1201
SPU sh, write delay 6: 1305
SPU sh, write delay 7: 1402
SPU sh, write delay 8: 1499
SPU sh, write delay 9: 1596
SPU sh, write delay 10: 1698
SPU sh, write delay 11: 1790
SPU sh, write delay 12: 1887
SPU sh, write delay 13: 1984
SPU sh, write delay 14: 2086
SPU sh, write delay 15: 2178
SPU sw, write delay 0: 1323
SPU sw, write delay 1: 1512
SPU sw, write delay 2: 1708
SPU sw, write delay 3: 1904
SPU sw, write delay 4: 2100
SPU sw, write delay 5: 2296
SPU sw, write delay 6: 2492
SPU sw, write delay 7: 2688
SPU sw, write delay 8: 2884
SPU sw, write delay 9: 3080
SPU sw, write delay 10: 3276
SPU sw, write delay 11: 3472
SPU sw, write delay 12: 3668
SPU sw, write delay 13: 3864
SPU sw, write delay 14: 4060
SPU sw, write delay 15: 4256
CDROM sb, write delay 0: 455
CDROM sb, write delay 1: 461
CDROM sb, write delay 2: 549
CDROM sb, write delay 3: 646
CDROM sb, write delay 4: 743
CDROM sb, write delay 5: 840
CDROM sb, write delay 6: 937
CDROM sb, write delay 7: 1035
CDROM sb, write delay 8: 1133
CDROM sb, write delay 9: 1212
CDROM sb, write delay 10: 1316
CDROM sb, write delay 11: 1413
CDROM sb, write delay 12: 1511
CDROM sb, write delay 13: 1609
CDROM sb, write delay 14: 1707
CDROM sb, write delay 15: 1805
POST sb, write delay 0: 933
POST sb, write delay 1: 1031
POST sb, write delay 2: 1134
POST sb, write delay 3: 1208
POST sb, write delay 4: 1312
POST sb, write delay 5: 1409
POST sb, write delay 6: 1507
POST sb, write delay 7: 1605
POST sb, write delay 8: 1703
POST sb, write delay 9: 1801
POST sb, write delay 10: 1899
POST sb, write delay 11: 1997
POST sb, write delay 12: 2095
POST sb, write delay 13: 2193
POST sb, write delay 14: 2296
POST sb, write delay 15: 2389
POST sb, COM1 0: 1409
POST sb, COM1 1: 1507
POST sb, COM1 2: 1605
POST sb, COM1 3: 1703
POST sb, COM1 4: 1801
POST sb, COM1 5: 1899
POST sb, COM1 6: 1997
POST sb, COM1 7: 2095
POST sb, COM1 8: 2193
POST sb, COM1 9: 2293
POST sb, COM1 10: 2389
POST sb, COM1 11: 2487
POST sb, COM1 12: 2585
POST sb, COM1 13: 2683
POST sb, COM1 14: 2781
POST sb, COM1 15: 2879
SPU sh, bit 9 (hold) set: 1024
CDROM sb, bit 9 (hold) set: 837
POST sb, bit 9 (hold) cleared: 1404
SPU word after: 00000000; CD index after: 1
SPU word put back: 00000000; CD index: 1
Done.