===== 10 IRQ SPU IRQ9 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
Voice 0 keyed on, IRQ address as shown, cycles from KON to SPUSTAT bit 6 and to
I_STAT bit 9 (0 = not within the limit). S4 at 4060h, four blocks of 10h bytes.
S4 pitch 1000 IRQ 4060: SPUSTAT.6 at 1256, I_STAT.9 at 1057
S4 pitch 1000 IRQ 4061: SPUSTAT.6 at 6450, I_STAT.9 at 6251
S4 pitch 1000 IRQ 4062: SPUSTAT.6 at 318, I_STAT.9 at 116
S4 pitch 1000 IRQ 4064: SPUSTAT.6 at 40242, I_STAT.9 at 40043
S4 pitch 1000 IRQ 4065: SPUSTAT.6 at 49481, I_STAT.9 at 49216
S4 pitch 1000 IRQ 4066: SPUSTAT.6 at 318, I_STAT.9 at 116
S4 pitch 0400 IRQ 4064: SPUSTAT.6 at 150830, I_STAT.9 at 150631
S4 pitch 4000 IRQ 4064: SPUSTAT.6 at 309, I_STAT.9 at 44
S4 noise pitch 1000 IRQ 4064: SPUSTAT.6 at 40251, I_STAT.9 at 40052
S4 pitch 0000 IRQ 4064: SPUSTAT.6 at 0, I_STAT.9 at 0
M (End+Mute at block 1) with the repeat address set before KON to P (4100h):
M, IRQ at P pitch 1000 IRQ 4100: SPUSTAT.6 at 40170, I_STAT.9 at 39971
M, repeat P, IRQ at M block 0, IRQ 40A0, hits: 1660 3212 4707 6242 7778; SPUSTAT.6 read 0 after the first acknowledge (cycles from KON): 2437:0000
S1 released 100000 cycles before, level 0000, IRQ at S1: SPUSTAT.6 at 101
S1 looping, IRQ 4020, hits: 676 2215 3764 5300 6836; SPUSTAT.6 read 0 after the first acknowledge (cycles from KON): 1436:0000
S4 looping, IRQ 4064, hits: 41398 42942 44494 46030 47566; SPUSTAT.6 read 0 after the first acknowledge (cycles from KON): 42213:0000
Manual writes of k halfwords from 61FF (8 bytes before the IRQ address 6200):
 k=1 SPUSTAT.6 0 I_STAT.9 0 k=2 SPUSTAT.6 0 I_STAT.9 0 k=3 SPUSTAT.6 0 I_STAT.9 0 k=4 SPUSTAT.6 1 I_STAT.9 1
 k=5 SPUSTAT.6 1 I_STAT.9 1 k=6 SPUSTAT.6 1 I_STAT.9 1 k=7 SPUSTAT.6 1 I_STAT.9 1 k=8 SPUSTAT.6 1 I_STAT.9 1
DMA write 64 bytes from 32 before the IRQ address: SPUSTAT.6 0
DMA write 64 bytes ending just before it: SPUSTAT.6 0
DMA write 64 bytes from 8 after it: SPUSTAT.6 0
DMA read 64 bytes from 32 before it: SPUSTAT.6 1
DMA read 64 bytes ending just before it: SPUSTAT.6 1
DMA write over it with IRQ9 enable clear, then enabled: SPUSTAT.6 0
IRQ address write 1234h reads 1234
Done.