===== 11 CAP SPU CAPTURE TIMING | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
SPUSTAT bit 11 (spx:716, :723-725) over 1.2 million cycles; then capture IRQs
(spx:848-856), timed from a rise of bit 11, with bit 11 at each hit (h/l).
Transfer control 0004, SPUSTAT bit 11 changes: 146492:0000 343100:0800 539684:0000 736336:0800 932924:0000 1129508:0800
Transfer control 0000, SPUSTAT bit 11 changes: none
Transfer control 0008, SPUSTAT bit 11 changes: 101409:0800 297993:0000 494645:0800 691233:0000 887817:0800 1084469:0000
Transfer control 000C, SPUSTAT bit 11 changes: none
Transfer control 0002, SPUSTAT bit 11 changes: none
IRQ 0000, transfer control 0004, from bit 11 rising, hits: 154983l 548233l 941439l 1334655l
IRQ 0040, transfer control 0004, from bit 11 rising, hits: 393131h 786313h 1179563h 1572745h
IRQ 0080, transfer control 0004, from bit 11 rising, hits: 196524l 589716l 982966l 1376148l
IRQ 00C0, transfer control 0004, from bit 11 rising, hits: 393132h 786324h 1179574h 1572756h
IRQ 0100, transfer control 0004, from bit 11 rising, hits: 196514l 589696l 982946l 1376128l
IRQ 0180, transfer control 0004, from bit 11 rising, hits: 196514l 589696l 982946l 1376128l
IRQ 01FF, transfer control 0004, from bit 11 rising, hits: 193432h 586648h 979864h 1373080h
IRQ 0001, transfer control 0004, from bit 11 rising, hits: 199575l 592791l 986007l 1379223l
IRQ 0100, transfer control 0000, from bit 11 rising (no rise seen), hits: none
IRQ 0100, transfer control 0008, from bit 11 rising, hits: none
IRQ 0200, transfer control 0004, from bit 11 rising, hits: none
Done.