===== 08 TWR T3 WRITES COUNTING | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 1F801DAA
Each timer at the system clock, mode 0058h (reset at target, IRQ at target, repeat),
target 8000h, counted up to about 4000h, then one write. The counter read three times
at once, then cycles from the write to the first mode read with bit 11 and with bit
12, and to I_STAT (0 = not within 150000). timers.txt:7-10, :56-58.
T0 counter written 0000: counter 0019 0027 002C; bit 11 at 32881, bit 12 at 0, I_STAT at 32881
T0 counter written 3FF0: counter 4000 400E 4013; bit 11 at 16435, bit 12 at 0, I_STAT at 16435
T0 counter written 7FF0: counter 8000 000C 0011; bit 11 at 125, bit 12 at 0, I_STAT at 125
T0 counter written 8000: counter 000E 001C 0021; bit 11 at 129, bit 12 at 0, I_STAT at 129
T0 counter written 8001: counter 8011 801F 8024; bit 11 at 65617, bit 12 at 32844, I_STAT at 65617
T0 counter written FFF0: counter 0000 000E 0013; bit 11 at 32865, bit 12 at 130, I_STAT at 32865
T0 counter written FFFF: counter 000F 001D 0022; bit 11 at 32876, bit 12 at 129, I_STAT at 32797
T0 target written 2000: counter 408F 409D 40A2; bit 11 at 57307, bit 12 at 49106, I_STAT at 57307
T0 target written 4000: counter 4077 4085 408A; bit 11 at 65489, bit 12 at 49090, I_STAT at 65489
T0 target written 4040: counter 407C 408A 408F; bit 11 at 65563, bit 12 at 49094, I_STAT at 65563
T0 target written 4400: counter 407C 408A 408F; bit 11 at 986, bit 12 at 0, I_STAT at 986
T0 target written FFFF: counter 407C 408A 408F; bit 11 at 49094, bit 12 at 49094, I_STAT at 49094
T0 mode written 0058: counter 0010 001E 0023; bit 11 at 32853, bit 12 at 0, I_STAT at 32853
T0 mode written 0050: counter 0010 001E 0027; bit 11 at 32838, bit 12 at 65608, I_STAT at 32838
T1 counter written 0000: counter 0010 001E 0023; bit 11 at 32851, bit 12 at 0, I_STAT at 32851
T1 counter written 3FF0: counter 4000 400E 4013; bit 11 at 16432, bit 12 at 0, I_STAT at 16432
T1 counter written 7FF0: counter 8000 000C 0011; bit 11 at 124, bit 12 at 0, I_STAT at 124
T1 counter written 8000: counter 000E 001C 0021; bit 11 at 124, bit 12 at 0, I_STAT at 124
T1 counter written 8001: counter 8011 801F 8024; bit 11 at 65625, bit 12 at 32841, I_STAT at 65625
T1 counter written FFF0: counter 0000 000E 0013; bit 11 at 32878, bit 12 at 124, I_STAT at 32799
T1 counter written FFFF: counter 000F 001D 0022; bit 11 at 32864, bit 12 at 125, I_STAT at 32785
T1 target written 2000: counter 4082 4090 4095; bit 11 at 57300, bit 12 at 49093, I_STAT at 57300
T1 target written 4000: counter 407C 408A 408F; bit 11 at 65485, bit 12 at 49094, I_STAT at 65485
T1 target written 4040: counter 4078 4086 408B; bit 11 at 65571, bit 12 at 49091, I_STAT at 65571
T1 target written 4400: counter 4077 4085 408A; bit 11 at 995, bit 12 at 0, I_STAT at 995
T1 target written FFFF: counter 407C 408A 408F; bit 11 at 49094, bit 12 at 49094, I_STAT at 49094
T1 mode written 0058: counter 0010 001E 0023; bit 11 at 32839, bit 12 at 0, I_STAT at 32839
T1 mode written 0050: counter 0010 001E 0027; bit 11 at 32838, bit 12 at 65608, I_STAT at 32838
T2 counter written 0000: counter 0010 001E 0023; bit 11 at 32847, bit 12 at 0, I_STAT at 32847
T2 counter written 3FF0: counter 4000 400E 4017; bit 11 at 16437, bit 12 at 0, I_STAT at 16437
T2 counter written 7FF0: counter 8000 000C 0011; bit 11 at 124, bit 12 at 0, I_STAT at 124
T2 counter written 8000: counter 000E 001C 0021; bit 11 at 124, bit 12 at 0, I_STAT at 124
T2 counter written 8001: counter 8011 801F 8024; bit 11 at 65626, bit 12 at 32849, I_STAT at 65626
T2 counter written FFF0: counter 0004 0012 0017; bit 11 at 32865, bit 12 at 128, I_STAT at 32865
T2 counter written FFFF: counter 000F 001D 0022; bit 11 at 32796, bit 12 at 124, I_STAT at 32796
T2 target written 2000: counter 4082 4090 4095; bit 11 at 57295, bit 12 at 49081, I_STAT at 57295
T2 target written 4000: counter 4081 408F 4094; bit 11 at 65486, bit 12 at 49095, I_STAT at 65486
T2 target written 4040: counter 4078 4086 408B; bit 11 at 65571, bit 12 at 49091, I_STAT at 65571
T2 target written 4400: counter 4077 4085 408A; bit 11 at 995, bit 12 at 0, I_STAT at 995
T2 target written FFFF: counter 4077 4085 408A; bit 11 at 49096, bit 12 at 49096, I_STAT at 49096
T2 mode written 0058: counter 0010 001E 0023; bit 11 at 32844, bit 12 at 0, I_STAT at 32844
T2 mode written 0050: counter 0010 001E 0023; bit 11 at 32846, bit 12 at 65614, I_STAT at 32846
Counter written 1234h on a running timer 2 (mode 0000h), then six reads back to back: 1234 1241 124D 125C 1271 1284
The same on timer 2 at the system clock / 8 (mode 0200h): 1234 1255 1265 1274 1285 1294 (8 cycles apart)
Done.