===== 07 MRT F29 MDEC STATUS AFTER RESET | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
Row 67. Followup19 PIO's frame, then MDEC1 80000000h and the status n NOPs after it
(status@timer 2 cycles from the mode write before the reset store). Stream CRC A4FD5107 (as packed).
24 bit, 0 NOPs: 19 strips, the wait after strip 20 word 2880 gave up; table waits that gave up 0
  at the end 8404FFFF; after the reset 8404D7FB@6; 2000 on 80040000
24 bit, 5 NOPs: 19 strips, the wait after strip 20 word 2880 gave up; table waits that gave up 0
  at the end 8404FFFF; after the reset 80000000@9; 2000 on 80040000
24 bit, 20 NOPs: 19 strips, the wait after strip 20 word 2880 gave up; table waits that gave up 0
  at the end 8404FFFF; after the reset 80040000@24; 2000 on 80040000
24 bit, 100 NOPs: 19 strips, the wait after strip 20 word 2880 gave up; table waits that gave up 0
  at the end 8404FFFF; after the reset 80040000@104; 2000 on 80040000
24 bit, 5, 20 and 100 NOPs in one run: 19 strips, the wait after strip 20 word 2880 gave up; table waits that gave up 0
  at the end 8404FFFF; after the reset 80000000@9 80040000@36 80040000@128; 2000 on 80040000
15 bit, 5, 20 and 100 NOPs in one run: 19 strips, the wait after strip 20 word 1920 gave up; table waits that gave up 0
  at the end 8604FFFF; after the reset 80000000@9 80040000@36 80040000@128; 2000 on 80040000
Done.