===== 05 S32 F33 SPU 32 BIT STORES | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
256 sw to each register, both halves written 0 first: store i at (3i mod 768) cycles
into its own pair of samples after a sample tick; value (1000h+i)<<16 | (2000h+i), lw
back. Timer 2 read just before each sw. Every voice keyed off and parked.
1C58h (voice 5 ADSR): lost halves (store: sample phase/timer mod 8 read): 6:75/1 10060000 9:75/1 10090000 12:75/1 100C0000 31:139/1 101F0000 34:139/1 10220000 45:195/1 102D0000 48:195/1 10300000 51:195/1 10330000 70:275/1 10460000 75:275/1 104B0000 78:275/1 104E0000 89:331/1 10590000 92:331/1 105C0000 95:331/1 105F0000 98:331/1 10620000 116:411/1 10740000; low 39, high 0 of 256
 by timer mod 8 (stores/low lost/high lost): 0:23/0/0 1:39/39/0 2:23/0/0 3:45/0/0 4:22/0/0 5:36/0/0 6:22/0/0 7:46/0/0
 by sample phase in 32-cycle slots (stores/low lost): 13/4 6/0 11/3 13/0 9/2 12/0 9/3 12/0 11/3 8/0 12/4 12/0 11/4 12/0 9/3 9/0 14/4 8/0 9/3 12/0 10/2 12/0 12/4 10/0
1C08h (voice 0 ADSR): lost halves (store: sample phase/timer mod 8 read): 4:79/1 10040000 7:79/1 10070000 10:79/1 100A0000 13:79/1 100D0000 32:143/1 10200000 35:143/1 10230000 46:199/1 102E0000 49:199/1 10310000 52:199/1 10340000 55:199/1 10370000 71:279/1 10470000 74:279/1 104A0000 76:279/1 104C0000 79:279/1 104F0000 90:335/1 105A0000 93:335/1 105D0000; low 42, high 0 of 256
 by timer mod 8 (stores/low lost/high lost): 0:23/0/0 1:42/42/0 2:24/0/0 3:44/0/0 4:20/0/0 5:37/0/0 6:22/0/0 7:44/0/0
 by sample phase in 32-cycle slots (stores/low lost): 11/4 9/0 11/4 12/0 10/2 12/0 11/4 6/0 12/4 11/0 12/4 12/0 8/2 13/0 10/3 8/0 12/3 11/0 12/4 12/0 11/4 8/0 10/4 12/0
1D78h (voice 23 ADSR): lost halves (store: sample phase/timer mod 8 read): 4:49/1 10040000 23:129/1 10170000 26:129/1 101A0000 29:129/1 101D0000 42:185/1 102A0000 45:185/1 102D0000 48:185/1 10300000 63:249/1 103F0000 66:249/1 10420000 69:249/1 10450000 82:305/1 10520000 85:305/1 10550000 88:305/1 10580000 107:385/1 106B0000 110:385/1 106E0000 113:385/1 10710000; low 43, high 0 of 256
 by timer mod 8 (stores/low lost/high lost): 0:23/0/0 1:43/43/0 2:23/0/0 3:42/0/0 4:24/0/0 5:42/0/0 6:20/0/0 7:39/0/0
 by sample phase in 32-cycle slots (stores/low lost): 12/1 10/3 12/0 7/0 11/3 11/3 11/0 10/3 12/0 10/3 12/0 8/0 14/4 8/4 10/0 11/4 12/0 11/4 12/0 8/0 13/4 8/3 11/0 12/4
1DC0h (reverb dAPF1, reverb off): lost halves (store: sample phase/timer mod 8 read): 3:73/1 10030000 6:73/1 10060000 9:73/1 10090000 12:73/1 100C0000 31:153/1 101F0000 34:153/1 10220000 42:193/1 102A0000 45:193/1 102D0000 48:193/1 10300000 51:193/1 10330000 70:273/1 10460000 73:273/1 10490000 76:273/1 104C0000 78:273/1 104E0000 89:329/1 10590000 92:329/1 105C0000; low 42, high 0 of 256
 by timer mod 8 (stores/low lost/high lost): 0:23/0/0 1:42/42/0 2:22/0/0 3:46/0/0 4:18/0/0 5:43/0/0 6:25/0/0 7:37/0/0
 by sample phase in 32-cycle slots (stores/low lost): 11/4 10/0 8/4 12/0 12/2 7/0 12/4 12/0 11/4 12/0 8/4 10/0 12/2 9/0 12/4 12/0 11/4 12/0 6/3 11/0 11/3 13/0 12/4 10/0
Done.