Display Timing and GPUSTAT: Difference between revisions
| Revision as of 05:40, 23 October 2026 RemmyLee (Hardware tests: 15 more test pages (CPU, DMA, SPU, GPU, MDEC, CD-ROM, bus), each with See also links to the pages that measure the same parts) | Revision as of 05:41, 23 October 2026 RemmyLee (Hardware tests: See also links back from 37 existing pages to the new ones) | ||
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| The groups measure the frame period with interlace off and on, the length of a scanline and of its horizontal blank, the blanking against the GP1(06h) and GP1(07h) ranges, and GPUSTAT bits 13 and 31 line by line. A further group draws in 480-line interlaced mode at four points of a field and reads the frame buffer back to find which rows were written.[^src] The [video timing](/hardware/gpu/video-timing/) and [GPUSTAT](/hardware/gpu/gpustat/) pages describe the registers. | The groups measure the frame period with interlace off and on, the length of a scanline and of its horizontal blank, the blanking against the GP1(06h) and GP1(07h) ranges, and GPUSTAT bits 13 and 31 line by line. A further group draws in 480-line interlaced mode at four points of a field and reads the frame buffer back to find which rows were written.[^src] The [video timing](/hardware/gpu/video-timing/) and [GPUSTAT](/hardware/gpu/gpustat/) pages describe the registers. | ||
| + | See also: | ||
| + | |||
| + | - [GPU Drawing Time and Status Bits](/tests/gpu-drawing-time/) | ||
| + | |||
| ## Results | ## Results | ||