GTE Register Write Delay: Difference between revisions
| Revision as of 04:48, 23 October 2026 RemmyLee (Main page: drop the Hardware Tests lede) | Revision as of 05:11, 23 October 2026 RemmyLee (Hardware tests: 72 more test pages, listed on the main page by area; RUN.toml no longer published) | ||
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| + | --- | ||
| + | title: GTE Register Write Delay | ||
| + | type: test | ||
| + | summary: Measures how many instructions pass before a written GTE register is seen by a command or a read. | ||
| + | category: Hardware tests | ||
| + | info: Machine = SCPH-5501 | ||
| + | info: Program = gte-store-delay (pcsx-redux nugget) | ||
| + | --- | ||
| + | |||
| + | ## Overview | ||
| + | |||
| + | The program writes an old value to a [GTE](/hardware/gte/) register and waits four NOPs. It then writes a new value, runs N NOPs with N from 0 to 4, and uses the register. The value the use returns shows whether it saw the old or the new write.[^src] | ||
| + | |||
| + | Six arms use the register in different ways. SQR squares IR1 after MTC2 or LWC2 wrote it (old 2 gives 4, new 3 gives 9). OP reads a rotation matrix element after CTC2 wrote it (old gives 5, new gives 7). The other arms read the register back with MFC2, CFC2 or SWC2. Interrupts are off and the code runs from the instruction cache.[^src] | ||
| + | |||
| + | ## Results | ||
| + | |||
| + | Every arm saw the new value from two NOPs on. All three repetitions gave the same values.[^run] | ||
| + | |||
| + | Table: Value seen after N NOPs | ||
| + | |||
| + | | Arm | N = 0 | N = 1 | N = 2 to 4 | | ||
| + | | --- | --- | --- | --- | | ||
| + | | MTC2 IR1, SQR | 3 | 4 | 9 | | ||
| + | | LWC2 IR1, SQR | 3 | 4 | 9 | | ||
| + | | CTC2 RT22, OP | 5 | 5 | 7 | | ||
| + | | MTC2 IR1, MFC2 IR1 | 2 | 2 | 3 | | ||
| + | | CTC2 RT22RT23, CFC2 | 5 | 5 | 7 | | ||
| + | | MTC2 IR1, SWC2 IR1 | 2 | 2 | 3 | | ||
| + | |||
| + | With one NOP, SQR squared the old value and the reads returned the old value. With no NOP between the write and SQR, MFC2 read back 3, which is the written value and not a square.[^run] | ||
| + | |||
| + | ## Runs | ||
| + | |||
| + | ### 22 October 2026 | ||
| + | |||
| + | [gtestoredelay/GTESTOREDELAY.txt](/tests/raw/20261022T2232Z-5501a-link-4/gtestoredelay/GTESTOREDELAY.txt) | ||
| + | |||
| + | ``` | ||
| + | GSD-START | ||
| + | GSD rep=0 SQR_M N0..4 = 3 4 9 9 9 | ||
| + | GSD rep=0 SQR_L N0..4 = 3 4 9 9 9 | ||
| + | GSD rep=0 OP_C N0..4 = 5 5 7 7 7 | ||
| + | GSD rep=0 RD_M N0..4 = 2 2 3 3 3 | ||
| + | GSD rep=0 RD_C N0..4 = 5 5 7 7 7 | ||
| + | GSD rep=0 SW_M N0..4 = 2 2 3 3 3 | ||
| + | GSD rep=1 SQR_M N0..4 = 3 4 9 9 9 | ||
| + | GSD rep=1 SQR_L N0..4 = 3 4 9 9 9 | ||
| + | GSD rep=1 OP_C N0..4 = 5 5 7 7 7 | ||
| + | GSD rep=1 RD_M N0..4 = 2 2 3 3 3 | ||
| + | GSD rep=1 RD_C N0..4 = 5 5 7 7 7 | ||
| + | GSD rep=1 SW_M N0..4 = 2 2 3 3 3 | ||
| + | GSD rep=2 SQR_M N0..4 = 3 4 9 9 9 | ||
| + | GSD rep=2 SQR_L N0..4 = 3 4 9 9 9 | ||
| + | GSD rep=2 OP_C N0..4 = 5 5 7 7 7 | ||
| + | GSD rep=2 RD_M N0..4 = 2 2 3 3 3 | ||
| + | GSD rep=2 RD_C N0..4 = 5 5 7 7 7 | ||
| + | GSD rep=2 SW_M N0..4 = 2 2 3 3 3 | ||
| + | GSD-DONE | ||
| + | ResetGraph:jtb=801e78b8,env=801e7900 | ||
| + | ``` | ||
| + | |||
| + | [gtestoredelay/bench.txt](/tests/raw/20261022T2232Z-5501a-link-4/gtestoredelay/bench.txt) | ||
| + | |||
| + | ``` | ||
| + | 656 bytes of TTY text in psx.log | ||
| + | ``` | ||
| + | |||
| + | [gtestoredelay/when.txt](/tests/raw/20261022T2232Z-5501a-link-4/gtestoredelay/when.txt) | ||
| + | |||
| + | ``` | ||
| + | 20261022T2232Z | ||
| + | ``` | ||
| + | |||
| + | ## References | ||
| + | |||
| + | [^src]: pcsx-redux nugget, tests/gte-store-delay/gte-store-delay.c, header comment. MIT License. https://github.com/pcsx-redux/nugget | ||
| + | [^run]: Hardware test run 20261022T2232Z-5501a-link-4 on the SCPH-5501: [GTESTOREDELAY.txt](/tests/raw/20261022T2232Z-5501a-link-4/gtestoredelay/GTESTOREDELAY.txt). | ||