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SPU Registers and Envelope: Difference between revisions

Revision as of 04:48, 23 October 2026
RemmyLee
(Main page: drop the Hardware Tests lede)		Revision as of 05:11, 23 October 2026
RemmyLee
(Hardware tests: 72 more test pages, listed on the main page by area; RUN.toml no longer published)
Line 1:Line 1:
+---
+title: SPU Registers and Envelope
+type: test
+summary: Reads the SPU's registers while it runs to measure key on and off, the ADSR envelope, volume sweeps, ENDX, IRQ9, capture and transfers.
+category: Hardware tests
+info: Machine = SCPH-5501
+info: Program = spuenv
+---
+
+## Overview
+
+Sound cannot be recorded by the console, so every measurement reads a register: the ADSR level, the current volumes, ENDX, SPUSTAT, the repeat address, I_STAT, and the capture buffers through DMA4. Times are system clock cycles counted by root counter 2 from the write that starts the step. One SPU sample is 768 cycles.[^h]
+
+Nothing is audible during the test. The main volume stays 0000h, SPUCNT bit 14 stays 0, and every sample except the capture tone is silent. The program has 15 groups, and each group restores the registers it touched and keys off every voice before it returns.[^h] The [SPU](/hardware/spu/) page describes the unit, and the [SPU registers](/hardware/spu/registers/), [ADSR](/hardware/spu/adsr/) and [ADPCM](/hardware/spu/adpcm/) pages give the register layouts.
+
+## Results
+
+### State at Entry
+
+As the program found the SPU, every voice had pitch 3FFFh and start address 0200h, and SPU_DELAY (1F801014h) read 200931E1h. SPUSTAT read 0005h sixteen times in a row.[^h]
+
+The unknown register 1DA0h reads AC00h most of the time and 0100h at other times: three of the first sixteen back-to-back reads gave 0100h, and two of sixteen reads 100000 cycles apart did the same.[^h]
+
+### SPUCNT and SPUSTAT
+
+SPUSTAT bits 5 to 0 follow SPUCNT bits 5 to 0 after a delay. A change took between 61 and 765 cycles to appear, and eight repeats of the same 8000h to 8010h step took between 83 and 728 cycles.[^h]
+
+Setting the transfer mode bits 5 and 4 to 10b (DMA write) sets SPUSTAT bits 9, 7 and 5 together, so SPUSTAT reads 02A0h. Setting them to 11b (DMA read) shows 0030h first. About 1600 cycles later SPUSTAT reads 01B0h with bits 8 and 7 on.[^h]
+
+SPUCNT bits 6, 8 and 10 to 13 change nothing in SPUSTAT. SPUCNT reads back what was written. A write of FFFFh to SPUSTAT reads back FFFFh at once and returns to 0000h about 689 cycles later.[^h]
+
+### Key On and Key Off
+
+KON took 3992 to 4582 cycles (five to six samples) to the first change of the ADSR level, whereas KOFF at 7FFFh changed the level within 39 to 69 cycles.[^h]
+
+KON on a voice that is already playing first sets the level to 0000h and starts the attack again. A KON while SPUCNT bit 15 is 0 produces no level change, and clearing bit 15 on a voice at 7FFFh drops its level to 3FFFh and then to 0000h.[^h]
+
+A value written to the ADSR level register reads back the written value. On a voice whose sustain never steps the value stays, and on a voice in a linear sustain the envelope continues from the written value.[^h]
+
+### Attack
+
+Attack linear shift 0 with step 0 rises in steps of 3800h and reaches 7FFFh in three steps. Each step after the first adds the full step and the last step clamps at 7FFFh.[^h]
+
+Table: Attack time to 7FFFh in cycles from KON
+
+| Mode | Shift | Step | Cycles to 7FFFh |
+| --- | --- | --- | --- |
+| Linear | 0 | 0 | 6771 |
+| Linear | 2 | 0 | 11262 |
+| Linear | 5 | 0 | 60459 |
+| Linear | 8 | 0 | 453664 |
+| Linear | 10 | 0 | 1801523 |
+| Linear | 12 | 0 | 7193630 |
+| Exponential | 0 | 0 | 6715 |
+| Exponential | 4 | 0 | 51948 |
+| Exponential | 8 | 0 | 790079 |
+| Exponential | 12 | 0 | 12582662 |
+
+Each shift above 11 doubles the time between steps. An exponential attack rises at the linear rate until the level passes 6000h and then at a quarter of that rate. At shifts 8 and 12 it therefore took about 1.75 times as long as the linear attack of the same shift. Shift 31 with step 3 never changed the level.[^h]
+
+### Decay and Sustain Level
+
+Decay stops at the first level at or below (SL + 1) x 800h: SL 0 stopped at 07FFh, SL 3 at 1FFFh and SL 7 at 3FFFh. With decay shift 0 the first decay step falls from 7FFFh straight to 3FFFh, so SL 7 to Eh all stopped at 3FFFh after one step. With SL Fh the level also fell one step and stopped: at 3FFFh with decay shift 0 and at 7FBFh with decay shift 8.[^h]
+
+### Sustain
+
+Sustain linear increase shift 0 reached 7FFFh 8093 cycles after KON, two steps after the decay ended. Setting bit 29 of the ADSR word gave the same times as leaving it clear.[^h]
+
+A linear sustain decrease goes below zero: with shift 0 the level read FFFFh before it read 0000h. Every sustain with shift 31 and step 3 left the level at 3FFFh for two million cycles.[^h]
+
+### Release
+
+Release begins within about 300 cycles of KOFF. Linear release shift 0 took the level from 7FFFh to 3FFFh in its first step and below zero to FFFFh in the next; the level then read 0000h from 1662 cycles after KOFF. Exponential release shift 0 halves the level at each step and ended at 10445 cycles.[^h]
+
+A KOFF during a slow attack releases from the level reached, so the level does not jump to 7FFFh first. After a release ends, the level stays at 0000h.[^h]
+
+### Volume Sweep
+
+A sweep runs on a voice that has never been keyed on, so the volume registers sweep by themselves. A fixed volume of 1234h appears in the current volume register 1E08h as 2468h, which is twice the written value.[^h]
+
+Table: Volume sweep times of voice 2 left
+
+| Register | Start | Change | Cycles to the end |
+| --- | --- | --- | --- |
+| 8000h | 0000h | Linear increase, shift 0 | 2131 |
+| 8020h | 0000h | Linear increase, shift 8 | 449744 |
+| A020h | 7FFEh | Linear decrease, shift 8 | 393851 |
+| C020h | 0000h | Exponential increase, shift 8 | 785779 |
+| E000h | 7FFEh | Exponential decrease, shift 0 | 10876 |
+
+With the phase bit set (9020h), a linear increase from 2000h ran downward through zero and stopped at 8000h. With the all-ones rate 7Fh the volume did not move.[^h]
+
+### ENDX
+
+ENDX bit 0 cleared between 795 and 2252 cycles after KON and set when the voice reached the block with the End flag. At pitch 1000h one block set ENDX after 16143 to 17602 cycles. Two blocks took about 37800 cycles and four blocks about 80800. ENDX can also be written: a write of 5555h reads back 5555h and then 0000h after 481 cycles as the voices update it.[^h]
+
+Pitches above 4000h run no faster than 4000h: four blocks set ENDX after 23953 to 23967 cycles at every pitch from 3FFFh to FFFFh. At pitch 0000h and 0001h the voice never reached its End flag.[^h]
+
+KON does not change the repeat address: right after KON it still read its old value. The loop start flag in the sample then set it; for a flag in block 0 this happened 1889 cycles after KON. A repeat address written while the voice is still in its first block is overwritten by the loop start flag, and one written later stays.[^h]
+
+### IRQ9
+
+A voice reading the IRQ address raises IRQ9: SPUSTAT bit 6 and I_STAT bit 9 both set, and the poll saw I_STAT about 200 cycles first. A voice stopped by End+Mute, and a voice released 100000 cycles before, still raised IRQ9 at its addresses, because such a voice keeps reading sound RAM. In the rows below the sample is four blocks at 4060h and plays at pitch 1000h.[^h]
+
+Table: IRQ9 time by IRQ address in cycles from KON
+
+| IRQ address | SPUSTAT bit 6 | I_STAT bit 9 |
+| --- | --- | --- |
+| 4060h | 1256 | 1057 |
+| 4061h | 6450 | 6251 |
+| 4062h | 318 | 116 |
+| 4064h | 40242 | 40043 |
+| 4065h | 49481 | 49216 |
+| 4066h | 318 | 116 |
+
+Manual writes raise IRQ9 when a written halfword reaches the IRQ address. Writes that began 8 bytes before it raised IRQ9 from the fourth halfword on. DMA writes over the IRQ address did not raise IRQ9 in any of four tries. DMA reads raised it, including a read that ended just before the IRQ address.[^h]
+
+### Capture Buffers
+
+SPUSTAT bit 11 toggles every 196588 cycles, which is 256 samples, while transfer control is 0004h or 0008h. With transfer control 0000h, 0002h or 000Ch it never toggled.[^h]
+
+The capture buffers at the start of sound RAM raise IRQ9 when the IRQ address is set inside them. IRQ address 0000h to 01FFh hit once every 393000 cycles, and 0200h never hit.[^h]
+
+The voice 1 and voice 3 buffers hold the voice's output before its volume, so they carry the tone with the main and voice volumes at 0. The values with the ADSR level decayed to 3FFFh were the same as at 7FFFh. A released voice writes zeros.[^h]
+
+Noise mode at shift 15 changes every sample. Each lower noise shift halves the rate: 127 changes in 256 samples at shift 14, 32 at 12, 8 at 10 and 2 at 8.[^h]
+
+### Transfers
+
+The Fifo is 32 halfwords deep: of 40 halfwords written in one block, the first 32 reached sound RAM. A second manual block with no new transfer address continues where the first ended.[^h]
+
+The transfer type in 1F801DACh changes what a manual write stores. Type 2 stores every halfword, type 3 every second one and type 4 every fourth. Type 5 stored only the seventh halfword, and types 0, 1, 6 and 7 stored only the last.[^h]
+
+Table: DMA read by transfer type
+
+| Type | Halfwords read |
+| --- | --- |
+| 3 | Each halfword followed by FFFFh or 0000h |
+| 4 | Each halfword four times |
+| 5 | Each halfword followed by 0000h, four times |
+
+### Register Access
+
+Unknown registers 1DBCh, 1DBEh, 1DA0h and 1E60h to 1E7Fh read back what is written. The high halves of PMON, NON, EON and ENDX also read back written values. Halfword reads from 1E80h to 1FFEh all returned FFFFh, and the console did not hang.[^h]
+
+32-bit stores to the ADSR low register lost the low half in 7 of 32 tries and never the high half. A 32-bit load and byte loads read the halves correctly. A byte store to an even SPU address writes the whole halfword from the register, and one to an odd address writes nothing.[^h]
+
+## Runs
+
+### Run 5501a-card-b on 27 September 2026
+
+Raw output: [00RUN.txt](/tests/raw/20260927T0000Z-5501a-card-b/spuenv/s025/00RUN.txt) · [01STA.txt](/tests/raw/20260927T0000Z-5501a-card-b/spuenv/s025/01STA.txt) · [02CNT.txt](/tests/raw/20260927T0000Z-5501a-card-b/spuenv/s025/02CNT.txt) · [03KON.txt](/tests/raw/20260927T0000Z-5501a-card-b/spuenv/s025/03KON.txt) · [04ATK.txt](/tests/raw/20260927T0000Z-5501a-card-b/spuenv/s025/04ATK.txt) · [05DEC.txt](/tests/raw/20260927T0000Z-5501a-card-b/spuenv/s025/05DEC.txt) · [06SUS.txt](/tests/raw/20260927T0000Z-5501a-card-b/spuenv/s025/06SUS.txt) · [07REL.txt](/tests/raw/20260927T0000Z-5501a-card-b/spuenv/s025/07REL.txt) · [08SWP.txt](/tests/raw/20260927T0000Z-5501a-card-b/spuenv/s025/08SWP.txt) · [09END.txt](/tests/raw/20260927T0000Z-5501a-card-b/spuenv/s025/09END.txt) · [10IRQ.txt](/tests/raw/20260927T0000Z-5501a-card-b/spuenv/s025/10IRQ.txt) · [11CAP.txt](/tests/raw/20260927T0000Z-5501a-card-b/spuenv/s025/11CAP.txt) · [12VCP.txt](/tests/raw/20260927T0000Z-5501a-card-b/spuenv/s025/12VCP.txt) · [13XFR.txt](/tests/raw/20260927T0000Z-5501a-card-b/spuenv/s025/13XFR.txt) · [14REG.txt](/tests/raw/20260927T0000Z-5501a-card-b/spuenv/s025/14REG.txt) · [15UNU.txt](/tests/raw/20260927T0000Z-5501a-card-b/spuenv/s026/15UNU.txt)
+
+00RUN.txt:
+
+```
+===== 00 RUN | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+15 tests
+A chain program, linked at 80100000
+Saved on the card in slot 2, from image 1
+COP0 at start: BPC 00000000 BDA 00000000 TAR BFC02BAC DCIC 00000000 BadVaddr 00000480 BDAM 00000000
+BPCM 00000000 SR 40000000 Cause 00000020 EPC 8001D338 PRId 00000002
+```
+
+01STA.txt:
+
+```
+===== 01 STA SPU STATE AT ENTRY | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+SPU registers as this program found them, nothing written first.
+1DA8h, the transfer Fifo, is not read (shown ----).
+1C00: 0000 0000 0400 0C28 8088 DFF1 0000 14C4 0000 0000 0407 0C28 8087 DFF1 0000 14C4
+1C20: 0000 0000 0800 0C28 8088 DFF1 0000 14C4 0000 0000 080E 0C28 8087 DFF1 0000 14C4
+1C40: 0000 0000 08FA 0200 8C7A DFED 0000 034C 0000 0000 090B 0200 8C7A DFED 0000 034C
+1C60: 0000 0000 02AB 0C28 8088 DFF1 0000 14C4 0000 0000 02B0 0C28 8087 DFF1 0000 14C4
+1C80: 0000 0000 0A14 0200 8C7A DFED 0000 034C 0000 0000 0A27 0200 8C7A DFED 0000 034C
+1CA0: 0000 0000 0BFC 0200 8C7A DFED 0000 034C 0000 0000 0C12 0200 8C7A DFED 0000 034C
+1CC0: 0000 0000 08FA 0200 8C7A DFED 0000 034C 0000 0000 090B 0200 8C7A DFED 0000 034C
+1CE0: 0000 0000 0A14 0200 8C7A DFED 0000 034C 0000 0000 0A27 0200 8C7A DFED 0000 034C
+1D00: 0000 0000 0BFC 0200 8C7A DFED 0000 034C 0000 0000 0C12 0200 8C7A DFED 0000 034C
+1D20: 0000 0000 0556 0C28 8088 DFF1 0000 14C4 0000 0000 0560 0C28 8087 DFF1 0000 14C4
+1D40: 0000 0000 0A14 0200 8C7A DFED 0000 034C 0000 0000 0A27 0200 8C7A DFED 0000 034C
+1D60: 0000 0000 3FFF 0200 0000 0000 0000 0200 0000 0000 3FFF 0200 0000 0000 0000 0200
+1D80: 0000 0000 0000 0000 0000 0000 FFFF FFFF 0000 0000 0000 0000 FFFF 003F FFFF 00FF
+1DA0: AC00 E128 FFFE 0200 ---- C085 0004 0005 7FFF 7FFF 0000 0000 0000 0000 DFFF F7FF
+1DC0: 033D 0231 7E00 5000 B400 B000 4C00 B000 6000 5400 1ED6 1A31 1D14 183B 1BC2 16B2
+1DE0: 1A32 15EF 15EE 1055 1334 0F2D 11F6 0C5D 1056 0AE1 0AE0 07A2 0464 0232 8000 8000
+1E00: 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
+1E20: 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
+1E40: 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
+1E60: F5FF F3FF BFFF 38DF 74BB FFEE BFF7 FFEF FFFF FD7D 6EFF 33B3 FC7F FFFF BFFF 7D8F
+1DA0h read 16 times in a row: A000 AC00 AC00 AC00 AC00 AC00 AC00 AC00 AC00 AC00 AC00 AC00 AC00 AC00 AC00 AC00
+1DA0h read 16 times 100000 cycles apart: AC00 AC00 AC00 AC00 AC00 AC00 AC00 AC00 AC00 AC00 AC00 AC00 A000 0100 AC00 AC00
+SPUSTAT read 16 times 5000 cycles apart: 0005 0005 0005 0005 0005 0005 0005 0005 0005 0005 0005 0005 0005 0805 0805 0805
+SPU_DELAY 1F801014h: 200931E1
+Done.
+```
+
+02CNT.txt:
+
+```
+===== 02 CNT SPU SPUCNT TO STAT | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+SPUSTAT 5-0 is SPUCNT 5-0 applied a bit delayed (spx:726); bit 7 is like SPUCNT
+bit 5 (spx:721); DMA read sets 9 and 7 late (spx:727-729). Times from the SPUCNT
+write, cycles:value, for 20000 cycles or six changes; bit 11 (capture half) masked
+out. Transfer address 30000h.
+SPUCNT 8000 to 8010, SPUSTAT was 0000, changes: 630:0010
+SPUCNT 8010 to 8000, SPUSTAT was 0010, changes: 588:0000
+SPUCNT 8000 to 8020, SPUSTAT was 0000, changes: 61:02A0
+SPUCNT 8020 to 8000, SPUSTAT was 02A0, changes: 651:0000
+SPUCNT 8000 to 8030, SPUSTAT was 0000, changes: 299:0030 1860:01B0
+SPUCNT 8030 to 8000, SPUSTAT was 01B0, changes: 351:0000
+SPUCNT 8000 to 8001, SPUSTAT was 0000, changes: 759:0001
+SPUCNT 8001 to 8000, SPUSTAT was 0001, changes: 66:0000
+SPUCNT 8000 to 8002, SPUSTAT was 0000, changes: 302:0002
+SPUCNT 8002 to 8000, SPUSTAT was 0002, changes: 351:0000
+SPUCNT 8000 to 8004, SPUSTAT was 0000, changes: 353:0004
+SPUCNT 8004 to 8000, SPUSTAT was 0004, changes: 409:0000
+SPUCNT 8000 to 8008, SPUSTAT was 0000, changes: 411:0008
+SPUCNT 8008 to 8000, SPUSTAT was 0008, changes: 467:0000
+SPUCNT 8000 to 803F, SPUSTAT was 0000, changes: 530:003F 1271:01BF
+SPUCNT 803F to 8000, SPUSTAT was 01BF, changes: 530:0000
+SPUCNT 8000 to 8040, SPUSTAT was 0000, changes: none
+SPUCNT 8040 to 8000, SPUSTAT was 0000, changes: none
+SPUCNT 8000 to 8100, SPUSTAT was 0000, changes: none
+SPUCNT 8100 to 8000, SPUSTAT was 0000, changes: none
+SPUCNT 8000 to BC00, SPUSTAT was 0000, changes: none
+SPUCNT BC00 to 8000, SPUSTAT was 0000, changes: none
+SPUCNT 8000 to 0000, SPUSTAT was 0000, changes: none
+SPUCNT 0000 to 8000, SPUSTAT was 0000, changes: none
+SPUCNT 8010 to 8020, SPUSTAT was 0010, changes: 645:02A0
+SPUCNT 8020 to 8030, SPUSTAT was 02A0, changes: 467:00B0 1212:01B0
+SPUCNT 8030 to 8010, SPUSTAT was 01B0, changes: 61:0010
+SPUCNT 8000h to 8010h, cycles until SPUSTAT 5-0 = 10h, 8 times: 380 257 199 83 726 666 547 431
+SPUCNT write BF00h reads BF00 at once, BF00 after 3000 cycles
+SPUSTAT was 0000, write FFFFh reads FFFF at once, then: 579:0000
+SPUSTAT write 0000h reads 0000 at once, then: none
+Transfer control write FFFFh reads FFFF, write 0004h reads 0004
+Done.
+```
+
+03KON.txt:
+
+```
+===== 03 KON SPU KEY ON OFF | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+Voice 0, silent loop at 20000h, pitch 1000h. Cycles from the write.
+KON to the first level change (attack linear shift 0 step 0): 5303 4576 4456 4343 4224 4168 4059 3992
+KON to the second change: 6047 5342 5223 5104 4991 4929 4820 4758
+KOFF at 7FFFh to the first change (release linear shift 0): 69 39 39 39 43 39 39 39
+KON again at 3FFF, level: 1218:0000 5068:3800 5810:7000 6555:7FFF 7362:3FFF
+KON again at 3FFF, level: 79:0000 3907:3800 4650:7000 5457:7FFF 6201:3FFF
+KON again at 3FFF, level: 891:0000 4780:3800 5522:7000 6267:7FFF 7074:3FFF
+KON again at 3FFF, level: 1294:0000 5124:3800 5924:7000 6668:7FFF 7413:3FFF
+Attack linear shift 10: KON again at 2354, level: 399:2362 1143:0000 4975:000E 5775:001C 6519:002A 7264:0038
+KON then KOFF back to back, level: 4442:3800 5184:7000 5929:7FFF 6736:3FFF
+At 7FFFh, KOFF then KON back to back, level: 125:FFFF 810:0000 5401:3800 6207:7000 6951:7FFF 7751:3FFF
+KON write 0001h reads 0001 (high 0000), 0001 after 5000; KOFF 0001h reads 0001 (high 0000); KON high FF00h reads FF00
+KOFF high FF00h reads FF00
+SPUCNT 0000h, KON attack linear shift 8, level: none
+then SPUCNT 8000h (level was 0000), level: none ENDX low FFFF
+At 7FFFh, SPUCNT to 0000h, level: 81:3FFF 620:0000
+then SPUCNT 8000h (level was 0000), level: none
+Sustain never stepping at 7FFFh, write level 1234h: reads 1234, then: none
+Sustain linear increase shift 8, write level 1234h: reads 1234, then: 274:4A34 1020:7FFF 1820:3FFF 2564:4037 3309:406F 4116:40A7
+Voice released to 0, write level 1234h: reads 1234, then: 675:D234 1417:0000
+Voice 5, released, write level 8123h: reads 8123
+Done.
+```
+
+04ATK.txt:
+
+```
+===== 04 ATK SPU ADSR ATTACK | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+Attack: voice 0, ADSR low as shown (decay 0, sustain level Fh), sustain never
+stepping. Level changes cycles:value from KON, the first rise above 6000h, the time
+it reached 7FFFh, then eight readings.
+Lin sh00 st0 (000F): 5200:3800 5971:7000 6763:7FFF | >6000 5971:7000 | end 6763
+ every 2500: 0000 0000 - - - - - -
+Lin sh00 st1 (010F): 4368:3000 5165:6000 5910:7FFF | >6000 5910:7FFF | end 5910
+ every 2500: 0000 3000 - - - - - -
+Lin sh00 st2 (020F): 4368:2800 5165:5000 5910:7800 6702:7FFF | >6000 5910:7800 | end 6702
+ every 2500: 0000 2800 - - - - - -
+Lin sh00 st3 (030F): 4372:2000 5174:4000 5919:6000 6669:7FFF | >6000 6669:7FFF | end 6669
+ every 2500: 0000 2000 - - - - - -
+Lin sh02 st0 (080F): 4421:0E00 5246:1C00 5996:2A00 6743:3800 | >6000 9036:6200 | end 11281
+ every 5000: 0E00 7000 - - - - - -
+Lin sh05 st0 (140F): 4417:01C0 5192:0380 5942:0540 6687:0700 | >6000 45889:6040 | end 60480
+ every 25000: 2F40 6900 - - - - - -
+Lin sh08 st0 (200F): 4417:0038 5186:0070 5942:00A8 6687:00E0 | >6000 340790:6008 | end 453685
+ every 100000: 1B58 37C8 5470 70E0 - - - -
+Lin sh10 st0 (280F): 4412:000E 5181:001C 5929:002A 6674:0038 | >6000 1352177:6008 | end 1801488
+ every 300000: 151C 2A70 3FD2 5526 6A88 7FEA - -
+Lin sh11 st0 (2C0F): 4412:0007 5181:000E 5929:0015 6674:001C | >6000 2700073:6001 | end 3598580
+ every 500000: 11AA 2377 3544 4711 58DE 6AAB 7C78 -
+Lin sh11 st3 (2F0F): 4412:0004 5181:0008 5929:000C 6674:0010 | >6000 4722985:6004 | end 6295049
+ every 1000000: 1444 289C 3CF4 514C 65A4 79FC - -
+Lin sh12 st0 (300F): 5129:0007 6710:000E 8257:0015 9813:001C | >6000 5396565:6001 | end 7193677
+ every 1000000: 11B8 2385 3552 471F 58EC 6AB9 7C8D -
+Lin sh13 st0 (340F): 5922:0007 9012:000E 12073:0015 15132:001C | >6000 - | end -
+ every 1000000: 08DC 11C6 1AA9 2393 2C76 3560 3E43 472D
+Lin sh14 st0 (380F): 5227:0007 11333:000E 17515:0015 23591:001C | >6000 - | end -
+ every 1000000: 046E 08E3 0D58 11CD 163B 1AB0 1F25 239A
+Lin sh16 st0 (400F): 8938:0007 33552:000E 58140:0015 82740:001C | >6000 - | end -
+ every 1000000: 011F 023E 0356 0475 0594 06AC 07CB 08EA
+Lin sh20 st0 (500F): 334679:0007 727895:000E 1121111:0015 1514271:001C | >6000 - | end -
+ every 1000000: 000E 0023 0031 0046 0054 0069 0077 008C
+Lin sh24 st0 (600F): 1505104:0007 7796544:000E 14088000:0015 | >6000 - | end -
+ every 2000000: 0007 0007 0007 000E 000E 000E 000E 0015
+Lin sh26 st2 (6A0F): 13750104:0005 | >6000 - | end -
+ every 4250000: 0000 0000 0000 0005 0005 0005 0005 0005
+Lin sh29 st2 (760F): 4859689:0005 30025513:000A | >6000 - | end -
+ every 4250000: 0000 0005 0005 0005 0005 0005 0005 000A
+Lin sh31 st2 (7E0F): 21129012:0005 | >6000 - | end -
+ every 4250000: 0000 0000 0000 0000 0005 0005 0005 0005
+Lin sh31 st3 (7F0F): none | >6000 - | end -
+ every 2500000: 0000 0000 0000 0000 0000 0000 0000 0000
+Exp sh00 st0 (800F): 4466:3800 5158:7000 5956:7E00 6716:7FFF | >6000 5158:7000 | end 6716
+ every 2500: 0000 3800 - - - - - -
+Exp sh04 st0 (900F): 4413:0380 5182:0700 5930:0A80 6675:0E00 | >6000 25180:6200 | end 52037
+ every 25000: 5E80 7E00 - - - - - -
+Exp sh08 st0 (A00F): 4416:0038 5191:0070 5941:00A8 6686:00E0 | >6000 340800:6008 | end 790097
+ every 200000: 37C8 643E 7276 - - - - -
+Exp sh09 st0 (A40F): 4429:001C 5198:0038 5946:0054 6691:0070 | >6000 677890:6008 | end 1575713
+ every 375000: 34D4 629A 6FF2 7D4A - - - -
+Exp sh10 st0 (A80F): 4430:000E 5199:001C 5947:002A 6692:0038 | >6000 1352195:6008 | end 3147783
+ every 750000: 351A 62A8 7000 7D58 - - - -
+Exp sh11 st0 (AC0F): 4360:0007 5163:000E 5936:0015 6709:001C | >6000 2700049:6001 | end 6292786
+ every 1500000: 3544 62AF 7007 7D5F - - - -
+Exp sh12 st0 (B00F): 5105:0007 6636:000E 8257:0015 9758:001C | >6000 5396534:6001 | end 12584226
+ every 2000000: 2385 471F 62AF 6B92 747C 7D5F - -
+Exp sh14 st0 (B80F): 5939:0007 12083:000E 18291:0015 24407:001C | >6000 - | end -
+ every 2000000: 08E3 11CD 1AB0 239A 2C7D 3567 3E4A 4734
+Done.
+```
+
+05DEC.txt:
+
+```
+===== 05 DEC SPU ADSR DECAY | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+Decay: voice 0, attack linear shift 0 step 0, decay shift and sustain level as
+shown, sustain never stepping. Changes from KON, the first fall to (SL+1)*800h or
+below (spx:540), then eight readings: where the level stops is the sustain level.
+Dec 00 SL 0 (0000): 4781:3800 5517:7000 6285:7FFF 7053:3FFF | <=SL 9377:07FF | end -
+ every 5000: 3800 07FF 07FF 07FF 07FF 07FF 07FF 07FF
+Dec 00 SL 3 (0003): 4344:3800 5177:7000 5936:7FFF 6698:3FFF | <=SL 7457:1FFF | end -
+ every 5000: 3800 1FFF 1FFF 1FFF 1FFF 1FFF 1FFF 1FFF
+Dec 00 SL 7 (0007): 4355:3800 5206:7000 5868:7FFF 6647:3FFF | <=SL 6647:3FFF | end -
+ every 5000: 3800 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Dec 00 SL B (000B): 4446:3800 5198:7000 5966:7FFF 6734:3FFF | <=SL 6734:3FFF | end -
+ every 5000: 3800 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Dec 00 SL E (000E): 4355:3800 5206:7000 5883:7FFF 6647:3FFF | <=SL 6647:3FFF | end -
+ every 5000: 3800 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Dec 00 SL F (000F): 4446:3800 5198:7000 5974:7FFF 6750:3FFF | <=SL - | end -
+ every 5000: 3800 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Dec 02 SL 7 (0027): 4446:3800 5143:7000 5914:7FFF 6682:6FFF | <=SL 10566:3971 | end -
+ every 12500: 3971 3971 3971 3971 3971 3971 3971 3971
+Dec 04 SL 7 (0047): 4342:3800 5144:7000 5903:7FFF 6668:7BFF | <=SL 22788:3FA2 | end -
+ every 25000: 3FA2 3FA2 3FA2 3FA2 3FA2 3FA2 3FA2 3FA2
+Dec 06 SL 7 (0067): 4449:3800 5141:7000 5911:7FFF 6680:7EFF | <=SL 74308:3F8E | end -
+ every 75000: 3F8E 3F8E 3F8E 3F8E 3F8E 3F8E 3F8E 3F8E
+Dec 08 SL 0 (0080): 4443:3800 5127:7000 5895:7FFF 6663:7FBF | <=SL 1051231:07FE | end -
+ every 250000: 446A 23B3 1272 094D 07FE 07FE 07FE 07FE
+Dec 08 SL 7 (0087): 4446:3800 5143:7000 5914:7FFF 6682:7FBF | <=SL 275555:3FF1 | end -
+ every 200000: 4DD1 3FF1 3FF1 3FF1 3FF1 3FF1 3FF1 3FF1
+Dec 08 SL F (008F): 4446:3800 5143:7000 5923:7FFF 6702:7FBF | <=SL - | end -
+ every 50000: 7FBF 7FBF 7FBF 7FBF 7FBF 7FBF 7FBF 7FBF
+Dec 10 SL 7 (00A7): 5187:3800 5883:7000 6647:7FFF 7415:7FEF | <=SL 1049653:3FFA | end -
+ every 500000: 5C8A 4243 3FFA 3FFA 3FFA 3FFA 3FFA 3FFA
+Dec 11 SL 7 (00B7): 4342:3800 5144:7000 5903:7FFF 6668:7FF7 | <=SL 2001994:3FFF | end -
+ every 1000000: 5B62 400E 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Dec 12 SL 7 (00C7): 4390:3800 5219:7000 5900:7FFF 6691:7FF7 | <=SL 3997211:3FFF | end -
+ every 2000000: 5B4A 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Dec 12 SL 0 (00C0): 4388:3800 5092:7000 5887:7FFF 6674:7FF7 | <=SL 13958161:0800 | end -
+ every 4250000: 3D6F 1BC4 0B13 07FF 07FF 07FF 07FF 07FF
+Dec 13 SL 7 (00D7): 4405:3800 5127:7000 5914:7FFF 7446:7FF7 | <=SL 7988459:3FFF | end -
+ every 2000000: 6C40 5B3E 4CA7 3FFF 3FFF 3FFF 3FFF 3FFF
+Dec 15 SL 7 (00F7): 4388:3800 5104:7000 5891:7FFF 16694:7FF7 | <=SL - | end -
+ every 2000000: 7AEF 75D7 70C7 6C39 67C4 634F 5F0A 5B38
+Done.
+```
+
+06SUS.txt:
+
+```
+===== 06 SUS SPU ADSR SUSTAIN | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+Sustain: voice 0, attack linear shift 0 step 0, decay shift 0, sustain level 7
+(4000h), then the sustain as shown. The watch starts at the first reading of 4000h
+or less after 7FFFh ("from"): changes, the first rise above 6000h, the time it
+reached 7FFFh (increase) or 0 (decrease), eight readings. Times from KON.
+Sus lin inc sh00 st0 (0000): 7257:77FF 8079:7FFF | >6000 7257:77FF | end 8079
+ every 2500 from 6518: - - - - - - - -
+Sus lin inc sh04 st0 (0400): 8246:437F 9020:46FF 9765:4A7F 10514:4DFF | >6000 15171:62FF | end 22110
+ every 12500 from 7435: 77FF - - - - - - -
+Sus lin inc sh08 st0 (0800): 8248:4037 9022:406F 9767:40A7 10516:40DF | >6000 120389:6027 | end 232485
+ every 100000 from 7437: 5C6F 78DF - - - - - -
+Sus lin inc sh08 st3 (08C0): 8295:401F 9064:403F 9819:405F 10564:407F | >6000 204835:601F | end 400741
+ every 200000 from 7499: 607F - - - - - - -
+Sus lin inc sh08 st0 b29 (2800): 8259:4037 9033:406F 9778:40A7 10527:40DF | >6000 120400:6027 | end 232496
+ every 100000 from 7448: 5C6F 78DF - - - - - -
+Sus lin inc sh11 st0 (0B00): 8259:4006 9028:400D 9784:4014 10529:401B | >6000 906808:6004 | end 1805315
+ every 500000 from 7462: 51CC 6399 7566 - - - - -
+Sus lin inc sh12 st0 (0C00): 8949:4006 10534:400D 12084:4014 13634:401B | >6000 1806118:6004 | end 3603274
+ every 1000000 from 7451: 51CC 6399 7566 - - - - -
+Sus lin inc sh16 st0 (1000): 17408:4006 42027:400D 66623:4014 91203:401B | >6000 - | end -
+ every 1000000 from 7462: 411E 4236 4355 4474 4593 46AB 47CA 48E9
+Sus lin dec sh00 st0 (4000): 8248:FFFF 9064:0000 | >6000 8248:FFFF | end 9064
+ every 2500 from 7437: - - - - - - - -
+Sus lin dec sh08 st0 (4800): 8259:3FBF 9033:3F7F 9778:3F3F 10527:3EFF | >6000 204056:FFFF | end 204823
+ every 100000 from 7448: 1F7F - - - - - - -
+Sus lin dec sh08 st3 (48C0): 7043:3FD7 7817:3FAF 8563:3F87 9313:3F5F | >6000 321072:FFEF | end 321839
+ every 200000 from 6242: 175F - - - - - - -
+Sus lin dec sh12 st0 (4C00): 7977:3FF7 9563:3FEF 11112:3FE7 12659:3FDF | >6000 3152243:FFFF | end 3153007
+ every 1000000 from 6470: 2BA7 174F 02F7 - - - - -
+Sus exp inc sh08 st0 (8800): 7154:4037 7923:406F 8679:40A7 9424:40DF | >6000 119215:6027 | end 566990
+ every 200000 from 6358: 6655 748D - - - - - -
+Sus exp inc sh10 st0 (8A00): 8295:400D 9064:401B 9819:4029 10564:4037 | >6000 457563:600B | end 2253164
+ every 500000 from 7499: 60EB 69D5 72B8 7BA2 - - - -
+Sus exp inc sh12 st0 (8C00): 9043:4006 10570:400D 12076:4014 13690:401B | >6000 1806156:6004 | end 8992376
+ every 2000000 from 7499: 60EB 69CE 72B8 7B9B - - - -
+Sus exp dec sh00 st0 (C000): 8295:1FFF 9064:0FFF 9819:07FF 10614:03FF | >6000 - | end 18245
+ every 2500 from 7499: 07FF 00FF 001F 0001 - - - -
+Sus exp dec sh08 st0 (C800): 8237:3FDF 9006:3FBF 9760:3F9F 10505:3F7F | >6000 - | end 1601824
+ every 500000 from 7441: 1138 0414 007B - - - - -
+Sus exp dec sh12 st0 (CC00): 9000:3FFB 10536:3FF7 12037:3FF3 13664:3FEF | >6000 - | end 13114200
+ every 2000000 from 7434: 2CBD 1E52 1426 0CFD 07E7 02D1 - -
+Sus lin inc sh31 st3 (1FC0): none | >6000 - | end -
+ every 250000 from 6813: 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Sus lin dec sh31 st3 (5FC0): none | >6000 - | end -
+ every 250000 from 6644: 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Sus exp inc sh31 st3 (9FC0): none | >6000 - | end -
+ every 250000 from 6644: 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Sus exp dec sh31 st3 (DFC0): none | >6000 - | end -
+ every 250000 from 6644: 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Sus lin dec sh31 st2 (5F80): none | >6000 - | end -
+ every 250000 from 6644: 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Done.
+```
+
+07REL.txt:
+
+```
+===== 07 REL SPU ADSR RELEASE | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+Release: voice 0 held at 7FFFh (attack shift 0, sustain level Fh, sustain never
+stepping), then KOFF. Changes from KOFF, the first fall to 4000h, the time it
+reached 0, eight readings.
+Rel lin sh00 (1FC0): 334:3FFF 903:FFFF 1667:0000 | <=4000 334:3FFF | end 1667
+ every 2500: - - - - - - - -
+Rel lin sh04 (1FC4): 298:3FFF 1283:3BFF 2056:37FF 2834:33FF | <=4000 298:3FFF | end 13604
+ every 12500: 03FF - - - - - - -
+Rel lin sh08 (1FC8): 303:3FBF 873:3F7F 1657:3F3F 2430:3EFF | <=4000 303:3FBF | end 196755
+ every 125000: 173F - - - - - - -
+Rel lin sh11 (1FCB): 297:3FF7 867:3FEF 1640:3FE7 2419:3FDF | <=4000 297:3FF7 | end 1573018
+ every 1000000: 1747 - - - - - - -
+Rel lin sh12 (1FCC): 295:3FFF 1394:3FF7 3002:3FEF 4514:3FE7 | <=4000 295:3FFF | end 3146355
+ every 1000000: 2BA7 174F 02F7 - - - - -
+Rel lin sh13 (1FCD): 297:3FFF 3696:3FF7 6768:3FEF 9840:3FE7 | <=4000 297:3FFF | end 6292811
+ every 1000000: 35D7 2BAF 217F 1757 0D27 02FF - -
+Rel lin sh16 (1FD0): 302:3FFF 19752:3FF7 44304:3FEF 68881:3FE7 | <=4000 302:3FFF | end -
+ every 1000000: 3EBF 3D77 3C2F 3AEF 39A7 385F 3717 35D7
+Rel exp sh00 (1FE0): 298:3FFF 555:1FFF 1224:0FFF 1997:07FF | <=4000 298:3FFF | end 10436
+ every 2500: 07FF 007F 000F 0001 - - - -
+Rel exp sh04 (1FE4): 303:3FFF 1193:3DFF 1969:3C0F 2745:3A2E | <=4000 303:3FFF | end 165522
+ every 25000: 1722 0857 02E4 0102 0051 0015 - -
+Rel exp sh08 (1FE8): 298:3FFF 1491:3FDF 2281:3FBF 3054:3F9F | <=4000 298:3FFF | end 1595166
+ every 375000: 1814 08B1 02CB 007C - - - -
+Rel exp sh11 (1FEB): 299:3FFF 1321:3FFB 2125:3FF7 2818:3FF3 | <=4000 299:3FFF | end 6553912
+ every 2000000: 1E54 0CFE 02D2 - - - - -
+Rel exp sh12 (1FEC): 294:3FFF 553:3FFB 1904:3FF7 3465:3FF3 | <=4000 294:3FFF | end 13105528
+ every 2000000: 2CBD 1E50 1424 0CFC 07E6 02D0 - -
+Attack linear shift 12 cut at 3552 by KOFF, release linear shift 8: 893:3512 1678:34D2 2437:3492 3198:3452 | <=0800 139954:07D2 | end 165300
+ every 250000: - - - - - - - -
+Level after the release, 200000 cycles: none
+Release linear shift 8, second KOFF at 0000: none | <=0800 - | end 305
+ every 125000: - - - - - - - -
+Done.
+```
+
+08SWP.txt:
+
+```
+===== 08 SWP SPU VOLUME SWEEP | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+Sweeps on voice 2's volume, voice 2 never keyed on. The start is set as a fixed
+volume 5000 cycles before (spx:574-577). Current volume 1E08h (spx:650). Changes
+from the sweep write, the time it reached 7FFFh (increase) or 0 (decrease).
+Fixed volume 1234h, cycles until 1E08h changes: 399:2468 90:2468 726:2468 666:2468
+Fixed volume 4000h (bit 14, spx:560 range) reads 1E08h 8000
+V2L from 0000 reg 8000 (reads 8000): 602:3800 1377:7000 2127:7FFF | x - | end 2127
+ every 2500: - - - - - - - -
+V2L from 0000 reg 8010 (reads 8010): 348:0380 1067:0700 1817:0A80 2567:0E00 | x - | end 27936
+ every 12500: 3B80 7380 - - - - - -
+V2L from 0000 reg 8020 (reads 8020): 345:0038 960:0070 1714:00A8 2559:00E0 | x - | end 449507
+ every 100000: 1CA8 3918 5588 71F8 - - - -
+V2L from 0000 reg 8023 (reads 8023): 348:0020 1074:0040 1921:0060 2671:0080 | x - | end 785982
+ every 200000: 20A0 4120 61A0 - - - - -
+V2L from 0000 reg 802C (reads 802C): 505:0007 1184:000E 1934:0015 2779:001C | x - | end 3594645
+ every 500000: 11CD 239A 3567 4734 5901 6ACE 7C9B -
+V2L from 0000 reg 8030 (reads 8030): 1210:0007 2690:000E 4239:0015 5786:001C | x - | end 7189724
+ every 1000000: 11CD 239A 3567 4734 5901 6ACE 7C9B -
+V2L from 0000 reg 8040 (reads 8040): 10664:0007 35177:000E 59760:0015 84367:001C | x - | end -
+ every 1000000: 011F 0237 0356 0475 0594 06AC 07CB 08EA
+V2L from 7FFE reg A020 (reads A020): 513:7FBE 1293:7F7E 2043:7F3E 2791:7EFE | x - | end 393751
+ every 125000: 573E 2E7E 05FE - - - - -
+V2L from 7FFE reg A030 (reads A030): 1511:7FF6 2991:7FEE 4541:7FE6 6091:7FDE | x - | end 6292194
+ every 1000000: 6BA6 574E 42F6 2E9E 1A46 05EE - -
+V2L from 0000 reg C020 (reads C020): 348:0038 869:0070 1717:00A8 2467:00E0 | x - | end 785778
+ every 200000: 3918 6484 72CA - - - - -
+V2L from 0000 reg C030 (reads C030): 607:0007 2143:000E 3649:0015 5263:001C | x - | end 12575051
+ every 2000000: 239A 4734 62B6 6BA0 7483 7D6D - -
+V2L from 7FFE reg E000 (reads E000): 352:3FFF 967:1FFF 1714:0FFF 2559:07FF | x - | end 10952
+ every 2500: 07FF 00FF 001F 0003 - - - -
+V2L from 7FFE reg E020 (reads E020): 501:7FBE 1273:7F7E 2023:7F3E 2773:7EFE | x - | end 1863655
+ every 500000: 2323 0925 01DA - - - - -
+V2L from 7FFE reg E030 (reads E030): 1028:7FF6 2564:7FEE 4175:7FE6 5684:7FDE | x - | end -
+ every 2000000: 5B31 3FEA 2CAD 1E47 141B 0CF7 07E1 02CA
+V2L from 2000 reg 9020 (reads 9020): 353:1FC0 871:1F80 1716:1F40 2468:1F00 | x - | end -
+ every 250000: CE80 8000 8000 8000 8000 8000 8000 8000
+V2L from C000 reg 8020 (reads 8020): 600:C038 1369:C070 2121:C0A8 2966:C0E0 | x - | end 674170
+ every 250000: 0718 4E68 - - - - - -
+V2L from C000 reg B020 (reads B020): 359:C038 876:C070 1626:C0A8 2471:C0E0 | x - | end -
+ every 250000: 0000 0000 0000 0000 0000 0000 0000 0000
+V2L from 2000 reg B020 (reads B020): 616:0000 | x - | end -
+ every 250000: 0000 0000 0000 0000 0000 0000 0000 0000
+V2L from 7FFE reg F020 (reads F020): 358:7FBE 1177:7F7E 1927:7F3E 2677:7EFE | x - | end -
+ every 500000: 2323 0925 01DA 0000 0000 0000 0000 0000
+V2L from 2000 reg 807F (reads 807F): none | x - | end -
+ every 250000: 2000 2000 2000 2000 2000 2000 2000 2000
+V2L from 2000 reg B07F (reads B07F): 359:0000 | x - | end -
+ every 250000: 0000 0000 0000 0000 0000 0000 0000 0000
+V2R from 0000 reg 8020 (reads 8020): 358:0038 878:0070 1630:00A8 2385:00E0 | x - | end 449318
+ every 100000: 1CA8 3918 5588 71F8 - - - -
+V0L from 0000 reg 8020 (reads 8020): 702:0038 1482:0070 2236:00A8 3087:00E0 | x - | end 450043
+ every 100000: 1C70 38E0 5550 71F8 - - - -
+Done.
+```
+
+09END.txt:
+
+```
+===== 09 END SPU ENDX LOOPS | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+Voice 0. S1, S2, S4: one, two, four blocks, the last End+Repeat. Cycles from KON
+until ENDX bit 0 reads 0 (0: it never read 1 after KON), and until it reads 1
+(0: not within the limit).
+S1 pitch 1000, ENDX bit 0 clear, set: 1634,16948 853,16210 800,16151 2192,17542
+S2 pitch 1000, ENDX bit 0 clear, set: 927,37745 851,37727
+S4 pitch 1000, ENDX bit 0 clear, set: 931,80761 851,80745
+S4 pitch 0800, ENDX bit 0 clear, set: 927,157573
+S4 pitch 2000, ENDX bit 0 clear, set: 933,42406
+S4 pitch 3FFF, ENDX bit 0 clear, set: 927,23955
+S4 pitch 4000, ENDX bit 0 clear, set: 937,23963
+S4 pitch 4001, ENDX bit 0 clear, set: 871,23954
+S4 pitch 8000, ENDX bit 0 clear, set: 935,23966
+S4 pitch FFFF, ENDX bit 0 clear, set: 929,23966
+S1 pitch 0100, ENDX bit 0 clear, set: 927,200595
+S1 pitch 0001, ENDX bit 0 clear, set: 879,0
+S1 pitch 0000, ENDX bit 0 clear, set: 57,0
+S4+8 pitch 1000, ENDX bit 0 clear, set: 57,68487
+ENDX low FFFF, write 0000h reads 0000, then: 11886:FFFE 19522:FFFF
+ENDX write 5555h reads 5555, then: 476:0000 7391:FFFE 15057:FFFF
+ENDX high 00FF
+L (loop start at block 1), repeat was 4000: right after KON 4000, then: 18812:4082
+S4 (loop start at block 0), repeat was 4100: right after KON 4100, then: 1890:4060
+M (End+Mute at block 1), repeat 4100: ENDX set at 38166:0001, level then 0000, repeat 4100
+M, level from 20000 cycles after KON: 37967:0000
+L, repeat 40E0 written 2000 cycles after KON (reads 40E0), 150000 later: 4082
+L, repeat 40E0 written 200000 cycles after KON (reads 40E0), 200000 later: 40E0, 400000 later: 40E0
+Start written during play reads 4020
+Done.
+```
+
+10IRQ.txt:
+
+```
+===== 10 IRQ SPU IRQ9 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+Voice 0 keyed on, IRQ address as shown, cycles from KON to SPUSTAT bit 6 and to
+I_STAT bit 9 (0 = not within the limit). S4 at 4060h, four blocks of 10h bytes.
+S4 pitch 1000 IRQ 4060: SPUSTAT.6 at 2047, I_STAT.9 at 1780
+S4 pitch 1000 IRQ 4061: SPUSTAT.6 at 6453, I_STAT.9 at 6254
+S4 pitch 1000 IRQ 4062: SPUSTAT.6 at 311, I_STAT.9 at 44
+S4 pitch 1000 IRQ 4064: SPUSTAT.6 at 40237, I_STAT.9 at 39975
+S4 pitch 1000 IRQ 4065: SPUSTAT.6 at 49488, I_STAT.9 at 49289
+S4 pitch 1000 IRQ 4066: SPUSTAT.6 at 315, I_STAT.9 at 116
+S4 pitch 0400 IRQ 4064: SPUSTAT.6 at 150837, I_STAT.9 at 150638
+S4 pitch 4000 IRQ 4064: SPUSTAT.6 at 322, I_STAT.9 at 123
+S4 noise pitch 1000 IRQ 4064: SPUSTAT.6 at 40254, I_STAT.9 at 40055
+S4 pitch 0000 IRQ 4064: SPUSTAT.6 at 0, I_STAT.9 at 0
+M (End+Mute at block 1) with the repeat address set before KON to P (4100h):
+M, IRQ at P pitch 1000 IRQ 4100: SPUSTAT.6 at 40180, I_STAT.9 at 39981
+M, repeat P, IRQ at M block 0, IRQ 40A0, hits: 1656 3156 4704 6240 7776; SPUSTAT.6 read 0 after the first acknowledge (cycles from KON): 2380:0000
+S1 released 100000 cycles before, level 0000, IRQ at S1: SPUSTAT.6 at 159
+S1 looping, IRQ 4020, hits: 618 2157 3702 5238 6774; SPUSTAT.6 read 0 after the first acknowledge (cycles from KON): 1378:0000
+S4 looping, IRQ 4064, hits: 41453 42990 44535 46071 47607; SPUSTAT.6 read 0 after the first acknowledge (cycles from KON): 42211:0000
+Manual writes of k halfwords from 61FF (8 bytes before the IRQ address 6200):
+ k=1 SPUSTAT.6 0 I_STAT.9 0 k=2 SPUSTAT.6 0 I_STAT.9 0 k=3 SPUSTAT.6 0 I_STAT.9 0 k=4 SPUSTAT.6 1 I_STAT.9 1
+ k=5 SPUSTAT.6 1 I_STAT.9 1 k=6 SPUSTAT.6 1 I_STAT.9 1 k=7 SPUSTAT.6 1 I_STAT.9 1 k=8 SPUSTAT.6 1 I_STAT.9 1
+DMA write 64 bytes from 32 before the IRQ address: SPUSTAT.6 0
+DMA write 64 bytes ending just before it: SPUSTAT.6 0
+DMA write 64 bytes from 8 after it: SPUSTAT.6 0
+DMA read 64 bytes from 32 before it: SPUSTAT.6 1
+DMA read 64 bytes ending just before it: SPUSTAT.6 1
+DMA write over it with IRQ9 enable clear, then enabled: SPUSTAT.6 0
+IRQ address write 1234h reads 1234
+Done.
+```
+
+11CAP.txt:
+
+```
+===== 11 CAP SPU CAPTURE TIMING | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+SPUSTAT bit 11 (spx:716, :723-725) over 1.2 million cycles; then capture IRQs
+(spx:848-856), timed from a rise of bit 11, with bit 11 at each hit (h/l).
+Transfer control 0004, SPUSTAT bit 11 changes: 61276:0000 257840:0800 454492:0000 651076:0800 847664:0000 1044316:0800
+Transfer control 0000, SPUSTAT bit 11 changes: none
+Transfer control 0008, SPUSTAT bit 11 changes: 153966:0800 350618:0000 547202:0800 743790:0000 940442:0800 1137026:0000
+Transfer control 000C, SPUSTAT bit 11 changes: none
+Transfer control 0002, SPUSTAT bit 11 changes: none
+IRQ 0000, transfer control 0004, from bit 11 rising, hits: 69786l 463002l 856218l 1249434l
+IRQ 0040, transfer control 0004, from bit 11 rising, hits: 393144h 786326h 1179576h 1572758h
+IRQ 0080, transfer control 0004, from bit 11 rising, hits: 196511l 589761l 982943l 1376193l
+IRQ 00C0, transfer control 0004, from bit 11 rising, hits: 393124h 786306h 1179556h 1572738h
+IRQ 0100, transfer control 0004, from bit 11 rising, hits: 196536l 589718l 982968l 1376150l
+IRQ 0180, transfer control 0004, from bit 11 rising, hits: 196463l 589713l 982895l 1376145l
+IRQ 01FF, transfer control 0004, from bit 11 rising, hits: 193483h 586675h 979881h 1373097h
+IRQ 0001, transfer control 0004, from bit 11 rising, hits: 199569l 592785l 986001l 1379217l
+IRQ 0100, transfer control 0000, from bit 11 rising (no rise seen), hits: none
+IRQ 0100, transfer control 0008, from bit 11 rising, hits: none
+IRQ 0200, transfer control 0004, from bit 11 rising, hits: none
+Done.
+```
+
+12VCP.txt:
+
+```
+===== 12 VCP SPU CAPTURE NOISE | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+The first half (256 samples) of a capture buffer, read by DMA right after SPUSTAT
+bit 11 rises. Tone T: block 0 shift 4 filter 0 nibbles 0..F, block 1 shift 4
+filter 1, looped. ADSR held at 7FFFh unless shown. Volumes 0, main volume 0.
+Voice 1 T pitch 1000h, 255 changes in 256:
+ 01FD 027C 02FC 024B FD30 FC83 FD03 FD88 FE28 FEC5 FF57 FFE1 0062 00DB 014C 01B7
+ 021B 0278 02D0 0322 036F 0392 02FE 024F 01AA 010F 007E FFF7 FF78 FF01 FE91 FE29
+ FDC7 FD6A FD14 FD4A FF98 007E 00FE 017D 01FD 027C 02FC 024B FD30 FC83 FD03 FD82
+ FE01 FE81 FF00 FF80 FFFF 007E 00FE 017D 01FD 027C 02FC 024B FD30 FC83 FD03 FD88
+Voice 1 T pitch 0800h, 255 changes in 256:
+ FD42 FD82 FDC2 FE01 FE41 FE81 FEC1 FF00 FF40 FF80 FFC0 FFFF 003F 007E 00BE 00FE
+ 013E 017D 01BD 01FD 023C 027C 02BC 02FC 0321 024B FFBC FD30 FC5D FC83 FCC2 FD03
+Voice 1 T pitch 2000h, 255 changes in 256:
+ FD4A 007E 017D 027C 024B FC83 FD82 FE81 FF80 007E 017D 027C 024B FC83 FD88 FEC5
+ FFE1 00DB 01B7 0278 0322 0392 024F 010F FFF7 FF01 FE29 FD6A FD4A 007E 017D 027C
+Voice 1 T pitch 1000h, ADSR decayed to sustain level 7, 255 changes in 256:
+ FF98 007E 00FE 017D 01FD 027C 02FC 024B FD30 FC83 FD03 FD82 FE01 FE81 FF00 FF80
+ FFFF 007E 00FE 017D 01FD 027C 02FC 024B FD30 FC83 FD03 FD88 FE28 FEC5 FF57 FFE1
+Its level 3FFF
+Voice 1 released, 0 changes in 256:
+ 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
+Voice 3 T pitch 1000h, 255 changes in 256:
+ 036F 0392 02FE 024F 01AA 010F 007E FFF7 FF78 FF01 FE91 FE29 FDC7 FD6A FD14 FD4A
+ FF98 007E 00FE 017D 01FD 027C 02FC 024B FD30 FC83 FD03 FD82 FE01 FE81 FF00 FF80
+CD left, no CD playing, 0 changes in 256:
+ 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
+CD right, 0 changes in 256:
+ 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
+Noise (spx:680-696): voice 1 noise mode, SPUCNT noise shift and step as shown.
+Noise shift 15 step 3, 255 changes in 256:
+ 2410 C823 1046 208C C11C 0236 046D 08DB 11B7 236F C6E1 0DC1 1B84 3708 EE13 DC28
+ 384E F09E E13C C278 04F0 09E0 13C1 2783 CF09 1E11 3C22 F846 F08D E11B C236 046C
+Noise shift 15 step 0, 255 changes in 256:
+ 2ED5 DDAC 3B57 F6B0 ED61 DAC2 3583 EB08 D610 2C1F D841 3080 E103 C207 040E 081C
+ 1039 2073 C0EA 01D2 03A6 074C 0E9A 1D34 3A69 F4D5 E9AB D358 26AE CD60 1ABE 357D
+Noise shift 14 step 0, 128 changes in 256:
+ 2196 C330 C330 065F 065F 0CBF 0CBF 197F 197F 32FE 32FE E5FE E5FE CBFD CBFD 17F8
+ 17F8 2FF1 2FF1 DFE5 DFE5 3FC9 3FC9 FF95 FF95 FF2A FF2A FE55 FE55 FCAB FCAB F957
+Noise shift 12 step 0, 31 changes in 256:
+ 2DBE 2DBE 2DBE 2DBE 2DBE 2DBE 2DBE 2DBE DB80 DB80 DB80 DB80 DB80 DB80 DB80 DB80
+ 36FE 36FE 36FE 36FE 36FE 36FE 36FE 36FE EDFE EDFE EDFE EDFE EDFE EDFE EDFE EDFE
+Noise shift 10 step 0, 8 changes in 256:
+ C30C C30C C30C C30C C30C C30C C30C C30C C30C C30C C30C C30C C30C C30C C30C C30C
+ C30C C30C C30C C30C C30C C30C C30C C30C C30C C30C C30C C30C 0618 0618 0618 0618
+Noise shift 8 step 0, 2 changes in 256:
+ C75E C75E C75E C75E C75E C75E C75E C75E C75E C75E C75E C75E 0EBA 0EBA 0EBA 0EBA
+ 0EBA 0EBA 0EBA 0EBA 0EBA 0EBA 0EBA 0EBA 0EBA 0EBA 0EBA 0EBA 0EBA 0EBA 0EBA 0EBA
+Noise shift 4 step 0, 0 changes in 256:
+ 3AEB 3AEB 3AEB 3AEB 3AEB 3AEB 3AEB 3AEB 3AEB 3AEB 3AEB 3AEB 3AEB 3AEB 3AEB 3AEB
+ 3AEB 3AEB 3AEB 3AEB 3AEB 3AEB 3AEB 3AEB 3AEB 3AEB 3AEB 3AEB 3AEB 3AEB 3AEB 3AEB
+Done.
+```
+
+13XFR.txt:
+
+```
+===== 13 XFR SPU TRANSFERS | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+Scratch at 30000h (6000h), filled with EEEEh before each row, read back by DMA
+with transfer control 0004h. Halfwords written: A000h, A001h, ...
+Transfer address write 6000h reads 6000, after 8 manual 6000, after DMA 6000
+Fifo 1DA8h reads A007 A007
+4 manual, then 4 more (A008h..) with no new address: A000 A001 A002 A003 A008 A009 A00A A00B EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+4 manual, then 4 written to the Fifo in Manual Write mode: A000 A001 A002 A003 EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+40 halfwords into the Fifo (32 deep, spx:741): A000 A001 A002 A003 A004 A005 A006 A007 A008 A009 A00A A00B A00C A00D A00E A00F A010 A011 A012 A013 A014 A015 A016 A017 A018 A019 A01A A01B A01C A01D A01E A01F EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+Type 0 manual 8: A007 EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+Type 1 manual 8: A007 EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+Type 2 manual 8: A000 A001 A002 A003 A004 A005 A006 A007 EEEE EEEE
+Type 3 manual 8: A000 A002 A004 A006 EEEE EEEE EEEE EEEE EEEE EEEE
+Type 4 manual 8: A003 A007 EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+Type 5 manual 8: A006 EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+Type 6 manual 8: A007 EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+Type 7 manual 8: A007 EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+Type 3 DMA write of B000h, B001h, ..: B000 B002 B004 EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+Type 3 DMA read of C000h, C001h, ..: C000 0000 C001 0000 C002 0000 C003 0000 C004 FFFF C005 FFFF EEEE FFFF EEEE 0000 EEEE 0000 EEEE 0000
+Type 4 DMA read of C000h, C001h, ..: C000 C000 C000 C000 C001 C001 C001 C001 C002 C002 C002 C002 C003 C003 C003 C003 C004 C004 C004 C004
+Type 5 DMA read of C000h, C001h, ..: C000 0000 C000 0000 C000 0000 C000 0000 C001 0000 C001 0000 C001 0000 C001 0000 C002 0000 C002 FFFF
+Manual Write of 1, SPUSTAT (bit 11 masked) was 0000, from the SPUCNT write: 744:0010
+Manual Write of 4, SPUSTAT (bit 11 masked) was 0000, from the SPUCNT write: 314:0010
+Manual Write of 16, SPUSTAT (bit 11 masked) was 0000, from the SPUCNT write: 196:0410 998:0010
+1F801014h 200931E1h, DMA read 128 bytes of D000h..:
+ FFFF D000 D001 D002 D003 D004 A005 A006 A007 A008 A009 A00A A00B A00C A00D A00E
+ A00F EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+ FFFF EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+1F801014h 200931E1h, DMA read 128 bytes of D000h..:
+ FFFF D000 D001 D002 D003 D004 A005 A006 A007 A008 A009 A00A A00B A00C A00D A00E
+ A00F EEEE FFFF EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+ FFFF EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+Done.
+```
+
+14REG.txt:
+
+```
+===== 14 REG SPU REGISTERS | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+1DBCh-1DBFh and 1E60h-1E7Fh (spx:1108-1121), written and read back, put back.
+1DBCh DFFF F7FF, 1E60h..: F5FF F3FF BFFF 38DF 74BB FFEE BFF7 FFEF FFFF FD7D 6EFF 33B3 FC7F FFFF BFFF 7D8F
+Unknown 1DBC: was DFFF, write 1234 reads 1234
+Unknown 1DBE: was F7FF, write FEDC reads FEDC
+1E60h.. written inverted, reads: 0A00 0C00 4000 C720 8B44 0011 4008 0010 0000 0282 9100 CC4C 0380 0000 4000 8270
+Unknown 1DA0h 1DA0: was AC00, write 5A5A reads 5A5A
+Voice 5 registers written FFFFh:
+ volume L 1C50: was 0000, write 7FFF reads 7FFF
+ volume L sweep 1C50: was 0000, write FFFF reads FFFF
+ pitch 1C54: was 1000, write FFFF reads FFFF
+ start 1C56: was 4000, write FFFF reads FFFF
+ ADSR low 1C58: was 000F, write FFFF reads FFFF
+ ADSR high 1C5A: was 1FC0, write FFFF reads FFFF
+ repeat 1C5E: was 4000, write FFFF reads FFFF
+Voice flag registers (bits 24-31 not used, spx:660, :666, :683; PMON bit 0 :382):
+ PMON low 1D90: was 0000, write FFFF reads FFFF
+ PMON high 1D92: was 0000, write FFFF reads FFFF
+ NON high 1D96: was 0000, write FFFF reads FFFF
+ EON high 1D9A: was 0000, write FFFF reads FFFF
+ ENDX high 1D9E: was 00FF, write FFFF reads FFFF
+ CD volume L 1DB0: was 7FFF, write 8765 reads 8765
+ extern volume R 1DB6: was 0000, write 8765 reads 8765
+ reverb volume L 1D84: was 0000, write 8001 reads 8001
+ mBASE 1DA2: was FFFE, write 1234 reads 1234
+Main volume L sweep A020 reads A020, current main volume 1DB8h 0000 0000
+32-bit stores to 1C58h, 32 tries: low half wrong 6, high half wrong 0
+1C58h lw 1357ABCD, lbu 1C58h CD 1C59h AB 1C5Ah 57
+sb 12345678h to 1C54h: 5678; to 1C55h over 1111h: 1111
+Done.
+```
+
+15UNU.txt:
+
+```
+===== 15 UNU SPU UNUSED 1E80 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+Halfword reads of 1F801E80h..1F801FFEh; lbu and lw of 1F801E80h last.
+
+192 of 192 read FFFFh
+lbu 1E80h: FF
+lw 1E80h: FFFFFFFF
+lw 1E7Ch: 7D8FBFFF
+Done.
+```
+
+### Run 5501a-card-g on 27 September 2026
+
+Raw output: [00RUN.txt](/tests/raw/20260927T0000Z-5501a-card-g/spuenv/00RUN.txt) · [01STA.txt](/tests/raw/20260927T0000Z-5501a-card-g/spuenv/01STA.txt) · [02CNT.txt](/tests/raw/20260927T0000Z-5501a-card-g/spuenv/02CNT.txt) · [03KON.txt](/tests/raw/20260927T0000Z-5501a-card-g/spuenv/03KON.txt) · [04ATK.txt](/tests/raw/20260927T0000Z-5501a-card-g/spuenv/04ATK.txt) · [05DEC.txt](/tests/raw/20260927T0000Z-5501a-card-g/spuenv/05DEC.txt) · [06SUS.txt](/tests/raw/20260927T0000Z-5501a-card-g/spuenv/06SUS.txt) · [07REL.txt](/tests/raw/20260927T0000Z-5501a-card-g/spuenv/07REL.txt) · [08SWP.txt](/tests/raw/20260927T0000Z-5501a-card-g/spuenv/08SWP.txt) · [09END.txt](/tests/raw/20260927T0000Z-5501a-card-g/spuenv/09END.txt) · [10IRQ.txt](/tests/raw/20260927T0000Z-5501a-card-g/spuenv/10IRQ.txt) · [11CAP.txt](/tests/raw/20260927T0000Z-5501a-card-g/spuenv/11CAP.txt) · [12VCP.txt](/tests/raw/20260927T0000Z-5501a-card-g/spuenv/12VCP.txt) · [13XFR.txt](/tests/raw/20260927T0000Z-5501a-card-g/spuenv/13XFR.txt) · [14REG.txt](/tests/raw/20260927T0000Z-5501a-card-g/spuenv/14REG.txt) · [15UNU.txt](/tests/raw/20260927T0000Z-5501a-card-g/spuenv/15UNU.txt)
+
+00RUN.txt:
+
+```
+===== 00 RUN | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+15 tests
+A chain program, linked at 80100000
+Saved on the card in slot 2, from image 1
+COP0 at start: BPC 00000000 BDA 00000000 TAR BFC02BAC DCIC 00000000 BadVaddr 00000480 BDAM 00000000
+BPCM 00000000 SR 40000000 Cause 00000020 EPC 8001D338 PRId 00000002
+```
+
+01STA.txt:
+
+```
+===== 01 STA SPU STATE AT ENTRY | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+SPU registers as this program found them, nothing written first.
+1DA8h, the transfer Fifo, is not read (shown ----).
+1C00: 0000 0000 0400 0C28 8088 DFF1 0000 14C4 0000 0000 0407 0C28 8087 DFF1 0000 14C4
+1C20: 0000 0000 0800 0C28 8088 DFF1 0000 14C4 0000 0000 080E 0C28 8087 DFF1 0000 14C4
+1C40: 0000 0000 08FA 0200 8C7A DFED 0000 034C 0000 0000 090B 0200 8C7A DFED 0000 034C
+1C60: 0000 0000 02AB 0C28 8088 DFF1 0000 14C4 0000 0000 02B0 0C28 8087 DFF1 0000 14C4
+1C80: 0000 0000 0A14 0200 8C7A DFED 0000 034C 0000 0000 0A27 0200 8C7A DFED 0000 034C
+1CA0: 0000 0000 0BFC 0200 8C7A DFED 0000 034C 0000 0000 0C12 0200 8C7A DFED 0000 034C
+1CC0: 0000 0000 08FA 0200 8C7A DFED 0000 034C 0000 0000 090B 0200 8C7A DFED 0000 034C
+1CE0: 0000 0000 0A14 0200 8C7A DFED 0000 034C 0000 0000 0A27 0200 8C7A DFED 0000 034C
+1D00: 0000 0000 0BFC 0200 8C7A DFED 0000 034C 0000 0000 0C12 0200 8C7A DFED 0000 034C
+1D20: 0000 0000 0556 0C28 8088 DFF1 0000 14C4 0000 0000 0560 0C28 8087 DFF1 0000 14C4
+1D40: 0000 0000 0A14 0200 8C7A DFED 0000 034C 0000 0000 0A27 0200 8C7A DFED 0000 034C
+1D60: 0000 0000 3FFF 0200 0000 0000 0000 0200 0000 0000 3FFF 0200 0000 0000 0000 0200
+1D80: 0000 0000 0000 0000 0000 0000 FFFF FFFF 0000 0000 0000 0000 FFFF 003F FFFF 00FF
+1DA0: AC00 E128 FFFE 0200 ---- C085 0004 0805 7FFF 7FFF 0000 0000 0000 0000 DFFF F7FF
+1DC0: 033D 0231 7E00 5000 B400 B000 4C00 B000 6000 5400 1ED6 1A31 1D14 183B 1BC2 16B2
+1DE0: 1A32 15EF 15EE 1055 1334 0F2D 11F6 0C5D 1056 0AE1 0AE0 07A2 0464 0232 8000 8000
+1E00: 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
+1E20: 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
+1E40: 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
+1E60: F5FF F3FF BFFF 29DF 74BB FFFE BFF7 FFFF FFFF FDFD 6EFF 3BB3 FC7F FFFF BFFF 7D8F
+1DA0h read 16 times in a row: AC00 AC00 AC00 AC00 AC00 AC00 AC00 AC00 AC00 AC00 0100 0100 0100 AC00 AC00 AC00
+1DA0h read 16 times 100000 cycles apart: AC00 AC00 AC00 AC00 AC00 0100 AC00 AC00 AC00 0100 AC00 AC00 AC00 0100 AC00 AC00
+SPUSTAT read 16 times 5000 cycles apart: 0005 0005 0005 0005 0005 0005 0005 0005 0005 0005 0005 0005 0005 0005 0005 0005
+SPU_DELAY 1F801014h: 200931E1
+Done.
+```
+
+02CNT.txt:
+
+```
+===== 02 CNT SPU SPUCNT TO STAT | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+SPUSTAT 5-0 is SPUCNT 5-0 applied a bit delayed (spx:726); bit 7 is like SPUCNT
+bit 5 (spx:721); DMA read sets 9 and 7 late (spx:727-729). Times from the SPUCNT
+write, cycles:value, for 20000 cycles or six changes; bit 11 (capture half) masked
+out. Transfer address 30000h.
+SPUCNT 8000 to 8010, SPUSTAT was 0000, changes: 642:0010
+SPUCNT 8010 to 8000, SPUSTAT was 0010, changes: 593:0000
+SPUCNT 8000 to 8020, SPUSTAT was 0000, changes: 759:02A0
+SPUCNT 8020 to 8000, SPUSTAT was 02A0, changes: 409:0000
+SPUCNT 8000 to 8030, SPUSTAT was 0000, changes: 63:0030 1621:01B0
+SPUCNT 8030 to 8000, SPUSTAT was 01B0, changes: 293:0000
+SPUCNT 8000 to 8001, SPUSTAT was 0000, changes: 645:0001
+SPUCNT 8001 to 8000, SPUSTAT was 0001, changes: 702:0000
+SPUCNT 8000 to 8002, SPUSTAT was 0000, changes: 707:0002
+SPUCNT 8002 to 8000, SPUSTAT was 0002, changes: 702:0000
+SPUCNT 8000 to 8004, SPUSTAT was 0000, changes: 758:0004
+SPUCNT 8004 to 8000, SPUSTAT was 0004, changes: 760:0000
+SPUCNT 8000 to 8008, SPUSTAT was 0000, changes: 61:0008
+SPUCNT 8008 to 8000, SPUSTAT was 0008, changes: 295:0000
+SPUCNT 8000 to 803F, SPUSTAT was 0000, changes: 293:003F 1848:01BF
+SPUCNT 803F to 8000, SPUSTAT was 01BF, changes: 293:0000
+SPUCNT 8000 to 8040, SPUSTAT was 0000, changes: none
+SPUCNT 8040 to 8000, SPUSTAT was 0000, changes: none
+SPUCNT 8000 to 8100, SPUSTAT was 0000, changes: none
+SPUCNT 8100 to 8000, SPUSTAT was 0000, changes: none
+SPUCNT 8000 to BC00, SPUSTAT was 0000, changes: none
+SPUCNT BC00 to 8000, SPUSTAT was 0000, changes: none
+SPUCNT 8000 to 0000, SPUSTAT was 0000, changes: none
+SPUCNT 0000 to 8000, SPUSTAT was 0000, changes: none
+SPUCNT 8010 to 8020, SPUSTAT was 0010, changes: 592:02A0
+SPUCNT 8020 to 8030, SPUSTAT was 02A0, changes: 409:00B0 1212:01B0
+SPUCNT 8030 to 8010, SPUSTAT was 01B0, changes: 61:0010
+SPUCNT 8000h to 8010h, cycles until SPUSTAT 5-0 = 10h, 8 times: 328 257 142 143 722 666 550 431
+SPUCNT write BF00h reads BF00 at once, BF00 after 3000 cycles
+SPUSTAT was 0000, write FFFFh reads FFFF at once, then: 631:0000
+SPUSTAT write 0000h reads 0000 at once, then: none
+Transfer control write FFFFh reads FFFF, write 0004h reads 0004
+Done.
+```
+
+03KON.txt:
+
+```
+===== 03 KON SPU KEY ON OFF | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+Voice 0, silent loop at 20000h, pitch 1000h. Cycles from the write.
+KON to the first level change (attack linear shift 0 step 0): 5308 4519 4460 4343 4238 4176 4109 3934
+KON to the second change: 6056 5287 5228 5109 5004 4943 4875 4700
+KOFF at 7FFFh to the first change (release linear shift 0): 69 39 39 39 39 39 39 39
+KON again at 3FFF, level: 1162:0000 5012:3800 5760:7000 6504:7FFF 7306:3FFF
+KON again at 3FFF, level: 1588:0000 5418:3800 6160:7000 6963:7FFF 7712:3FFF
+KON again at 3FFF, level: 366:0000 4247:3800 4989:7000 5792:7FFF 6541:3FFF
+KON again at 3FFF, level: 774:0000 4658:3800 5406:7000 6150:7FFF 6952:3FFF
+Attack linear shift 10: KON again at 2354, level: 399:2362 1142:0000 5025:000E 5773:001C 6517:002A 7319:0038
+KON then KOFF back to back, level: 4387:3800 5188:7000 5937:7FFF 6681:3FFF
+At 7FFFh, KOFF then KON back to back, level: 125:3FFF 1514:0000 5344:3800 6146:7000 6888:7FFF 7691:3FFF
+KON write 0001h reads 0001 (high 0000), 0001 after 5000; KOFF 0001h reads 0001 (high 0000); KON high FF00h reads FF00
+KOFF high FF00h reads FF00
+SPUCNT 0000h, KON attack linear shift 8, level: none
+then SPUCNT 8000h (level was 0000), level: none ENDX low FFFF
+At 7FFFh, SPUCNT to 0000h, level: 81:3FFF 446:0000
+then SPUCNT 8000h (level was 0000), level: none
+Sustain never stepping at 7FFFh, write level 1234h: reads 1234, then: none
+Sustain linear increase shift 8, write level 1234h: reads 1234, then: 269:4A34 1074:7FFF 1818:3FFF 2621:4037 3370:406F 4114:40A7
+Voice released to 0, write level 1234h: reads 1234, then: 617:D234 1418:0000
+Voice 5, released, write level 8123h: reads 8123
+Done.
+```
+
+04ATK.txt:
+
+```
+===== 04 ATK SPU ADSR ATTACK | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+Attack: voice 0, ADSR low as shown (decay 0, sustain level Fh), sustain never
+stepping. Level changes cycles:value from KON, the first rise above 6000h, the time
+it reached 7FFFh, then eight readings.
+Lin sh00 st0 (000F): 5205:3800 5974:7000 6771:7FFF | >6000 5974:7000 | end 6771
+ every 2500: 0000 0000 - - - - - -
+Lin sh00 st1 (010F): 4350:3000 5142:6000 5887:7FFF | >6000 5887:7FFF | end 5887
+ every 2500: 0000 3000 - - - - - -
+Lin sh00 st2 (020F): 4364:2800 5156:5000 5901:7800 6693:7FFF | >6000 5901:7800 | end 6693
+ every 2500: 0000 2800 - - - - - -
+Lin sh00 st3 (030F): 4348:2000 5140:4000 5885:6000 6639:7FFF | >6000 6639:7FFF | end 6639
+ every 2500: 0000 2000 - - - - - -
+Lin sh02 st0 (080F): 4414:0E00 5233:1C00 5990:2A00 6740:3800 | >6000 9011:6200 | end 11357
+ every 5000: 0E00 7000 - - - - - -
+Lin sh05 st0 (140F): 4405:01C0 5174:0380 5922:0540 6677:0700 | >6000 45851:6040 | end 60453
+ every 25000: 2F40 6900 - - - - - -
+Lin sh08 st0 (200F): 4410:0038 5184:0070 5929:00A8 6683:00E0 | >6000 340807:6008 | end 453704
+ every 100000: 1B58 37C8 5470 70E0 - - - -
+Lin sh10 st0 (280F): 4405:000E 5174:001C 5922:002A 6677:0038 | >6000 1352270:6008 | end 1801477
+ every 300000: 151C 2A70 3FD2 5526 6A88 7FEA - -
+Lin sh11 st0 (2C0F): 4419:0007 5193:000E 5951:0015 6701:001C | >6000 2700088:6001 | end 3598600
+ every 500000: 11AA 2377 3544 4711 58DE 6AAB 7C78 -
+Lin sh11 st3 (2F0F): 4402:0004 5076:0008 5926:000C 6676:0010 | >6000 4722975:6004 | end 6295041
+ every 1000000: 1444 289C 3CF4 514C 65A4 79FC - -
+Lin sh12 st0 (300F): 5217:0007 6691:000E 8245:0015 9799:001C | >6000 5396489:6001 | end 7193601
+ every 1000000: 11B8 2385 3552 471F 58EC 6AB9 7C86 -
+Lin sh13 st0 (340F): 4405:0007 7489:000E 10549:0015 13613:001C | >6000 - | end -
+ every 1000000: 08E3 11C6 1AB0 2393 2C7D 3560 3E4A 472D
+Lin sh14 st0 (380F): 9739:0007 15935:000E 22027:0015 28204:001C | >6000 - | end -
+ every 1000000: 046E 08DC 0D51 11C6 163B 1AA9 1F1E 2393
+Lin sh16 st0 (400F): 7436:0007 32049:000E 56632:0015 81219:001C | >6000 - | end -
+ every 1000000: 011F 023E 0356 0475 0594 06AC 07CB 08EA
+Lin sh20 st0 (500F): 38211:0007 431416:000E 824588:0015 1217804:001C | >6000 - | end -
+ every 1000000: 0015 0023 0038 004D 005B 0070 007E 0093
+Lin sh24 st0 (600F): 3962633:0007 10254153:000E | >6000 - | end -
+ every 2000000: 0000 0007 0007 0007 0007 000E 000E 000E
+Lin sh26 st2 (6A0F): 16212234:0005 | >6000 - | end -
+ every 4250000: 0000 0000 0000 0005 0005 0005 0005 0005
+Lin sh29 st2 (760F): 7320307:0005 32486171:000A | >6000 - | end -
+ every 4250000: 0000 0005 0005 0005 0005 0005 0005 000A
+Lin sh31 st2 (7E0F): 23589663:0005 | >6000 - | end -
+ every 4250000: 0000 0000 0000 0000 0000 0005 0005 0005
+Lin sh31 st3 (7F0F): none | >6000 - | end -
+ every 2500000: 0000 0000 0000 0000 0000 0000 0000 0000
+Exp sh00 st0 (800F): 4464:3800 5161:7000 5958:7E00 6717:7FFF | >6000 5161:7000 | end 6717
+ every 2500: 0000 3800 - - - - - -
+Exp sh04 st0 (900F): 4413:0380 5195:0700 5945:0A80 6691:0E00 | >6000 25206:6200 | end 52055
+ every 25000: 5E80 7E00 - - - - - -
+Exp sh08 st0 (A00F): 4320:0038 5095:0070 5850:00A8 6695:00E0 | >6000 340704:6008 | end 790005
+ every 200000: 37C8 643E 7276 - - - - -
+Exp sh09 st0 (A40F): 4423:001C 5202:0038 5952:0054 6697:0070 | >6000 677908:6008 | end 1575728
+ every 375000: 34D4 629A 6FF2 7D4A - - - -
+Exp sh10 st0 (A80F): 4428:000E 5202:001C 5947:002A 6701:0038 | >6000 1352230:6008 | end 3147818
+ every 750000: 351A 62A8 7000 7D58 - - - -
+Exp sh11 st0 (AC0F): 4361:0007 5158:000E 5931:0015 6704:001C | >6000 2700048:6001 | end 6294347
+ every 1500000: 3544 62A8 7000 7D5F - - - -
+Exp sh12 st0 (B00F): 5193:0007 6723:000E 8241:0015 9745:001C | >6000 5396511:6001 | end 12579614
+ every 2000000: 2385 471F 62B6 6B99 7483 7D66 - -
+Exp sh14 st0 (B80F): 5938:0007 12082:000E 18186:0015 24406:001C | >6000 - | end -
+ every 2000000: 08E3 11CD 1AB0 239A 2C7D 3567 3E4A 4734
+Done.
+```
+
+05DEC.txt:
+
+```
+===== 05 DEC SPU ADSR DECAY | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+Decay: voice 0, attack linear shift 0 step 0, decay shift and sustain level as
+shown, sustain never stepping. Changes from KON, the first fall to (SL+1)*800h or
+below (spx:540), then eight readings: where the level stops is the sustain level.
+Dec 00 SL 0 (0000): 4692:3800 5524:7000 6294:7FFF 7062:3FFF | <=SL 9282:07FF | end -
+ every 5000: 3800 07FF 07FF 07FF 07FF 07FF 07FF 07FF
+Dec 00 SL 3 (0003): 4341:3800 5184:7000 5949:7FFF 6708:3FFF | <=SL 7467:1FFF | end -
+ every 5000: 3800 1FFF 1FFF 1FFF 1FFF 1FFF 1FFF 1FFF
+Dec 00 SL 7 (0007): 4342:3800 5192:7000 5958:7FFF 6726:3FFF | <=SL 6726:3FFF | end -
+ every 5000: 3800 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Dec 00 SL B (000B): 4449:3800 5201:7000 5975:7FFF 6743:3FFF | <=SL 6743:3FFF | end -
+ every 5000: 3800 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Dec 00 SL E (000E): 4449:3800 5201:7000 5977:7FFF 6743:3FFF | <=SL 6743:3FFF | end -
+ every 5000: 3800 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Dec 00 SL F (000F): 4449:3800 5201:7000 5977:7FFF 6753:3FFF | <=SL - | end -
+ every 5000: 3800 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Dec 02 SL 7 (0027): 4342:3800 5142:7000 5908:7FFF 6667:6FFF | <=SL 10548:3971 | end -
+ every 12500: 3971 3971 3971 3971 3971 3971 3971 3971
+Dec 04 SL 7 (0047): 4345:3800 5141:7000 5900:7FFF 6659:7BFF | <=SL 22784:3FA2 | end -
+ every 25000: 3FA2 3FA2 3FA2 3FA2 3FA2 3FA2 3FA2 3FA2
+Dec 06 SL 7 (0067): 4451:3800 5148:7000 5907:7FFF 6768:7EFF | <=SL 74287:3F8E | end -
+ every 75000: 3F8E 3F8E 3F8E 3F8E 3F8E 3F8E 3F8E 3F8E
+Dec 08 SL 0 (0080): 4352:3800 5134:7000 5894:7FFF 6653:7FBF | <=SL 1051108:07FE | end -
+ every 250000: 446A 23B3 1268 094D 07FE 07FE 07FE 07FE
+Dec 08 SL 7 (0087): 4342:3800 5142:7000 5908:7FFF 6667:7FBF | <=SL 275435:3FF1 | end -
+ every 200000: 4DD1 3FF1 3FF1 3FF1 3FF1 3FF1 3FF1 3FF1
+Dec 08 SL F (008F): 4342:3800 5142:7000 5918:7FFF 6691:7FBF | <=SL - | end -
+ every 50000: 7FBF 7FBF 7FBF 7FBF 7FBF 7FBF 7FBF 7FBF
+Dec 10 SL 7 (00A7): 5182:3800 5879:7000 6638:7FFF 7499:7FEF | <=SL 1049620:3FFA | end -
+ every 500000: 5C8A 4243 3FFA 3FFA 3FFA 3FFA 3FFA 3FFA
+Dec 11 SL 7 (00B7): 4448:3800 5150:7000 5917:7FFF 6685:7FF7 | <=SL 2001955:3FFF | end -
+ every 1000000: 5B62 400E 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Dec 12 SL 7 (00C7): 4389:3800 5114:7000 5901:7FFF 6688:7FF7 | <=SL 3997187:3FFF | end -
+ every 2000000: 5B4A 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Dec 12 SL 0 (00C0): 4385:3800 5203:7000 5892:7FFF 6684:7FF7 | <=SL 13958208:0800 | end -
+ every 4250000: 3D6F 1BC4 0B13 07FF 07FF 07FF 07FF 07FF
+Dec 13 SL 7 (00D7): 4387:3800 5216:7000 5900:7FFF 7432:7FF7 | <=SL 7988512:3FFF | end -
+ every 2000000: 6C40 5B3E 4CA7 3FFF 3FFF 3FFF 3FFF 3FFF
+Dec 15 SL 7 (00F7): 4385:3800 5212:7000 5893:7FFF 10514:7FF7 | <=SL - | end -
+ every 2000000: 7AEF 75D7 70BF 6C32 67C4 634F 5F04 5B32
+Done.
+```
+
+06SUS.txt:
+
+```
+===== 06 SUS SPU ADSR SUSTAIN | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+Sustain: voice 0, attack linear shift 0 step 0, decay shift 0, sustain level 7
+(4000h), then the sustain as shown. The watch starts at the first reading of 4000h
+or less after 7FFFh ("from"): changes, the first rise above 6000h, the time it
+reached 7FFFh (increase) or 0 (decrease), eight readings. Times from KON.
+Sus lin inc sh00 st0 (0000): 7309:77FF 8028:7FFF | >6000 7309:77FF | end 8028
+ every 2500 from 6470: - - - - - - - -
+Sus lin inc sh04 st0 (0400): 8255:437F 9027:46FF 9777:4A7F 10522:4DFF | >6000 15160:62FF | end 21999
+ every 12500 from 7444: 77FF - - - - - - -
+Sus lin inc sh08 st0 (0800): 8247:4037 9021:406F 9779:40A7 10529:40DF | >6000 120364:6027 | end 232462
+ every 100000 from 7442: 5C6F 78DF - - - - - -
+Sus lin inc sh08 st3 (08C0): 8302:401F 9076:403F 9834:405F 10584:407F | >6000 204848:601F | end 400740
+ every 200000 from 7497: 607F - - - - - - -
+Sus lin inc sh08 st0 b29 (2800): 8251:4037 9020:406F 9770:40A7 10525:40DF | >6000 120355:6027 | end 232553
+ every 100000 from 7450: 5C6F 78DF - - - - - -
+Sus lin inc sh11 st0 (0B00): 8247:4006 9021:400D 9779:4014 10529:401B | >6000 906796:6004 | end 1805308
+ every 500000 from 7442: 51CC 6399 7566 - - - - -
+Sus lin inc sh12 st0 (0C00): 8953:4006 10533:400D 12083:4014 13633:401B | >6000 1806117:6004 | end 3603173
+ every 1000000 from 7442: 51CC 6399 7566 - - - - -
+Sus lin inc sh16 st0 (1000): 23594:4006 48202:400D 72803:4014 97379:401B | >6000 - | end -
+ every 1000000 from 7497: 411E 4236 4355 4474 458C 46AB 47CA 48E2
+Sus lin dec sh00 st0 (4000): 8251:FFFF 8970:0000 | >6000 8251:FFFF | end 8970
+ every 2500 from 7450: - - - - - - - -
+Sus lin dec sh08 st0 (4800): 8379:3FBF 9151:3F7F 9901:3F3F 10646:3EFF | >6000 204161:FFFF | end 204928
+ every 100000 from 7568: 1F7F - - - - - - -
+Sus lin dec sh08 st3 (48C0): 6991:3FD7 7760:3FAF 8510:3F87 9265:3F5F | >6000 321130:FFEF | end 321893
+ every 200000 from 6190: 175F - - - - - - -
+Sus lin dec sh12 st0 (4C00): 7885:3FF7 9465:3FEF 11015:3FE7 12565:3FDF | >6000 3152139:FFFF | end 3152905
+ every 1000000 from 6364: 2BA7 174F 02F7 - - - - -
+Sus exp inc sh08 st0 (8800): 7160:4037 7929:406F 8679:40A7 9434:40DF | >6000 119315:6027 | end 566987
+ every 200000 from 6359: 6655 748D - - - - - -
+Sus exp inc sh10 st0 (8A00): 8242:400D 9011:401B 9759:4029 10514:4037 | >6000 457496:600B | end 2253150
+ every 500000 from 7441: 60EB 69D5 72B8 7BA2 - - - -
+Sus exp inc sh12 st0 (8C00): 9006:4006 10542:400D 12049:4014 13659:401B | >6000 1806137:6004 | end 8992315
+ every 2000000 from 7450: 60EB 69CE 72B8 7B9B - - - -
+Sus exp dec sh00 st0 (C000): 8251:1FFF 9020:0FFF 9770:07FF 10575:03FF | >6000 - | end 18229
+ every 2500 from 7450: 07FF 00FF 001F 0001 - - - -
+Sus exp dec sh08 st0 (C800): 8193:3FDF 8967:3FBF 9725:3F9F 10475:3F7F | >6000 - | end 1601782
+ every 500000 from 7388: 1138 0414 007B - - - - -
+Sus exp dec sh12 st0 (CC00): 8947:3FFB 10475:3FF7 11981:3FF3 13499:3FEF | >6000 - | end 13114035
+ every 2000000 from 7388: 2CBD 1E52 1426 0CFD 07E7 02D1 - -
+Sus lin inc sh31 st3 (1FC0): none | >6000 - | end -
+ every 250000 from 6930: 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Sus lin dec sh31 st3 (5FC0): none | >6000 - | end -
+ every 250000 from 6641: 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Sus exp inc sh31 st3 (9FC0): none | >6000 - | end -
+ every 250000 from 6703: 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Sus exp dec sh31 st3 (DFC0): none | >6000 - | end -
+ every 250000 from 6703: 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Sus lin dec sh31 st2 (5F80): none | >6000 - | end -
+ every 250000 from 6703: 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Done.
+```
+
+07REL.txt:
+
+```
+===== 07 REL SPU ADSR RELEASE | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+Release: voice 0 held at 7FFFh (attack shift 0, sustain level Fh, sustain never
+stepping), then KOFF. Changes from KOFF, the first fall to 4000h, the time it
+reached 0, eight readings.
+Rel lin sh00 (1FC0): 333:3FFF 903:FFFF 1662:0000 | <=4000 333:3FFF | end 1662
+ every 2500: - - - - - - - -
+Rel lin sh04 (1FC4): 298:3FFF 1284:3BFF 2057:37FF 2830:33FF | <=4000 298:3FFF | end 13615
+ every 12500: 03FF - - - - - - -
+Rel lin sh08 (1FC8): 303:3FBF 983:3F7F 1761:3F3F 2537:3EFF | <=4000 303:3FBF | end 196859
+ every 125000: 173F - - - - - - -
+Rel lin sh11 (1FCB): 298:3FF7 871:3FEF 1649:3FE7 2425:3FDF | <=4000 298:3FF7 | end 1572935
+ every 1000000: 1747 - - - - - - -
+Rel lin sh12 (1FCC): 296:3FFF 1486:3FF7 2992:3FEF 4503:3FE7 | <=4000 296:3FFF | end 3146436
+ every 1000000: 2BA7 174F 02F7 - - - - -
+Rel lin sh13 (1FCD): 302:3FFF 3688:3FF7 6760:3FEF 9832:3FE7 | <=4000 302:3FFF | end 6292803
+ every 1000000: 35D7 2BAF 217F 1757 0D27 02FF - -
+Rel lin sh16 (1FD0): 302:3FFF 1392:3FF7 25952:3FEF 50504:3FE7 | <=4000 302:3FFF | end -
+ every 1000000: 3EB7 3D6F 3C27 3AE7 399F 3857 3717 35CF
+Rel exp sh00 (1FE0): 298:3FFF 550:1FFF 1224:0FFF 2000:07FF | <=4000 298:3FFF | end 10429
+ every 2500: 07FF 007F 000F 0001 - - - -
+Rel exp sh04 (1FE4): 303:3FFF 1186:3DFF 1959:3C0F 2732:3A2E | <=4000 303:3FFF | end 165547
+ every 25000: 1722 0857 02E4 0102 0051 0015 - -
+Rel exp sh08 (1FE8): 298:3FDF 867:3FBF 1640:3F9F 2413:3F7F | <=4000 298:3FDF | end 1593681
+ every 375000: 17FA 08A7 02C7 007A - - - -
+Rel exp sh11 (1FEB): 298:3FFF 1536:3FFB 2337:3FF7 3140:3FF3 | <=4000 298:3FFF | end 6554116
+ every 2000000: 1E54 0CFE 02D2 - - - - -
+Rel exp sh12 (1FEC): 294:3FFF 553:3FFB 2016:3FF7 3573:3FF3 | <=4000 294:3FFF | end 13105636
+ every 2000000: 2CBD 1E52 1424 0CFC 07E6 02D0 - -
+Attack linear shift 12 cut at 3552 by KOFF, release linear shift 8: 909:3512 1595:34D2 2456:3492 3223:3452 | <=0800 139885:07D2 | end 165226
+ every 250000: - - - - - - - -
+Level after the release, 200000 cycles: none
+Release linear shift 8, second KOFF at 0000: none | <=0800 - | end 303
+ every 125000: - - - - - - - -
+Done.
+```
+
+08SWP.txt:
+
+```
+===== 08 SWP SPU VOLUME SWEEP | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+Sweeps on voice 2's volume, voice 2 never keyed on. The start is set as a fixed
+volume 5000 cycles before (spx:574-577). Current volume 1E08h (spx:650). Changes
+from the sweep write, the time it reached 7FFFh (increase) or 0 (decrease).
+Fixed volume 1234h, cycles until 1E08h changes: 393:2468 83:2468 721:2468 723:2468
+Fixed volume 4000h (bit 14, spx:560 range) reads 1E08h 8000
+V2L from 0000 reg 8000 (reads 8000): 503:3800 1281:7000 2026:7FFF | x - | end 2026
+ every 2500: - - - - - - - -
+V2L from 0000 reg 8010 (reads 8010): 348:0380 1074:0700 1824:0A80 2670:0E00 | x - | end 27947
+ every 12500: 3800 7380 - - - - - -
+V2L from 0000 reg 8020 (reads 8020): 348:0038 1073:0070 1823:00A8 2575:00E0 | x - | end 449540
+ every 100000: 1C70 3918 5588 71F8 - - - -
+V2L from 0000 reg 8023 (reads 8023): 348:0020 974:0040 1724:0060 2473:0080 | x - | end 785826
+ every 200000: 20A0 4120 61C0 - - - - -
+V2L from 0000 reg 802C (reads 802C): 599:0007 1368:000E 2213:0015 2958:001C | x - | end 3594910
+ every 500000: 11CD 239A 3567 4734 5901 6ACE 7C9B -
+V2L from 0000 reg 8030 (reads 8030): 1111:0007 2692:000E 4239:0015 5695:001C | x - | end 7189557
+ every 1000000: 11CD 239A 3567 4734 5901 6ACE 7C9B -
+V2L from 0000 reg 8040 (reads 8040): 18407:0007 43020:000E 67527:0015 92109:001C | x - | end -
+ every 1000000: 0118 0237 0356 0475 058D 06AC 07CB 08E3
+V2L from 7FFE reg A020 (reads A020): 707:7FBE 1481:7F7E 2326:7F3E 3080:7EFE | x - | end 393995
+ every 125000: 577E 2EBE 05FE - - - - -
+V2L from 7FFE reg A030 (reads A030): 1409:7FF6 2978:7FEE 4534:7FE6 6095:7FDE | x - | end 6292112
+ every 1000000: 6BA6 574E 42F6 2E9E 1A46 05EE - -
+V2L from 0000 reg C020 (reads C020): 353:0038 972:0070 1721:00A8 2476:00E0 | x - | end 785817
+ every 200000: 3918 6484 72CA - - - - -
+V2L from 0000 reg C030 (reads C030): 607:0007 2136:000E 3646:0015 5153:001C | x - | end 12576529
+ every 2000000: 239A 4734 62B6 6BA0 7483 7D6D - -
+V2L from 7FFE reg E000 (reads E000): 358:3FFF 973:1FFF 1729:0FFF 2479:07FF | x - | end 10981
+ every 2500: 07FF 00FF 001F 0003 - - - -
+V2L from 7FFE reg E020 (reads E020): 504:7FBE 1178:7F7E 2023:7F3E 2773:7EFE | x - | end 1863637
+ every 500000: 2323 0925 01DA - - - - -
+V2L from 7FFE reg E030 (reads E030): 1027:7FF6 2561:7FEE 4171:7FE6 5681:7FDE | x - | end -
+ every 2000000: 5B31 3FEA 2CAD 1E47 141B 0CF7 07E1 02CA
+V2L from 2000 reg 9020 (reads 9020): 353:1FC0 971:1F80 1716:1F40 2568:1F00 | x - | end -
+ every 250000: CE80 8000 8000 8000 8000 8000 8000 8000
+V2L from C000 reg 8020 (reads 8020): 700:C038 1475:C070 2228:C0A8 2978:C0E0 | x - | end 674270
+ every 250000: 0718 4E68 - - - - - -
+V2L from C000 reg B020 (reads B020): 353:C038 873:C070 1628:C0A8 2373:C0E0 | x - | end -
+ every 250000: 0000 0000 0000 0000 0000 0000 0000 0000
+V2L from 2000 reg B020 (reads B020): 716:0000 | x - | end -
+ every 250000: 0000 0000 0000 0000 0000 0000 0000 0000
+V2L from 7FFE reg F020 (reads F020): 509:7FBE 1278:7F7E 2034:7F3E 2779:7EFE | x - | end -
+ every 500000: 2323 0925 01DA 0000 0000 0000 0000 0000
+V2L from 2000 reg 807F (reads 807F): none | x - | end -
+ every 250000: 2000 2000 2000 2000 2000 2000 2000 2000
+V2L from 2000 reg B07F (reads B07F): 359:0000 | x - | end -
+ every 250000: 0000 0000 0000 0000 0000 0000 0000 0000
+V2R from 0000 reg 8020 (reads 8020): 358:0038 978:0070 1730:00A8 2475:00E0 | x - | end 449418
+ every 100000: 1CA8 3918 5588 71F8 - - - -
+V0L from 0000 reg 8020 (reads 8020): 705:0038 1486:0070 2331:00A8 3086:00E0 | x - | end 450055
+ every 100000: 1C70 38E0 5550 71F8 - - - -
+Done.
+```
+
+09END.txt:
+
+```
+===== 09 END SPU ENDX LOOPS | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+Voice 0. S1, S2, S4: one, two, four blocks, the last End+Repeat. Cycles from KON
+until ENDX bit 0 reads 0 (0: it never read 1 after KON), and until it reads 1
+(0: not within the limit).
+S1 pitch 1000, ENDX bit 0 clear, set: 1646,16958 851,16200 793,16143 2198,17548
+S2 pitch 1000, ENDX bit 0 clear, set: 879,37753 851,37728
+S4 pitch 1000, ENDX bit 0 clear, set: 935,80769 851,80736
+S4 pitch 0800, ENDX bit 0 clear, set: 879,157599
+S4 pitch 2000, ENDX bit 0 clear, set: 938,42410
+S4 pitch 3FFF, ENDX bit 0 clear, set: 935,23961
+S4 pitch 4000, ENDX bit 0 clear, set: 938,23964
+S4 pitch 4001, ENDX bit 0 clear, set: 879,23967
+S4 pitch 8000, ENDX bit 0 clear, set: 873,23902
+S4 pitch FFFF, ENDX bit 0 clear, set: 935,23961
+S1 pitch 0100, ENDX bit 0 clear, set: 938,200618
+S1 pitch 0001, ENDX bit 0 clear, set: 929,0
+S1 pitch 0000, ENDX bit 0 clear, set: 57,0
+S4+8 pitch 1000, ENDX bit 0 clear, set: 57,68495
+ENDX low FFFF, write 0000h reads 0000, then: 11888:FFFE 19520:FFFF
+ENDX write 5555h reads 5555, then: 481:0000 7392:FFFE 15058:FFFF
+ENDX high 00FF
+L (loop start at block 1), repeat was 4000: right after KON 4000, then: 18757:4082
+S4 (loop start at block 0), repeat was 4100: right after KON 4100, then: 1831:4060
+M (End+Mute at block 1), repeat 4100: ENDX set at 38155:0001, level then 0000, repeat 4100
+M, level from 20000 cycles after KON: 37904:0000
+L, repeat 40E0 written 2000 cycles after KON (reads 40E0), 150000 later: 4082
+L, repeat 40E0 written 200000 cycles after KON (reads 40E0), 200000 later: 40E0, 400000 later: 40E0
+Start written during play reads 4020
+Done.
+```
+
+10IRQ.txt:
+
+```
+===== 10 IRQ SPU IRQ9 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+Voice 0 keyed on, IRQ address as shown, cycles from KON to SPUSTAT bit 6 and to
+I_STAT bit 9 (0 = not within the limit). S4 at 4060h, four blocks of 10h bytes.
+S4 pitch 1000 IRQ 4060: SPUSTAT.6 at 1256, I_STAT.9 at 1057
+S4 pitch 1000 IRQ 4061: SPUSTAT.6 at 6450, I_STAT.9 at 6251
+S4 pitch 1000 IRQ 4062: SPUSTAT.6 at 245, I_STAT.9 at 44
+S4 pitch 1000 IRQ 4064: SPUSTAT.6 at 40238, I_STAT.9 at 39976
+S4 pitch 1000 IRQ 4065: SPUSTAT.6 at 49418, I_STAT.9 at 49216
+S4 pitch 1000 IRQ 4066: SPUSTAT.6 at 245, I_STAT.9 at 44
+S4 pitch 0400 IRQ 4064: SPUSTAT.6 at 150835, I_STAT.9 at 150631
+S4 pitch 4000 IRQ 4064: SPUSTAT.6 at 315, I_STAT.9 at 116
+S4 noise pitch 1000 IRQ 4064: SPUSTAT.6 at 40244, I_STAT.9 at 39982
+S4 pitch 0000 IRQ 4064: SPUSTAT.6 at 0, I_STAT.9 at 0
+M (End+Mute at block 1) with the repeat address set before KON to P (4100h):
+M, IRQ at P pitch 1000 IRQ 4100: SPUSTAT.6 at 40173, I_STAT.9 at 39974
+M, repeat P, IRQ at M block 0, IRQ 40A0, hits: 1602 3162 4709 6243 7778; SPUSTAT.6 read 0 after the first acknowledge (cycles from KON): 2382:0000
+S1 released 100000 cycles before, level 0000, IRQ at S1: SPUSTAT.6 at 101
+S1 looping, IRQ 4020, hits: 676 2215 3764 5300 6836; SPUSTAT.6 read 0 after the first acknowledge (cycles from KON): 1436:0000
+S4 looping, IRQ 4064, hits: 41452 42989 44538 46074 47610; SPUSTAT.6 read 0 after the first acknowledge (cycles from KON): 42210:0000
+Manual writes of k halfwords from 61FF (8 bytes before the IRQ address 6200):
+ k=1 SPUSTAT.6 0 I_STAT.9 0 k=2 SPUSTAT.6 0 I_STAT.9 0 k=3 SPUSTAT.6 0 I_STAT.9 0 k=4 SPUSTAT.6 1 I_STAT.9 1
+ k=5 SPUSTAT.6 1 I_STAT.9 1 k=6 SPUSTAT.6 1 I_STAT.9 1 k=7 SPUSTAT.6 1 I_STAT.9 1 k=8 SPUSTAT.6 1 I_STAT.9 1
+DMA write 64 bytes from 32 before the IRQ address: SPUSTAT.6 0
+DMA write 64 bytes ending just before it: SPUSTAT.6 0
+DMA write 64 bytes from 8 after it: SPUSTAT.6 0
+DMA read 64 bytes from 32 before it: SPUSTAT.6 1
+DMA read 64 bytes ending just before it: SPUSTAT.6 1
+DMA write over it with IRQ9 enable clear, then enabled: SPUSTAT.6 0
+IRQ address write 1234h reads 1234
+Done.
+```
+
+11CAP.txt:
+
+```
+===== 11 CAP SPU CAPTURE TIMING | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+SPUSTAT bit 11 (spx:716, :723-725) over 1.2 million cycles; then capture IRQs
+(spx:848-856), timed from a rise of bit 11, with bit 11 at each hit (h/l).
+Transfer control 0004, SPUSTAT bit 11 changes: 164876:0000 361484:0800 558126:0000 754724:0800 951308:0000 1147950:0800
+Transfer control 0000, SPUSTAT bit 11 changes: none
+Transfer control 0008, SPUSTAT bit 11 changes: 175089:0800 371731:0000 568329:0800 764913:0000 961555:0800 1158153:0000
+Transfer control 000C, SPUSTAT bit 11 changes: none
+Transfer control 0002, SPUSTAT bit 11 changes: none
+IRQ 0000, transfer control 0004, from bit 11 rising, hits: 172727l 565919l 959125l 1352341l
+IRQ 0040, transfer control 0004, from bit 11 rising, hits: 393136h 786328h 1179568h 1572760h
+IRQ 0080, transfer control 0004, from bit 11 rising, hits: 196509l 589701l 982941l 1376133l
+IRQ 00C0, transfer control 0004, from bit 11 rising, hits: 393136h 786328h 1179568h 1572760h
+IRQ 0100, transfer control 0004, from bit 11 rising, hits: 196524l 589716l 982908l 1376148l
+IRQ 0180, transfer control 0004, from bit 11 rising, hits: 196515l 589755l 982947l 1376187l
+IRQ 01FF, transfer control 0004, from bit 11 rising, hits: 193491h 586707h 979923h 1373139h
+IRQ 0001, transfer control 0004, from bit 11 rising, hits: 199576l 592792l 986008l 1379224l
+IRQ 0100, transfer control 0000, from bit 11 rising (no rise seen), hits: none
+IRQ 0100, transfer control 0008, from bit 11 rising, hits: none
+IRQ 0200, transfer control 0004, from bit 11 rising, hits: none
+Done.
+```
+
+12VCP.txt:
+
+```
+===== 12 VCP SPU CAPTURE NOISE | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+The first half (256 samples) of a capture buffer, read by DMA right after SPUSTAT
+bit 11 rises. Tone T: block 0 shift 4 filter 0 nibbles 0..F, block 1 shift 4
+filter 1, looped. ADSR held at 7FFFh unless shown. Volumes 0, main volume 0.
+Voice 1 T pitch 1000h, 255 changes in 256:
+ FD30 FC83 FD03 FD88 FE28 FEC5 FF57 FFE1 0062 00DB 014C 01B7 021B 0278 02D0 0322
+ 036F 0392 02FE 024F 01AA 010F 007E FFF7 FF78 FF01 FE91 FE29 FDC7 FD6A FD14 FD4A
+ FF98 007E 00FE 017D 01FD 027C 02FC 024B FD30 FC83 FD03 FD82 FE01 FE81 FF00 FF80
+ FFFF 007E 00FE 017D 01FD 027C 02FC 024B FD30 FC83 FD03 FD88 FE28 FEC5 FF57 FFE1
+Voice 1 T pitch 0800h, 255 changes in 256:
+ FDC2 FE01 FE41 FE81 FEC1 FF00 FF40 FF80 FFC0 FFFF 003F 007E 00BE 00FE 013E 017D
+ 01BD 01FD 023C 027C 02BC 02FC 0321 024B FFBC FD30 FC5D FC83 FCC2 FD03 FD43 FD88
+Voice 1 T pitch 2000h, 255 changes in 256:
+ FD4A 007E 017D 027C 024B FC83 FD82 FE81 FF80 007E 017D 027C 024B FC83 FD88 FEC5
+ FFE1 00DB 01B7 0278 0322 0392 024F 010F FFF7 FF01 FE29 FD6A FD4A 007E 017D 027C
+Voice 1 T pitch 1000h, ADSR decayed to sustain level 7, 255 changes in 256:
+ FF98 007E 00FE 017D 01FD 027C 02FC 024B FD30 FC83 FD03 FD82 FE01 FE81 FF00 FF80
+ FFFF 007E 00FE 017D 01FD 027C 02FC 024B FD30 FC83 FD03 FD88 FE28 FEC5 FF57 FFE1
+Its level 3FFF
+Voice 1 released, 0 changes in 256:
+ 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
+Voice 3 T pitch 1000h, 255 changes in 256:
+ 036F 0392 02FE 024F 01AA 010F 007E FFF7 FF78 FF01 FE91 FE29 FDC7 FD6A FD14 FD4A
+ FF98 007E 00FE 017D 01FD 027C 02FC 024B FD30 FC83 FD03 FD82 FE01 FE81 FF00 FF80
+CD left, no CD playing, 0 changes in 256:
+ 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
+CD right, 0 changes in 256:
+ 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
+Noise (spx:680-696): voice 1 noise mode, SPUCNT noise shift and step as shown.
+Noise shift 15 step 3, 255 changes in 256:
+ D414 2826 D04F 209D C13D 0278 04F1 09E3 13C7 278F CF21 1E41 3C82 F906 F20D E41B
+ C838 106F 20DE C1C0 037E 06FD 0DFC 1BF9 37F2 EFE7 DFD0 3F9E FF3F FE7E FCFD F9FB
+Noise shift 15 step 0, 255 changes in 256:
+ DE0D 3C19 F835 F06B E0D7 C1AE 035B 06B7 0D70 1AE1 35C2 EB87 D70E 2E1B DC38 386F
+ F0E0 E1C0 C380 0700 0E01 1C02 3805 F00D E01A C034 0067 00D0 01A1 0343 0686 0D0E
+Noise shift 14 step 0, 128 changes in 256:
+ E24A C495 C495 0929 0929 1252 1252 24A5 24A5 C94C C94C 1298 1298 2530 2530 CA62
+ CA62 14C3 14C3 2987 2987 D310 D310 261F 261F CC42 CC42 1882 1882 3105 3105 E20C
+Noise shift 12 step 0, 32 changes in 256:
+ D558 D558 2AAE 2AAE 2AAE 2AAE 2AAE 2AAE 2AAE 2AAE D560 D560 D560 D560 D560 D560
+ D560 D560 2ABE 2ABE 2ABE 2ABE 2ABE 2ABE 2ABE 2ABE D580 D580 D580 D580 D580 D580
+Noise shift 10 step 0, 8 changes in 256:
+ DBFD DBFD DBFD DBFD DBFD DBFD DBFD DBFD DBFD DBFD DBFD DBFD DBFD DBFD DBFD DBFD
+ DBFD DBFD DBFD DBFD DBFD DBFD DBFD DBFD DBFD DBFD DBFD DBFD DBFD DBFD 37F9 37F9
+Noise shift 8 step 0, 2 changes in 256:
+ D3BA D3BA D3BA D3BA D3BA D3BA D3BA D3BA D3BA D3BA D3BA D3BA D3BA D3BA 2772 2772
+ 2772 2772 2772 2772 2772 2772 2772 2772 2772 2772 2772 2772 2772 2772 2772 2772
+Noise shift 4 step 0, 0 changes in 256:
+ 1DCF 1DCF 1DCF 1DCF 1DCF 1DCF 1DCF 1DCF 1DCF 1DCF 1DCF 1DCF 1DCF 1DCF 1DCF 1DCF
+ 1DCF 1DCF 1DCF 1DCF 1DCF 1DCF 1DCF 1DCF 1DCF 1DCF 1DCF 1DCF 1DCF 1DCF 1DCF 1DCF
+Done.
+```
+
+13XFR.txt:
+
+```
+===== 13 XFR SPU TRANSFERS | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+Scratch at 30000h (6000h), filled with EEEEh before each row, read back by DMA
+with transfer control 0004h. Halfwords written: A000h, A001h, ...
+Transfer address write 6000h reads 6000, after 8 manual 6000, after DMA 6000
+Fifo 1DA8h reads A007 A007
+4 manual, then 4 more (A008h..) with no new address: A000 A001 A002 A003 A008 A009 A00A A00B EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+4 manual, then 4 written to the Fifo in Manual Write mode: A000 A001 A002 A003 EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+40 halfwords into the Fifo (32 deep, spx:741): A000 A001 A002 A003 A004 A005 A006 A007 A008 A009 A00A A00B A00C A00D A00E A00F A010 A011 A012 A013 A014 A015 A016 A017 A018 A019 A01A A01B A01C A01D A01E A01F EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+Type 0 manual 8: A007 EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+Type 1 manual 8: A007 EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+Type 2 manual 8: A000 A001 A002 A003 A004 A005 A006 A007 EEEE EEEE
+Type 3 manual 8: A000 A002 A004 A006 EEEE EEEE EEEE EEEE EEEE EEEE
+Type 4 manual 8: A003 A007 EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+Type 5 manual 8: A006 EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+Type 6 manual 8: A007 EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+Type 7 manual 8: A007 EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+Type 3 DMA write of B000h, B001h, ..: B000 B002 B004 EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+Type 3 DMA read of C000h, C001h, ..: C000 0000 C001 0000 C002 0000 C003 0000 C004 FFFF C005 FFFF EEEE FFFF EEEE FFFF EEEE FFFF EEEE FFFF
+Type 4 DMA read of C000h, C001h, ..: C000 C000 C000 C000 C001 C001 C001 C001 C002 C002 C002 C002 C003 C003 C003 C003 C004 C004 C004 C004
+Type 5 DMA read of C000h, C001h, ..: C000 0000 C000 0000 C000 0000 C000 0000 C001 0000 C001 0000 C001 0000 C001 0000 C002 0000 C002 0000
+Manual Write of 1, SPUSTAT (bit 11 masked) was 0000, from the SPUCNT write: 146:0410 938:0010
+Manual Write of 4, SPUSTAT (bit 11 masked) was 0000, from the SPUCNT write: 323:0010
+Manual Write of 16, SPUSTAT (bit 11 masked) was 0000, from the SPUCNT write: 198:0410 1005:0010
+1F801014h 200931E1h, DMA read 128 bytes of D000h..:
+ FFFF D000 D001 D002 D003 D004 A005 A006 A007 A008 A009 A00A A00B A00C A00D A00E
+ A00F EEEE EEEE EEEE EEEE EEEE EEEE EEEE FFFF EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+ FFFF EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+1F801014h 200931E1h, DMA read 128 bytes of D000h..:
+ FFFF D000 D001 D002 D003 D004 A005 A006 A007 A008 A009 A00A A00B A00C A00D A00E
+ A00F EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+ FFFF EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+Done.
+```
+
+14REG.txt:
+
+```
+===== 14 REG SPU REGISTERS | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+1DBCh-1DBFh and 1E60h-1E7Fh (spx:1108-1121), written and read back, put back.
+1DBCh DFFF F7FF, 1E60h..: F5FF F3FF BFFF 29DF 74BB FFFE BFF7 FFFF FFFF FDFD 6EFF 3BB3 FC7F FFFF BFFF 7D8F
+Unknown 1DBC: was DFFF, write 1234 reads 1234
+Unknown 1DBE: was F7FF, write FEDC reads FEDC
+1E60h.. written inverted, reads: 0A00 0C00 4000 D620 8B44 0001 4008 0000 0000 0202 9100 C44C 0380 0000 4000 8270
+Unknown 1DA0h 1DA0: was AC00, write 5A5A reads 0100
+Voice 5 registers written FFFFh:
+ volume L 1C50: was 0000, write 7FFF reads 7FFF
+ volume L sweep 1C50: was 0000, write FFFF reads FFFF
+ pitch 1C54: was 1000, write FFFF reads FFFF
+ start 1C56: was 4000, write FFFF reads FFFF
+ ADSR low 1C58: was 000F, write FFFF reads FFFF
+ ADSR high 1C5A: was 1FC0, write FFFF reads FFFF
+ repeat 1C5E: was 4000, write FFFF reads FFFF
+Voice flag registers (bits 24-31 not used, spx:660, :666, :683; PMON bit 0 :382):
+ PMON low 1D90: was 0000, write FFFF reads FFFF
+ PMON high 1D92: was 0000, write FFFF reads FFFF
+ NON high 1D96: was 0000, write FFFF reads FFFF
+ EON high 1D9A: was 0000, write FFFF reads FFFF
+ ENDX high 1D9E: was 00FF, write FFFF reads FFFF
+ CD volume L 1DB0: was 7FFF, write 8765 reads 8765
+ extern volume R 1DB6: was 0000, write 8765 reads 8765
+ reverb volume L 1D84: was 0000, write 8001 reads 8001
+ mBASE 1DA2: was FFFE, write 1234 reads 1234
+Main volume L sweep A020 reads A020, current main volume 1DB8h 0000 0000
+32-bit stores to 1C58h, 32 tries: low half wrong 5, high half wrong 0
+1C58h lw 1357ABCD, lbu 1C58h CD 1C59h AB 1C5Ah 57
+sb 12345678h to 1C54h: 5678; to 1C55h over 1111h: 1111
+Done.
+```
+
+15UNU.txt:
+
+```
+===== 15 UNU SPU UNUSED 1E80 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+Halfword reads of 1F801E80h..1F801FFEh; lbu and lw of 1F801E80h last.
+
+192 of 192 read FFFFh
+lbu 1E80h: FF
+lw 1E80h: FFFFFFFF
+lw 1E7Ch: 7D8FBFFF
+Done.
+```
+
+### Run 5501a-card-g3 on 27 September 2026
+
+Raw output: [00RUN.txt](/tests/raw/20260927T0000Z-5501a-card-g3/spuenv/00RUN.txt) · [01STA.txt](/tests/raw/20260927T0000Z-5501a-card-g3/spuenv/01STA.txt) · [02CNT.txt](/tests/raw/20260927T0000Z-5501a-card-g3/spuenv/02CNT.txt) · [03KON.txt](/tests/raw/20260927T0000Z-5501a-card-g3/spuenv/03KON.txt) · [04ATK.txt](/tests/raw/20260927T0000Z-5501a-card-g3/spuenv/04ATK.txt) · [05DEC.txt](/tests/raw/20260927T0000Z-5501a-card-g3/spuenv/05DEC.txt) · [06SUS.txt](/tests/raw/20260927T0000Z-5501a-card-g3/spuenv/06SUS.txt) · [07REL.txt](/tests/raw/20260927T0000Z-5501a-card-g3/spuenv/07REL.txt) · [08SWP.txt](/tests/raw/20260927T0000Z-5501a-card-g3/spuenv/08SWP.txt) · [09END.txt](/tests/raw/20260927T0000Z-5501a-card-g3/spuenv/09END.txt) · [10IRQ.txt](/tests/raw/20260927T0000Z-5501a-card-g3/spuenv/10IRQ.txt) · [11CAP.txt](/tests/raw/20260927T0000Z-5501a-card-g3/spuenv/11CAP.txt) · [12VCP.txt](/tests/raw/20260927T0000Z-5501a-card-g3/spuenv/12VCP.txt) · [13XFR.txt](/tests/raw/20260927T0000Z-5501a-card-g3/spuenv/13XFR.txt) · [14REG.txt](/tests/raw/20260927T0000Z-5501a-card-g3/spuenv/14REG.txt) · [15UNU.txt](/tests/raw/20260927T0000Z-5501a-card-g3/spuenv/15UNU.txt)
+
+00RUN.txt:
+
+```
+===== 00 RUN | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+15 tests
+A chain program, linked at 80010000
+Saved on the card in slot 2, from image 1
+COP0 at start: BPC 00000000 BDA 00000000 TAR 8010E9B4 DCIC 00000000 BadVaddr 00000480 BDAM 00000000
+BPCM 00000000 SR 40000000 Cause 00000020 EPC 8010F568 PRId 00000002
+```
+
+01STA.txt:
+
+```
+===== 01 STA SPU STATE AT ENTRY | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+SPU registers as this program found them, nothing written first.
+1DA8h, the transfer Fifo, is not read (shown ----).
+1C00: 0000 0000 3FFF 0200 0000 0000 0000 0200 0000 0000 3FFF 0200 0000 0000 0000 0200
+1C20: 0000 0000 3FFF 0200 0000 0000 0000 0200 0000 0000 3FFF 0200 0000 0000 0000 0200
+1C40: 0000 0000 3FFF 0200 0000 0000 0000 0200 0000 0000 3FFF 0200 0000 0000 0000 0200
+1C60: 0000 0000 3FFF 0200 0000 0000 0000 0200 0000 0000 3FFF 0200 0000 0000 0000 0200
+1C80: 0000 0000 3FFF 0200 0000 0000 0000 0200 0000 0000 3FFF 0200 0000 0000 0000 0200
+1CA0: 0000 0000 3FFF 0200 0000 0000 0000 0200 0000 0000 3FFF 0200 0000 0000 0000 0200
+1CC0: 0000 0000 3FFF 0200 0000 0000 0000 0200 0000 0000 3FFF 0200 0000 0000 0000 0200
+1CE0: 0000 0000 3FFF 0200 0000 0000 0000 0200 0000 0000 3FFF 0200 0000 0000 0000 0200
+1D00: 0000 0000 3FFF 0200 0000 0000 0000 0200 0000 0000 3FFF 0200 0000 0000 0000 0200
+1D20: 0000 0000 3FFF 0200 0000 0000 0000 0200 0000 0000 3FFF 0200 0000 0000 0000 0200
+1D40: 0000 0000 3FFF 0200 0000 0000 0000 0200 0000 0000 3FFF 0200 0000 0000 0000 0200
+1D60: 0000 0000 3FFF 0200 0000 0000 0000 0200 0000 0000 3FFF 0200 0000 0000 0000 0200
+1D80: 0000 0000 0000 0000 FFFF 00FF FFFF 00FF 0000 0000 0000 0000 0000 0000 FFFF 00FF
+1DA0: AC00 FFFE FFFE 0200 ---- C085 0004 0805 0000 0000 0000 0000 0000 0000 DFFF F7FF
+1DC0: 033D 0231 7E00 5000 B400 B000 4C00 B000 6000 5400 1ED6 1A31 1D14 183B 1BC2 16B2
+1DE0: 1A32 15EF 15EE 1055 1334 0F2D 11F6 0C5D 1056 0AE1 0AE0 07A2 0464 0232 8000 8000
+1E00: 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
+1E20: 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
+1E40: 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
+1E60: F5FF F3FF BFFF 29DF 74BB FFEE BFF7 FFFF FFFF FD7D 6EFF 3BB3 FC7F FFFF BFFF 7D8F
+1DA0h read 16 times in a row: AC00 AC00 AC00 AC00 AC00 AC00 AC00 AC00 AC00 AC00 AC00 AC00 AC00 AC00 AC00 AC00
+1DA0h read 16 times 100000 cycles apart: 0100 AC00 AC00 AC00 0100 AC00 AC00 AC00 0100 AC00 AC00 AC00 0100 AC00 AC00 A000
+SPUSTAT read 16 times 5000 cycles apart: 0805 0805 0805 0805 0805 0805 0805 0805 0805 0805 0805 0805 0805 0805 0805 0005
+SPU_DELAY 1F801014h: 200931E1
+Done.
+```
+
+02CNT.txt:
+
+```
+===== 02 CNT SPU SPUCNT TO STAT | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+SPUSTAT 5-0 is SPUCNT 5-0 applied a bit delayed (spx:726); bit 7 is like SPUCNT
+bit 5 (spx:721); DMA read sets 9 and 7 late (spx:727-729). Times from the SPUCNT
+write, cycles:value, for 20000 cycles or six changes; bit 11 (capture half) masked
+out. Transfer address 30000h.
+SPUCNT 8000 to 8010, SPUSTAT was 0000, changes: 634:0010
+SPUCNT 8010 to 8000, SPUSTAT was 0010, changes: 649:0000
+SPUCNT 8000 to 8020, SPUSTAT was 0000, changes: 61:02A0
+SPUCNT 8020 to 8000, SPUSTAT was 02A0, changes: 704:0000
+SPUCNT 8000 to 8030, SPUSTAT was 0000, changes: 353:0030 1850:01B0
+SPUCNT 8030 to 8000, SPUSTAT was 01B0, changes: 411:0000
+SPUCNT 8000 to 8001, SPUSTAT was 0000, changes: 61:0001
+SPUCNT 8001 to 8000, SPUSTAT was 0001, changes: 237:0000
+SPUCNT 8000 to 8002, SPUSTAT was 0000, changes: 297:0002
+SPUCNT 8002 to 8000, SPUSTAT was 0002, changes: 293:0000
+SPUCNT 8000 to 8004, SPUSTAT was 0000, changes: 353:0004
+SPUCNT 8004 to 8000, SPUSTAT was 0004, changes: 351:0000
+SPUCNT 8000 to 8008, SPUSTAT was 0000, changes: 351:0008
+SPUCNT 8008 to 8000, SPUSTAT was 0008, changes: 411:0000
+SPUCNT 8000 to 803F, SPUSTAT was 0000, changes: 409:003F 1213:01BF
+SPUCNT 803F to 8000, SPUSTAT was 01BF, changes: 411:0000
+SPUCNT 8000 to 8040, SPUSTAT was 0000, changes: none
+SPUCNT 8040 to 8000, SPUSTAT was 0000, changes: none
+SPUCNT 8000 to 8100, SPUSTAT was 0000, changes: none
+SPUCNT 8100 to 8000, SPUSTAT was 0000, changes: none
+SPUCNT 8000 to BC00, SPUSTAT was 0000, changes: none
+SPUCNT BC00 to 8000, SPUSTAT was 0000, changes: none
+SPUCNT 8000 to 0000, SPUSTAT was 0000, changes: none
+SPUCNT 0000 to 8000, SPUSTAT was 0000, changes: none
+SPUCNT 8010 to 8020, SPUSTAT was 0010, changes: 644:02A0
+SPUCNT 8020 to 8030, SPUSTAT was 02A0, changes: 472:00B0 1281:01B0
+SPUCNT 8030 to 8010, SPUSTAT was 01B0, changes: 119:0010
+SPUCNT 8000h to 8010h, cycles until SPUSTAT 5-0 = 10h, 8 times: 382 257 199 83 722 666 547 492
+SPUCNT write BF00h reads BF00 at once, BF00 after 3000 cycles
+SPUSTAT was 0800, write FFFFh reads FFFF at once, then: 626:0800
+SPUSTAT write 0000h reads 0000 at once, then: 657:0800
+Transfer control write FFFFh reads FFFF, write 0004h reads 0004
+Done.
+```
+
+03KON.txt:
+
+```
+===== 03 KON SPU KEY ON OFF | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+Voice 0, silent loop at 20000h, pitch 1000h. Cycles from the write.
+KON to the first level change (attack linear shift 0 step 0): 5299 4574 4460 4341 4236 4176 4109 4004
+KON to the second change: 6099 5341 5228 5107 5002 4943 4870 4765
+KOFF at 7FFFh to the first change (release linear shift 0): 69 39 39 39 39 39 39 39
+KON again at 3FFF, level: 1160:0000 5010:3800 5810:7000 6555:7FFF 7304:3FFF
+KON again at 3FFF, level: 1593:0000 5419:3800 6167:7000 6969:7FFF 7711:3FFF
+KON again at 3FFF, level: 423:0000 4254:3800 5054:7000 5799:7FFF 6548:3FFF
+KON again at 3FFF, level: 777:0000 4608:3800 5408:7000 6153:7FFF 6902:3FFF
+Attack linear shift 10: KON again at 2354, level: 393:2362 1138:0000 4970:000E 5772:001C 6514:002A 7316:0038
+KON then KOFF back to back, level: 4384:3800 5184:7000 5929:7FFF 6678:3FFF
+At 7FFFh, KOFF then KON back to back, level: 125:3FFF 1575:0000 5401:3800 6149:7000 6951:7FFF 7693:3FFF
+KON write 0001h reads 0001 (high 0000), 0001 after 5000; KOFF 0001h reads 0001 (high 0000); KON high FF00h reads FF00
+KOFF high FF00h reads FF00
+SPUCNT 0000h, KON attack linear shift 8, level: none
+then SPUCNT 8000h (level was 0000), level: none ENDX low FFFF
+At 7FFFh, SPUCNT to 0000h, level: 81:3FFF 385:0000
+then SPUCNT 8000h (level was 0000), level: none
+Sustain never stepping at 7FFFh, write level 1234h: reads 1234, then: none
+Sustain linear increase shift 8, write level 1234h: reads 1234, then: 273:4A34 1077:7FFF 1819:3FFF 2621:4037 3366:406F 4115:40A7
+Voice released to 0, write level 1234h: reads 1234, then: 619:D234 1420:0000
+Voice 5, released, write level 8123h: reads 8123
+Done.
+```
+
+04ATK.txt:
+
+```
+===== 04 ATK SPU ADSR ATTACK | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+Attack: voice 0, ADSR low as shown (decay 0, sustain level Fh), sustain never
+stepping. Level changes cycles:value from KON, the first rise above 6000h, the time
+it reached 7FFFh, then eight readings.
+Lin sh00 st0 (000F): 5286:3800 6061:7000 6751:7FFF | >6000 6061:7000 | end 6751
+ every 2500: 0000 0000 - - - - - -
+Lin sh00 st1 (010F): 4368:3000 5165:6000 5910:7FFF | >6000 5910:7FFF | end 5910
+ every 2500: 0000 3000 - - - - - -
+Lin sh00 st2 (020F): 4368:2800 5165:5000 5910:7800 6702:7FFF | >6000 5910:7800 | end 6702
+ every 2500: 0000 2800 - - - - - -
+Lin sh00 st3 (030F): 4372:2000 5174:4000 5919:6000 6669:7FFF | >6000 6669:7FFF | end 6669
+ every 2500: 0000 2000 - - - - - -
+Lin sh02 st0 (080F): 4421:0E00 5096:1C00 5896:2A00 6643:3800 | >6000 8936:6200 | end 11281
+ every 5000: 1C00 7000 - - - - - -
+Lin sh05 st0 (140F): 4421:01C0 5096:0380 5941:0540 6687:0700 | >6000 45800:6040 | end 60491
+ every 25000: 3100 6900 - - - - - -
+Lin sh08 st0 (200F): 4413:0038 5183:0070 5931:00A8 6682:00E0 | >6000 340786:6008 | end 453695
+ every 100000: 1B58 37C8 5470 70E0 - - - -
+Lin sh10 st0 (280F): 4415:000E 5188:001C 5939:002A 6693:0038 | >6000 1352192:6008 | end 1801515
+ every 300000: 151C 2A70 3FD2 5526 6A88 7FEA - -
+Lin sh11 st0 (2C0F): 4404:0007 5177:000E 5928:0015 6682:001C | >6000 2700065:6001 | end 3598680
+ every 500000: 11AA 2377 3544 4711 58DE 6AAB 7C78 -
+Lin sh11 st3 (2F0F): 4415:0004 5188:0008 5939:000C 6693:0010 | >6000 4722988:6004 | end 6295073
+ every 1000000: 1444 289C 3CF4 514C 65A4 79FC - -
+Lin sh12 st0 (300F): 5126:0007 6706:000E 8261:0015 9821:001C | >6000 5396517:6001 | end 7193627
+ every 1000000: 11B8 2385 3552 471F 58EC 6AB9 7C86 -
+Lin sh13 st0 (340F): 5925:0007 9015:000E 12076:0015 15141:001C | >6000 - | end -
+ every 1000000: 08DC 11C6 1AA9 2393 2C76 3560 3E43 472D
+Lin sh14 st0 (380F): 5122:0007 11229:000E 17404:0015 23580:001C | >6000 - | end -
+ every 1000000: 046E 08E3 0D58 11CD 163B 1AB0 1F25 239A
+Lin sh16 st0 (400F): 27436:0007 52050:000E 76552:0015 101140:001C | >6000 - | end -
+ every 1000000: 0118 0237 034F 046E 058D 06AC 07C4 08E3
+Lin sh20 st0 (500F): 156423:0007 549639:000E 942911:0015 1336127:001C | >6000 - | end -
+ every 1000000: 0015 0023 0038 0046 005B 0069 007E 008C
+Lin sh24 st0 (600F): 3292952:0007 9584456:000E 15875920:0015 | >6000 - | end -
+ every 2000000: 0000 0007 0007 0007 000E 000E 000E 0015
+Lin sh26 st2 (6A0F): 9246528:0005 | >6000 - | end -
+ every 4250000: 0000 0000 0005 0005 0005 0005 0005 0005
+Lin sh29 st2 (760F): 356121:0005 25521953:000A | >6000 - | end -
+ every 4250000: 0005 0005 0005 0005 0005 0005 000A 000A
+Lin sh31 st2 (7E0F): 16625398:0005 | >6000 - | end -
+ every 4250000: 0000 0000 0000 0005 0005 0005 0005 0005
+Lin sh31 st3 (7F0F): none | >6000 - | end -
+ every 2500000: 0000 0000 0000 0000 0000 0000 0000 0000
+Exp sh00 st0 (800F): 4366:3800 5158:7000 5956:7E00 6716:7FFF | >6000 5158:7000 | end 6716
+ every 2500: 0000 3800 - - - - - -
+Exp sh04 st0 (900F): 4412:0380 5185:0700 5936:0A80 6690:0E00 | >6000 25179:6200 | end 52030
+ every 25000: 5E80 7E00 - - - - - -
+Exp sh08 st0 (A00F): 4316:0038 5085:0070 5841:00A8 6686:00E0 | >6000 340689:6008 | end 790002
+ every 200000: 37C8 643E 7276 - - - - -
+Exp sh09 st0 (A40F): 4330:001C 5109:0038 5959:0054 6704:0070 | >6000 677910:6008 | end 1575691
+ every 375000: 34D4 6293 6FF2 7D4A - - - -
+Exp sh10 st0 (A80F): 4322:000E 5101:001C 5951:002A 6696:0038 | >6000 1352206:6008 | end 3147794
+ every 750000: 3528 62A8 7000 7D58 - - - -
+Exp sh11 st0 (AC0F): 4458:0007 5154:000E 5927:0015 6700:001C | >6000 2700050:6001 | end 6294374
+ every 1500000: 3544 62A8 7000 7D5F - - - -
+Exp sh12 st0 (B00F): 5097:0007 6734:000E 8243:0015 9744:001C | >6000 5396548:6001 | end 12582634
+ every 2000000: 2385 471F 62AF 6B99 747C 7D66 - -
+Exp sh14 st0 (B80F): 5947:0007 12091:000E 18207:0015 24317:001C | >6000 - | end -
+ every 2000000: 08E3 11CD 1AB0 239A 2C7D 3567 3E4A 4734
+Done.
+```
+
+05DEC.txt:
+
+```
+===== 05 DEC SPU ADSR DECAY | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+Decay: voice 0, attack linear shift 0 step 0, decay shift and sustain level as
+shown, sustain never stepping. Changes from KON, the first fall to (SL+1)*800h or
+below (spx:540), then eight readings: where the level stops is the sustain level.
+Dec 00 SL 0 (0000): 4685:3800 5520:7000 6285:7FFF 7046:3FFF | <=SL 9367:07FF | end -
+ every 5000: 3800 07FF 07FF 07FF 07FF 07FF 07FF 07FF
+Dec 00 SL 3 (0003): 4345:3800 5177:7000 5936:7FFF 6696:3FFF | <=SL 7461:1FFF | end -
+ every 5000: 3800 1FFF 1FFF 1FFF 1FFF 1FFF 1FFF 1FFF
+Dec 00 SL 7 (0007): 4342:3800 5198:7000 5858:7FFF 6627:3FFF | <=SL 6627:3FFF | end -
+ every 5000: 3800 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Dec 00 SL B (000B): 4348:3800 5197:7000 5956:7FFF 6716:3FFF | <=SL 6716:3FFF | end -
+ every 5000: 3800 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Dec 00 SL E (000E): 4342:3800 5198:7000 5870:7FFF 6631:3FFF | <=SL 6631:3FFF | end -
+ every 5000: 3800 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Dec 00 SL F (000F): 4348:3800 5197:7000 5970:7FFF 6743:3FFF | <=SL - | end -
+ every 5000: 3800 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Dec 02 SL 7 (0027): 4342:3800 5143:7000 5914:7FFF 6682:6FFF | <=SL 10566:3971 | end -
+ every 12500: 3971 3971 3971 3971 3971 3971 3971 3971
+Dec 04 SL 7 (0047): 4441:3800 5137:7000 5898:7FFF 6762:7BFF | <=SL 22889:3FA2 | end -
+ every 25000: 3FA2 3FA2 3FA2 3FA2 3FA2 3FA2 3FA2 3FA2
+Dec 06 SL 7 (0067): 4345:3800 5141:7000 5911:7FFF 6680:7EFF | <=SL 74321:3F8E | end -
+ every 75000: 3F8E 3F8E 3F8E 3F8E 3F8E 3F8E 3F8E 3F8E
+Dec 08 SL 0 (0080): 4339:3800 5127:7000 5895:7FFF 6663:7FBF | <=SL 1051190:07FE | end -
+ every 250000: 446A 23B3 1272 094D 07FE 07FE 07FE 07FE
+Dec 08 SL 7 (0087): 4342:3800 5143:7000 5914:7FFF 6682:7FBF | <=SL 275460:3FF1 | end -
+ every 200000: 4DD1 3FF1 3FF1 3FF1 3FF1 3FF1 3FF1 3FF1
+Dec 08 SL F (008F): 4342:3800 5143:7000 5923:7FFF 6702:7FBF | <=SL - | end -
+ every 50000: 7FBF 7FBF 7FBF 7FBF 7FBF 7FBF 7FBF 7FBF
+Dec 10 SL 7 (00A7): 5176:3800 5977:7000 6741:7FFF 7506:7FEF | <=SL 1049660:3FFA | end -
+ every 500000: 5C8A 4243 3FFA 3FFA 3FFA 3FFA 3FFA 3FFA
+Dec 11 SL 7 (00B7): 4441:3800 5137:7000 5898:7FFF 6762:7FF7 | <=SL 2001933:3FFF | end -
+ every 1000000: 5B62 400E 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Dec 12 SL 7 (00C7): 4381:3800 5105:7000 5893:7FFF 6680:7FF7 | <=SL 3997218:3FFF | end -
+ every 2000000: 5B4A 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Dec 12 SL 0 (00C0): 4381:3800 5194:7000 5878:7FFF 6668:7FF7 | <=SL 13958218:0800 | end -
+ every 4250000: 3D6F 1BC4 0B13 07FF 07FF 07FF 07FF 07FF
+Dec 13 SL 7 (00D7): 4385:3800 5214:7000 5895:7FFF 7427:7FF7 | <=SL 7988544:3FFF | end -
+ every 2000000: 6C40 5B3E 4CA7 3FFF 3FFF 3FFF 3FFF 3FFF
+Dec 15 SL 7 (00F7): 4381:3800 5105:7000 5893:7FFF 10519:7FF7 | <=SL - | end -
+ every 2000000: 7AEF 75D7 70BF 6C32 67C4 634F 5F04 5B32
+Done.
+```
+
+06SUS.txt:
+
+```
+===== 06 SUS SPU ADSR SUSTAIN | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+Sustain: voice 0, attack linear shift 0 step 0, decay shift 0, sustain level 7
+(4000h), then the sustain as shown. The watch starts at the first reading of 4000h
+or less after 7FFFh ("from"): changes, the first rise above 6000h, the time it
+reached 7FFFh (increase) or 0 (decrease), eight readings. Times from KON.
+Sus lin inc sh00 st0 (0000): 7258:77FF 8077:7FFF | >6000 7258:77FF | end 8077
+ every 2500 from 6519: - - - - - - - -
+Sus lin inc sh04 st0 (0400): 8301:437F 9075:46FF 9820:4A7F 10569:4DFF | >6000 15126:62FF | end 22067
+ every 12500 from 7491: 77FF - - - - - - -
+Sus lin inc sh08 st0 (0800): 8248:4037 9021:406F 9769:40A7 10520:40DF | >6000 120368:6027 | end 232485
+ every 100000 from 7452: 5C6F 78DF - - - - - -
+Sus lin inc sh08 st3 (08C0): 8213:401F 8992:403F 9842:405F 10587:407F | >6000 204865:601F | end 400676
+ every 200000 from 7506: 607F - - - - - - -
+Sus lin inc sh08 st0 b29 (2800): 8259:4037 9033:406F 9778:40A7 10527:40DF | >6000 120300:6027 | end 232503
+ every 100000 from 7448: 5C6F 78DF - - - - - -
+Sus lin inc sh11 st0 (0B00): 8300:4006 8975:400D 9820:4014 10566:401B | >6000 906767:6004 | end 1805384
+ every 500000 from 7497: 51CC 6399 7566 - - - - -
+Sus lin inc sh12 st0 (0C00): 9057:4006 10537:400D 12091:4014 13647:401B | >6000 1806121:6004 | end 3603231
+ every 1000000 from 7452: 51CC 6399 7566 - - - - -
+Sus lin inc sh16 st0 (1000): 11329:4006 35948:400D 60530:4014 85032:401B | >6000 - | end -
+ every 1000000 from 7506: 411E 423D 4355 4474 4593 46AB 47CA 48E9
+Sus lin dec sh00 st0 (4000): 8248:FFFF 8968:0000 | >6000 8248:FFFF | end 8968
+ every 2500 from 7452: - - - - - - - -
+Sus lin dec sh08 st0 (4800): 8370:3FBF 9144:3F7F 9889:3F3F 10638:3EFF | >6000 204167:FFFF | end 204934
+ every 100000 from 7558: 1F7F - - - - - - -
+Sus lin dec sh08 st3 (48C0): 8539:3FD7 9313:3FAF 10058:3F87 10807:3F5F | >6000 322608:FFEF | end 323375
+ every 200000 from 7727: 175F - - - - - - -
+Sus lin dec sh12 st0 (4C00): 9109:3FF7 10589:3FEF 12143:3FE7 13699:3FDF | >6000 3153301:FFFF | end 3154058
+ every 1000000 from 7504: 2BA7 174F 02F7 - - - - -
+Sus exp inc sh08 st0 (8800): 8416:4037 9091:406F 9936:40A7 10682:40DF | >6000 120495:6027 | end 568210
+ every 200000 from 7613: 6655 748D - - - - - -
+Sus exp inc sh10 st0 (8A00): 8259:400D 9033:401B 9778:4029 10527:4037 | >6000 457452:600B | end 2253051
+ every 500000 from 7448: 60EB 69D5 72B8 7BA2 - - - -
+Sus exp inc sh12 st0 (8C00): 9056:4006 10592:400D 12093:4014 13616:401B | >6000 1806109:6004 | end 8993854
+ every 2000000 from 7506: 60E4 69CE 72B1 7B9B - - - -
+Sus exp dec sh00 st0 (C000): 8300:1FFF 8975:0FFF 9820:07FF 10522:03FF | >6000 - | end 18269
+ every 2500 from 7497: 07FF 00FF 001F 0001 - - - -
+Sus exp dec sh08 st0 (C800): 8184:3FDF 8953:3FBF 9704:3F9F 10459:3F7F | >6000 - | end 1601768
+ every 500000 from 7388: 1138 0414 007B - - - - -
+Sus exp dec sh12 st0 (CC00): 9050:3FFB 10586:3FF7 12087:3FF3 13610:3FEF | >6000 - | end 13114219
+ every 2000000 from 7497: 2CBD 1E52 1426 0CFD 07E7 02D1 - -
+Sus lin inc sh31 st3 (1FC0): none | >6000 - | end -
+ every 250000 from 6822: 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Sus lin dec sh31 st3 (5FC0): none | >6000 - | end -
+ every 250000 from 6708: 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Sus exp inc sh31 st3 (9FC0): none | >6000 - | end -
+ every 250000 from 6703: 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Sus exp dec sh31 st3 (DFC0): none | >6000 - | end -
+ every 250000 from 6703: 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Sus lin dec sh31 st2 (5F80): none | >6000 - | end -
+ every 250000 from 6703: 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Done.
+```
+
+07REL.txt:
+
+```
+===== 07 REL SPU ADSR RELEASE | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+Release: voice 0 held at 7FFFh (attack shift 0, sustain level Fh, sustain never
+stepping), then KOFF. Changes from KOFF, the first fall to 4000h, the time it
+reached 0, eight readings.
+Rel lin sh00 (1FC0): 333:3FFF 902:FFFF 1661:0000 | <=4000 333:3FFF | end 1661
+ every 2500: - - - - - - - -
+Rel lin sh04 (1FC4): 297:3FFF 1293:3BFF 2072:37FF 2845:33FF | <=4000 297:3FFF | end 13638
+ every 12500: 03FF - - - - - - -
+Rel lin sh08 (1FC8): 303:3FBF 873:3F7F 1657:3F3F 2430:3EFF | <=4000 303:3FBF | end 196687
+ every 125000: 173F - - - - - - -
+Rel lin sh11 (1FCB): 298:3FF7 865:3FEF 1640:3FE7 2413:3FDF | <=4000 298:3FF7 | end 1573043
+ every 1000000: 1747 - - - - - - -
+Rel lin sh12 (1FCC): 295:3FFF 1394:3FF7 2898:3FEF 4514:3FE7 | <=4000 295:3FFF | end 3146360
+ every 1000000: 2BA7 174F 02F7 - - - - -
+Rel lin sh13 (1FCD): 297:3FFF 3590:3FF7 6662:3FEF 9734:3FE7 | <=4000 297:3FFF | end 6292812
+ every 1000000: 35D7 2BAF 217F 1757 0D27 02FF - -
+Rel lin sh16 (1FD0): 302:3FFF 7440:3FF7 32000:3FEF 56552:3FE7 | <=4000 302:3FFF | end -
+ every 1000000: 3EB7 3D6F 3C2F 3AE7 399F 385F 3717 35CF
+Rel exp sh00 (1FE0): 298:3FFF 555:1FFF 1227:0FFF 2000:07FF | <=4000 298:3FFF | end 10446
+ every 2500: 07FF 007F 000F 0001 - - - -
+Rel exp sh04 (1FE4): 303:3FFF 1087:3DFF 1865:3C0F 2641:3A2E | <=4000 303:3FFF | end 165497
+ every 25000: 1722 0857 02E4 0102 0051 0015 - -
+Rel exp sh08 (1FE8): 298:3FFF 1597:3FDF 2373:3FBF 3146:3F9F | <=4000 298:3FFF | end 1595194
+ every 375000: 1814 08B1 02CB 007C - - - -
+Rel exp sh11 (1FEB): 297:3FFF 1314:3FFB 2115:3FF7 2919:3FF3 | <=4000 297:3FFF | end 6553905
+ every 2000000: 1E54 0CFE 02D2 - - - - -
+Rel exp sh12 (1FEC): 298:3FFF 559:3FFB 2013:3FF7 3468:3FF3 | <=4000 298:3FFF | end 13105600
+ every 2000000: 2CBD 1E52 1424 0CFC 07E6 02D0 - -
+Attack linear shift 12 cut at 3552 by KOFF, release linear shift 8: 893:3512 1678:34D2 2437:3492 3198:3452 | <=0800 139852:07D2 | end 165246
+ every 250000: - - - - - - - -
+Level after the release, 200000 cycles: none
+Release linear shift 8, second KOFF at 0000: none | <=0800 - | end 313
+ every 125000: - - - - - - - -
+Done.
+```
+
+08SWP.txt:
+
+```
+===== 08 SWP SPU VOLUME SWEEP | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+Sweeps on voice 2's volume, voice 2 never keyed on. The start is set as a fixed
+volume 5000 cycles before (spx:574-577). Current volume 1E08h (spx:650). Changes
+from the sweep write, the time it reached 7FFFh (increase) or 0 (decrease).
+Fixed volume 1234h, cycles until 1E08h changes: 443:2468 25:2468 781:2468 605:2468
+Fixed volume 4000h (bit 14, spx:560 range) reads 1E08h 8000
+V2L from 0000 reg 8000 (reads 8000): 502:3800 1271:7000 2022:7FFF | x - | end 2022
+ every 2500: - - - - - - - -
+V2L from 0000 reg 8010 (reads 8010): 353:0380 1071:0700 1816:0A80 2566:0E00 | x - | end 27955
+ every 12500: 3B80 7380 - - - - - -
+V2L from 0000 reg 8020 (reads 8020): 348:0038 1068:0070 1813:00A8 2569:00E0 | x - | end 449489
+ every 100000: 1CA8 3918 5588 71F8 - - - -
+V2L from 0000 reg 8023 (reads 8023): 345:0020 967:0040 1827:0060 2572:0080 | x - | end 785912
+ every 200000: 20A0 4120 61C0 - - - - -
+V2L from 0000 reg 802C (reads 802C): 601:0007 1373:000E 2123:0015 2868:001C | x - | end 3594834
+ every 500000: 11CD 239A 3567 4734 5901 6ACE 7C9B -
+V2L from 0000 reg 8030 (reads 8030): 1210:0007 2690:000E 4239:0015 5786:001C | x - | end 7189624
+ every 1000000: 11CD 239A 3567 4734 5901 6ACE 7C9B -
+V2L from 0000 reg 8040 (reads 8040): 23031:0007 47632:000E 72227:0015 96815:001C | x - | end -
+ every 1000000: 0118 0237 0356 046E 058D 06AC 07C4 08E3
+V2L from 7FFE reg A020 (reads A020): 701:7FBE 1473:7F7E 2223:7F3E 2968:7EFE | x - | end 393921
+ every 125000: 573E 2EBE 05FE - - - - -
+V2L from 7FFE reg A030 (reads A030): 1511:7FF6 2990:7FEE 4544:7FE6 6094:7FDE | x - | end 6292211
+ every 1000000: 6BA6 574E 42F6 2E9E 1A46 05EE - -
+V2L from 0000 reg C020 (reads C020): 348:0038 869:0070 1614:00A8 2362:00E0 | x - | end 785778
+ every 200000: 3918 6484 72CA - - - - -
+V2L from 0000 reg C030 (reads C030): 607:0007 2143:000E 3649:0015 5159:001C | x - | end 12575051
+ every 2000000: 239A 4734 62B6 6BA0 7483 7D6D - -
+V2L from 7FFE reg E000 (reads E000): 352:3FFF 967:1FFF 1714:0FFF 2459:07FF | x - | end 10952
+ every 2500: 07FF 00FF 001F 0003 - - - -
+V2L from 7FFE reg E020 (reads E020): 501:7FBE 1170:7F7E 1918:7F3E 2773:7EFE | x - | end 1863550
+ every 500000: 2323 0925 01DA - - - - -
+V2L from 7FFE reg E030 (reads E030): 1037:7FF6 2573:7FEE 4183:7FE6 5701:7FDE | x - | end -
+ every 2000000: 5B31 3FEA 2CAD 1E47 141B 0CF7 07E1 02CA
+V2L from 2000 reg 9020 (reads 9020): 348:1FC0 965:1F80 1712:1F40 2567:1F00 | x - | end -
+ every 250000: CE80 8000 8000 8000 8000 8000 8000 8000
+V2L from C000 reg 8020 (reads 8020): 348:C038 874:C070 1619:C0A8 2366:C0E0 | x - | end 673542
+ every 250000: 0750 4EA0 - - - - - -
+V2L from C000 reg B020 (reads B020): 501:C038 1170:C070 1918:C0A8 2773:C0E0 | x - | end -
+ every 250000: 0000 0000 0000 0000 0000 0000 0000 0000
+V2L from 2000 reg B020 (reads B020): 804:0000 | x - | end -
+ every 250000: 0000 0000 0000 0000 0000 0000 0000 0000
+V2L from 7FFE reg F020 (reads F020): 509:7FBE 1278:7F7E 2131:7F3E 2876:7EFE | x - | end -
+ every 500000: 2323 0925 01DA 0000 0000 0000 0000 0000
+V2L from 2000 reg 807F (reads 807F): none | x - | end -
+ every 250000: 2000 2000 2000 2000 2000 2000 2000 2000
+V2L from 2000 reg B07F (reads B07F): 504:0000 | x - | end -
+ every 250000: 0000 0000 0000 0000 0000 0000 0000 0000
+V2R from 0000 reg 8020 (reads 8020): 358:0038 1078:0070 1830:00A8 2575:00E0 | x - | end 449623
+ every 100000: 1C70 3918 5588 71F8 - - - -
+V0L from 0000 reg 8020 (reads 8020): 348:0038 1174:0070 1919:00A8 2667:00E0 | x - | end 449599
+ every 100000: 1C70 3918 5588 71F8 - - - -
+Done.
+```
+
+09END.txt:
+
+```
+===== 09 END SPU ENDX LOOPS | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+Voice 0. S1, S2, S4: one, two, four blocks, the last End+Repeat. Cycles from KON
+until ENDX bit 0 reads 0 (0: it never read 1 after KON), and until it reads 1
+(0: not within the limit).
+S1 pitch 1000, ENDX bit 0 clear, set: 1636,17020 857,16203 793,16145 2193,17543
+S2 pitch 1000, ENDX bit 0 clear, set: 929,37802 852,37732
+S4 pitch 1000, ENDX bit 0 clear, set: 877,80774 855,80751
+S4 pitch 0800, ENDX bit 0 clear, set: 875,157596
+S4 pitch 2000, ENDX bit 0 clear, set: 875,42348
+S4 pitch 3FFF, ENDX bit 0 clear, set: 929,23957
+S4 pitch 4000, ENDX bit 0 clear, set: 927,23959
+S4 pitch 4001, ENDX bit 0 clear, set: 879,23905
+S4 pitch 8000, ENDX bit 0 clear, set: 929,23957
+S4 pitch FFFF, ENDX bit 0 clear, set: 927,23959
+S1 pitch 0100, ENDX bit 0 clear, set: 927,200599
+S1 pitch 0001, ENDX bit 0 clear, set: 877,0
+S1 pitch 0000, ENDX bit 0 clear, set: 57,0
+S4+8 pitch 1000, ENDX bit 0 clear, set: 57,68487
+ENDX low FFFF, write 0000h reads 0000, then: 11839:FFFE 19543:FFFF
+ENDX write 5555h reads 5555, then: 479:0000 7389:FFFE 15059:FFFF
+ENDX high 00FF
+L (loop start at block 1), repeat was 4000: right after KON 4000, then: 18752:4082
+S4 (loop start at block 0), repeat was 4100: right after KON 4100, then: 1832:4060
+M (End+Mute at block 1), repeat 4100: ENDX set at 38166:0001, level then 0000, repeat 4100
+M, level from 20000 cycles after KON: 37909:0000
+L, repeat 40E0 written 2000 cycles after KON (reads 40E0), 150000 later: 4082
+L, repeat 40E0 written 200000 cycles after KON (reads 40E0), 200000 later: 40E0, 400000 later: 40E0
+Start written during play reads 4020
+Done.
+```
+
+10IRQ.txt:
+
+```
+===== 10 IRQ SPU IRQ9 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+Voice 0 keyed on, IRQ address as shown, cycles from KON to SPUSTAT bit 6 and to
+I_STAT bit 9 (0 = not within the limit). S4 at 4060h, four blocks of 10h bytes.
+S4 pitch 1000 IRQ 4060: SPUSTAT.6 at 1255, I_STAT.9 at 1056
+S4 pitch 1000 IRQ 4061: SPUSTAT.6 at 6456, I_STAT.9 at 6254
+S4 pitch 1000 IRQ 4062: SPUSTAT.6 at 306, I_STAT.9 at 44
+S4 pitch 1000 IRQ 4064: SPUSTAT.6 at 40234, I_STAT.9 at 39972
+S4 pitch 1000 IRQ 4065: SPUSTAT.6 at 49475, I_STAT.9 at 49213
+S4 pitch 1000 IRQ 4066: SPUSTAT.6 at 315, I_STAT.9 at 116
+S4 pitch 0400 IRQ 4064: SPUSTAT.6 at 150828, I_STAT.9 at 150566
+S4 pitch 4000 IRQ 4064: SPUSTAT.6 at 306, I_STAT.9 at 44
+S4 noise pitch 1000 IRQ 4064: SPUSTAT.6 at 40183, I_STAT.9 at 39984
+S4 pitch 0000 IRQ 4064: SPUSTAT.6 at 0, I_STAT.9 at 0
+M (End+Mute at block 1) with the repeat address set before KON to P (4100h):
+M, IRQ at P pitch 1000 IRQ 4100: SPUSTAT.6 at 40236, I_STAT.9 at 39974
+M, repeat P, IRQ at M block 0, IRQ 40A0, hits: 1604 3101 4655 6196 7733; SPUSTAT.6 read 0 after the first acknowledge (cycles from KON): 2383:0000
+S1 released 100000 cycles before, level 0000, IRQ at S1: SPUSTAT.6 at 101
+S1 looping, IRQ 4020, hits: 671 2209 3702 5239 6775; SPUSTAT.6 read 0 after the first acknowledge (cycles from KON): 1430:0000
+S4 looping, IRQ 4064, hits: 41455 43005 44502 46038 47574; SPUSTAT.6 read 0 after the first acknowledge (cycles from KON): 42214:0000
+Manual writes of k halfwords from 61FF (8 bytes before the IRQ address 6200):
+ k=1 SPUSTAT.6 0 I_STAT.9 0 k=2 SPUSTAT.6 0 I_STAT.9 0 k=3 SPUSTAT.6 0 I_STAT.9 0 k=4 SPUSTAT.6 1 I_STAT.9 1
+ k=5 SPUSTAT.6 1 I_STAT.9 1 k=6 SPUSTAT.6 1 I_STAT.9 1 k=7 SPUSTAT.6 1 I_STAT.9 1 k=8 SPUSTAT.6 1 I_STAT.9 1
+DMA write 64 bytes from 32 before the IRQ address: SPUSTAT.6 0
+DMA write 64 bytes ending just before it: SPUSTAT.6 0
+DMA write 64 bytes from 8 after it: SPUSTAT.6 0
+DMA read 64 bytes from 32 before it: SPUSTAT.6 1
+DMA read 64 bytes ending just before it: SPUSTAT.6 1
+DMA write over it with IRQ9 enable clear, then enabled: SPUSTAT.6 0
+IRQ address write 1234h reads 1234
+Done.
+```
+
+11CAP.txt:
+
+```
+===== 11 CAP SPU CAPTURE TIMING | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+SPUSTAT bit 11 (spx:716, :723-725) over 1.2 million cycles; then capture IRQs
+(spx:848-856), timed from a rise of bit 11, with bit 11 at each hit (h/l).
+Transfer control 0004, SPUSTAT bit 11 changes: 71999:0800 268631:0000 465215:0800 661809:0000 858455:0800 1055039:0000
+Transfer control 0000, SPUSTAT bit 11 changes: none
+Transfer control 0008, SPUSTAT bit 11 changes: 374:0000 196965:0800 393573:0000 590181:0800 786789:0000 983397:0800 1180005:0000
+Transfer control 000C, SPUSTAT bit 11 changes: none
+Transfer control 0002, SPUSTAT bit 11 changes: none
+IRQ 0000, transfer control 0004, from bit 11 rising, hits: none
+IRQ 0040, transfer control 0004, from bit 11 rising, hits: none
+IRQ 0080, transfer control 0004, from bit 11 rising, hits: none
+IRQ 00C0, transfer control 0004, from bit 11 rising, hits: none
+IRQ 0100, transfer control 0004, from bit 11 rising, hits: none
+IRQ 0180, transfer control 0004, from bit 11 rising, hits: none
+IRQ 01FF, transfer control 0004, from bit 11 rising, hits: none
+IRQ 0001, transfer control 0004, from bit 11 rising, hits: none
+IRQ 0100, transfer control 0000, from bit 11 rising (no rise seen), hits: none
+IRQ 0100, transfer control 0008, from bit 11 rising, hits: none
+IRQ 0200, transfer control 0004, from bit 11 rising, hits: none
+Done.
+```
+
+12VCP.txt:
+
+```
+===== 12 VCP SPU CAPTURE NOISE | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+The first half (256 samples) of a capture buffer, read by DMA right after SPUSTAT
+bit 11 rises. Tone T: block 0 shift 4 filter 0 nibbles 0..F, block 1 shift 4
+filter 1, looped. ADSR held at 7FFFh unless shown. Volumes 0, main volume 0.
+Voice 1 T pitch 1000h, 255 changes in 256:
+ 01FD 027C 02FC 024B FD30 FC83 FD03 FD88 FE28 FEC5 FF57 FFE1 0062 00DB 014C 01B7
+ 021B 0278 02D0 0322 036F 0392 02FE 024F 01AA 010F 007E FFF7 FF78 FF01 FE91 FE29
+ FDC7 FD6A FD14 FD4A FF98 007E 00FE 017D 01FD 027C 02FC 024B FD30 FC83 FD03 FD82
+ FE01 FE81 FF00 FF80 FFFF 007E 00FE 017D 01FD 027C 02FC 024B FD30 FC83 FD03 FD88
+Voice 1 T pitch 0800h, 255 changes in 256:
+ FD42 FD82 FDC2 FE01 FE41 FE81 FEC1 FF00 FF40 FF80 FFC0 FFFF 003F 007E 00BE 00FE
+ 013E 017D 01BD 01FD 023C 027C 02BC 02FC 0321 024B FFBC FD30 FC5D FC83 FCC2 FD03
+Voice 1 T pitch 2000h, 255 changes in 256:
+ FD4A 007E 017D 027C 024B FC83 FD82 FE81 FF80 007E 017D 027C 024B FC83 FD88 FEC5
+ FFE1 00DB 01B7 0278 0322 0392 024F 010F FFF7 FF01 FE29 FD6A FD4A 007E 017D 027C
+Voice 1 T pitch 1000h, ADSR decayed to sustain level 7, 255 changes in 256:
+ FF98 007E 00FE 017D 01FD 027C 02FC 024B FD30 FC83 FD03 FD82 FE01 FE81 FF00 FF80
+ FFFF 007E 00FE 017D 01FD 027C 02FC 024B FD30 FC83 FD03 FD88 FE28 FEC5 FF57 FFE1
+Its level 3FFF
+Voice 1 released, 0 changes in 256:
+ 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
+Voice 3 T pitch 1000h, 255 changes in 256:
+ 036F 0392 02FE 024F 01AA 010F 007E FFF7 FF78 FF01 FE91 FE29 FDC7 FD6A FD14 FD4A
+ FF98 007E 00FE 017D 01FD 027C 02FC 024B FD30 FC83 FD03 FD82 FE01 FE81 FF00 FF80
+CD left, no CD playing, 0 changes in 256:
+ 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
+CD right, 0 changes in 256:
+ 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
+Noise (spx:680-696): voice 1 noise mode, SPUCNT noise shift and step as shown.
+Noise shift 15 step 3, 255 changes in 256:
+ D72F 2E5D DCBC 3977 F2F0 E5E0 CBC2 1782 2F05 DE0D 3C19 F835 F06B E0D7 C1AE 035B
+ 06B7 0D70 1AE1 35C2 EB87 D70E 2E1B DC38 386F F0E0 E1C0 C380 0700 0E01 1C02 3805
+Noise shift 15 step 0, 255 changes in 256:
+ 2FF1 DFE5 3FC9 FF95 FF2A FE55 FCAB F957 F2AE E55D CABC 1576 2AED D5DD 2BB8 D774
+ 2EE6 DDCE 3B9B F738 EE71 DCE3 39C4 F38A E714 CE29 1C52 38A4 F14B E296 C52D 0A59
+Noise shift 14 step 0, 128 changes in 256:
+ F68A ED15 ED15 DA2A DA2A 3453 3453 E8A8 E8A8 D151 D151 22A0 22A0 C542 C542 0A84
+ 0A84 1509 1509 2A12 2A12 D427 D427 284C 284C D09B D09B 2135 2135 C26D C26D 04D9
+Noise shift 12 step 0, 31 changes in 256:
+ D3EF D3EF D3EF D3EF D3EF D3EF D3EF D3EF 27DC 27DC 27DC 27DC 27DC 27DC 27DC 27DC
+ CFBC CFBC CFBC CFBC CFBC CFBC CFBC CFBC 1F77 1F77 1F77 1F77 1F77 1F77 1F77 1F77
+Noise shift 10 step 0, 8 changes in 256:
+ 1E01 1E01 1E01 1E01 3C02 3C02 3C02 3C02 3C02 3C02 3C02 3C02 3C02 3C02 3C02 3C02
+ 3C02 3C02 3C02 3C02 3C02 3C02 3C02 3C02 3C02 3C02 3C02 3C02 3C02 3C02 3C02 3C02
+Noise shift 8 step 0, 2 changes in 256:
+ 363A 363A 363A 363A 363A 363A 363A 363A 363A 363A 363A 363A 363A 363A 363A 363A
+ 363A 363A 363A 363A 363A 363A 363A 363A 363A 363A 363A 363A 363A 363A 363A 363A
+Noise shift 4 step 0, 0 changes in 256:
+ 31DD 31DD 31DD 31DD 31DD 31DD 31DD 31DD 31DD 31DD 31DD 31DD 31DD 31DD 31DD 31DD
+ 31DD 31DD 31DD 31DD 31DD 31DD 31DD 31DD 31DD 31DD 31DD 31DD 31DD 31DD 31DD 31DD
+Done.
+```
+
+13XFR.txt:
+
+```
+===== 13 XFR SPU TRANSFERS | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+Scratch at 30000h (6000h), filled with EEEEh before each row, read back by DMA
+with transfer control 0004h. Halfwords written: A000h, A001h, ...
+Transfer address write 6000h reads 6000, after 8 manual 6000, after DMA 6000
+Fifo 1DA8h reads A007 A007
+4 manual, then 4 more (A008h..) with no new address: A000 A001 A002 A003 A008 A009 A00A A00B EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+4 manual, then 4 written to the Fifo in Manual Write mode: A000 A001 A002 A003 EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+40 halfwords into the Fifo (32 deep, spx:741): A000 A001 A002 A003 A004 A005 A006 A007 A008 A009 A00A A00B A00C A00D A00E A00F A010 A011 A012 A013 A014 A015 A016 A017 A018 A019 A01A A01B A01C A01D A01E A01F EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+Type 0 manual 8: A007 EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+Type 1 manual 8: A007 EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+Type 2 manual 8: A000 A001 A002 A003 A004 A005 A006 A007 EEEE EEEE
+Type 3 manual 8: A000 A002 A004 A006 EEEE EEEE EEEE EEEE EEEE EEEE
+Type 4 manual 8: A003 A007 EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+Type 5 manual 8: A006 EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+Type 6 manual 8: A007 EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+Type 7 manual 8: A007 EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+Type 3 DMA write of B000h, B001h, ..: B000 B002 B004 EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+Type 3 DMA read of C000h, C001h, ..: C000 FFFF C001 FFFF C002 FFFF C003 FFFF C004 FFFF EEEE FFFF EEEE FFFF EEEE FFFF EEEE FFFF EEEE FFFF
+Type 4 DMA read of C000h, C001h, ..: C000 C000 C000 C000 C001 C001 C001 C001 C002 C002 C002 C002 C003 C003 C003 C003 C004 C004 C004 C004
+Type 5 DMA read of C000h, C001h, ..: C000 0000 C000 0000 C000 0000 C000 0000 C001 0000 C001 0000 C001 0000 C001 0000 C002 0000 C002 0000
+Manual Write of 1, SPUSTAT (bit 11 masked) was 0000, from the SPUCNT write: 278:0010
+Manual Write of 4, SPUSTAT (bit 11 masked) was 0000, from the SPUCNT write: 312:0010
+Manual Write of 16, SPUSTAT (bit 11 masked) was 0000, from the SPUCNT write: 201:0410 948:0010
+1F801014h 200931E1h, DMA read 128 bytes of D000h..:
+ FFFF D000 D001 D002 D003 D004 D005 A006 A007 A008 A009 A00A A00B A00C A00D A00E
+ A00F EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+ FFFF EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+1F801014h 200931E1h, DMA read 128 bytes of D000h..:
+ FFFF D000 D001 D002 D003 D004 D005 A006 A007 A008 A009 A00A A00B A00C FFFF A00E
+ A00F EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+ FFFF EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+Done.
+```
+
+14REG.txt:
+
+```
+===== 14 REG SPU REGISTERS | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+1DBCh-1DBFh and 1E60h-1E7Fh (spx:1108-1121), written and read back, put back.
+1DBCh DFFF F7FF, 1E60h..: F5FF F3FF BFFF 29DF 74BB FFEE BFF7 FFFF FFFF FD7D 6EFF 3BB3 FC7F FFFF BFFF 7D8F
+Unknown 1DBC: was DFFF, write 1234 reads 1234
+Unknown 1DBE: was F7FF, write FEDC reads FEDC
+1E60h.. written inverted, reads: 0A00 0C00 4000 D620 8B44 0011 4008 0000 0000 0282 9100 C44C 0380 0000 4000 8270
+Unknown 1DA0h 1DA0: was AC00, write 5A5A reads 5A5A
+Voice 5 registers written FFFFh:
+ volume L 1C50: was 0000, write 7FFF reads 7FFF
+ volume L sweep 1C50: was 0000, write FFFF reads FFFF
+ pitch 1C54: was 1000, write FFFF reads FFFF
+ start 1C56: was 4000, write FFFF reads FFFF
+ ADSR low 1C58: was 000F, write FFFF reads FFFF
+ ADSR high 1C5A: was 1FC0, write FFFF reads FFFF
+ repeat 1C5E: was 4000, write FFFF reads FFFF
+Voice flag registers (bits 24-31 not used, spx:660, :666, :683; PMON bit 0 :382):
+ PMON low 1D90: was 0000, write FFFF reads FFFF
+ PMON high 1D92: was 0000, write FFFF reads FFFF
+ NON high 1D96: was 0000, write FFFF reads FFFF
+ EON high 1D9A: was 0000, write FFFF reads FFFF
+ ENDX high 1D9E: was 00FF, write FFFF reads FFFF
+ CD volume L 1DB0: was 0000, write 8765 reads 8765
+ extern volume R 1DB6: was 0000, write 8765 reads 8765
+ reverb volume L 1D84: was 0000, write 8001 reads 8001
+ mBASE 1DA2: was FFFE, write 1234 reads 1234
+Main volume L sweep A020 reads A020, current main volume 1DB8h 0000 0000
+32-bit stores to 1C58h, 32 tries: low half wrong 6, high half wrong 0
+1C58h lw 1357ABCD, lbu 1C58h CD 1C59h AB 1C5Ah 57
+sb 12345678h to 1C54h: 5678; to 1C55h over 1111h: 1111
+Done.
+```
+
+15UNU.txt:
+
+```
+===== 15 UNU SPU UNUSED 1E80 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+Halfword reads of 1F801E80h..1F801FFEh; lbu and lw of 1F801E80h last.
+
+192 of 192 read FFFFh
+lbu 1E80h: FF
+lw 1E80h: FFFFFFFF
+lw 1E7Ch: 7D8FBFFF
+Done.
+```
+
+### Run 5501a-card-h on 28 September 2026
+
+Raw output: [00RUN.txt](/tests/raw/20260928T0000Z-5501a-card-h/spuenv/00RUN.txt) · [01STA.txt](/tests/raw/20260928T0000Z-5501a-card-h/spuenv/01STA.txt) · [02CNT.txt](/tests/raw/20260928T0000Z-5501a-card-h/spuenv/02CNT.txt) · [03KON.txt](/tests/raw/20260928T0000Z-5501a-card-h/spuenv/03KON.txt) · [04ATK.txt](/tests/raw/20260928T0000Z-5501a-card-h/spuenv/04ATK.txt) · [05DEC.txt](/tests/raw/20260928T0000Z-5501a-card-h/spuenv/05DEC.txt) · [06SUS.txt](/tests/raw/20260928T0000Z-5501a-card-h/spuenv/06SUS.txt) · [07REL.txt](/tests/raw/20260928T0000Z-5501a-card-h/spuenv/07REL.txt) · [08SWP.txt](/tests/raw/20260928T0000Z-5501a-card-h/spuenv/08SWP.txt) · [09END.txt](/tests/raw/20260928T0000Z-5501a-card-h/spuenv/09END.txt) · [10IRQ.txt](/tests/raw/20260928T0000Z-5501a-card-h/spuenv/10IRQ.txt) · [11CAP.txt](/tests/raw/20260928T0000Z-5501a-card-h/spuenv/11CAP.txt) · [12VCP.txt](/tests/raw/20260928T0000Z-5501a-card-h/spuenv/12VCP.txt) · [13XFR.txt](/tests/raw/20260928T0000Z-5501a-card-h/spuenv/13XFR.txt) · [14REG.txt](/tests/raw/20260928T0000Z-5501a-card-h/spuenv/14REG.txt) · [15UNU.txt](/tests/raw/20260928T0000Z-5501a-card-h/spuenv/15UNU.txt)
+
+00RUN.txt:
+
+```
+===== 00 RUN | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+15 tests
+A chain program, linked at 80010000
+Saved on the card in slot 2, from image 1
+COP0 at start: BPC 00000000 BDA 00000000 TAR 8010E9B4 DCIC 00000000 BadVaddr 00000480 BDAM 00000000
+BPCM 00000000 SR 40000000 Cause 00000020 EPC 8010F568 PRId 00000002
+```
+
+01STA.txt:
+
+```
+===== 01 STA SPU STATE AT ENTRY | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+SPU registers as this program found them, nothing written first.
+1DA8h, the transfer Fifo, is not read (shown ----).
+1C00: 0000 0000 3FFF 0200 0000 0000 0000 0200 0000 0000 3FFF 0200 0000 0000 0000 0200
+1C20: 0000 0000 3FFF 0200 0000 0000 0000 0200 0000 0000 3FFF 0200 0000 0000 0000 0200
+1C40: 0000 0000 3FFF 0200 0000 0000 0000 0200 0000 0000 3FFF 0200 0000 0000 0000 0200
+1C60: 0000 0000 3FFF 0200 0000 0000 0000 0200 0000 0000 3FFF 0200 0000 0000 0000 0200
+1C80: 0000 0000 3FFF 0200 0000 0000 0000 0200 0000 0000 3FFF 0200 0000 0000 0000 0200
+1CA0: 0000 0000 3FFF 0200 0000 0000 0000 0200 0000 0000 3FFF 0200 0000 0000 0000 0200
+1CC0: 0000 0000 3FFF 0200 0000 0000 0000 0200 0000 0000 3FFF 0200 0000 0000 0000 0200
+1CE0: 0000 0000 3FFF 0200 0000 0000 0000 0200 0000 0000 3FFF 0200 0000 0000 0000 0200
+1D00: 0000 0000 3FFF 0200 0000 0000 0000 0200 0000 0000 3FFF 0200 0000 0000 0000 0200
+1D20: 0000 0000 3FFF 0200 0000 0000 0000 0200 0000 0000 3FFF 0200 0000 0000 0000 0200
+1D40: 0000 0000 3FFF 0200 0000 0000 0000 0200 0000 0000 3FFF 0200 0000 0000 0000 0200
+1D60: 0000 0000 3FFF 0200 0000 0000 0000 0200 0000 0000 3FFF 0200 0000 0000 0000 0200
+1D80: 0000 0000 0000 0000 FFFF 00FF FFFF 00FF 0000 0000 0000 0000 0000 0000 FFFF 00FF
+1DA0: AC00 FFFE FFFE 0200 ---- C085 0004 0805 0000 0000 0000 0000 0000 0000 DFFF F7FF
+1DC0: 033D 0231 7E00 5000 B400 B000 4C00 B000 6000 5400 1ED6 1A31 1D14 183B 1BC2 16B2
+1DE0: 1A32 15EF 15EE 1055 1334 0F2D 11F6 0C5D 1056 0AE1 0AE0 07A2 0464 0232 8000 8000
+1E00: 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
+1E20: 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
+1E40: 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
+1E60: F5FF F3FF BFFF 29DF 74BB FFFE BFF7 FFEF FFFF FD7D 6EFF 3BF3 FC7F FFFF BFFF 7D8F
+1DA0h read 16 times in a row: 0100 0100 0100 AC00 AC00 AC00 AC00 AC00 AC00 AC00 AC00 AC00 AC00 AC00 AC00 AC00
+1DA0h read 16 times 100000 cycles apart: AC00 AC00 AC00 AC00 AC00 AC00 AC00 AC00 AC00 0100 AC00 AC00 0100 AC00 AC00 AC00
+SPUSTAT read 16 times 5000 cycles apart: 0005 0005 0005 0005 0005 0005 0005 0005 0005 0005 0005 0005 0005 0005 0005 0005
+SPU_DELAY 1F801014h: 200931E1
+Done.
+```
+
+02CNT.txt:
+
+```
+===== 02 CNT SPU SPUCNT TO STAT | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+SPUSTAT 5-0 is SPUCNT 5-0 applied a bit delayed (spx:726); bit 7 is like SPUCNT
+bit 5 (spx:721); DMA read sets 9 and 7 late (spx:727-729). Times from the SPUCNT
+write, cycles:value, for 20000 cycles or six changes; bit 11 (capture half) masked
+out. Transfer address 30000h.
+SPUCNT 8000 to 8010, SPUSTAT was 0000, changes: 635:0010
+SPUCNT 8010 to 8000, SPUSTAT was 0010, changes: 641:0000
+SPUCNT 8000 to 8020, SPUSTAT was 0000, changes: 61:02A0
+SPUCNT 8020 to 8000, SPUSTAT was 02A0, changes: 652:0000
+SPUCNT 8000 to 8030, SPUSTAT was 0000, changes: 293:0030 1853:01B0
+SPUCNT 8030 to 8000, SPUSTAT was 01B0, changes: 295:0000
+SPUCNT 8000 to 8001, SPUSTAT was 0000, changes: 703:0001
+SPUCNT 8001 to 8000, SPUSTAT was 0001, changes: 702:0000
+SPUCNT 8000 to 8002, SPUSTAT was 0000, changes: 765:0002
+SPUCNT 8002 to 8000, SPUSTAT was 0002, changes: 760:0000
+SPUCNT 8000 to 8004, SPUSTAT was 0000, changes: 758:0004
+SPUCNT 8004 to 8000, SPUSTAT was 0004, changes: 61:0000
+SPUCNT 8000 to 8008, SPUSTAT was 0000, changes: 295:0008
+SPUCNT 8008 to 8000, SPUSTAT was 0008, changes: 351:0000
+SPUCNT 8000 to 803F, SPUSTAT was 0000, changes: 356:003F 1914:01BF
+SPUCNT 803F to 8000, SPUSTAT was 01BF, changes: 414:0000
+SPUCNT 8000 to 8040, SPUSTAT was 0000, changes: none
+SPUCNT 8040 to 8000, SPUSTAT was 0000, changes: none
+SPUCNT 8000 to 8100, SPUSTAT was 0000, changes: none
+SPUCNT 8100 to 8000, SPUSTAT was 0000, changes: none
+SPUCNT 8000 to BC00, SPUSTAT was 0000, changes: none
+SPUCNT BC00 to 8000, SPUSTAT was 0000, changes: none
+SPUCNT 8000 to 0000, SPUSTAT was 0000, changes: none
+SPUCNT 0000 to 8000, SPUSTAT was 0000, changes: none
+SPUCNT 8010 to 8020, SPUSTAT was 0010, changes: 652:02A0
+SPUCNT 8020 to 8030, SPUSTAT was 02A0, changes: 467:00B0 1216:01B0
+SPUCNT 8030 to 8010, SPUSTAT was 01B0, changes: 61:0010
+SPUCNT 8000h to 8010h, cycles until SPUSTAT 5-0 = 10h, 8 times: 322 257 200 83 728 664 547 492
+SPUCNT write BF00h reads BF00 at once, BF00 after 3000 cycles
+SPUSTAT was 0000, write FFFFh reads FFFF at once, then: 689:0000
+SPUSTAT write 0000h reads 0000 at once, then: none
+Transfer control write FFFFh reads FFFF, write 0004h reads 0004
+Done.
+```
+
+03KON.txt:
+
+```
+===== 03 KON SPU KEY ON OFF | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+Voice 0, silent loop at 20000h, pitch 1000h. Cycles from the write.
+KON to the first level change (attack linear shift 0 step 0): 4554 4582 4460 4343 4238 4176 4052 3992
+KON to the second change: 5296 5350 5228 5109 5004 4943 4818 4760
+KOFF at 7FFFh to the first change (release linear shift 0): 69 39 39 39 39 39 39 39
+KON again at 3FFF, level: 1221:0000 5016:3800 5818:7000 6562:7FFF 7362:3FFF
+KON again at 3FFF, level: 71:0000 3906:3800 4650:7000 5450:7FFF 6195:3FFF
+KON again at 3FFF, level: 883:0000 4711:3800 5455:7000 6255:7FFF 7000:3FFF
+KON again at 3FFF, level: 1235:0000 5065:3800 5865:7000 6610:7FFF 7359:3FFF
+Attack linear shift 10: KON again at 2354, level: 403:2362 1144:0000 4973:000E 5773:001C 6518:002A 7267:0038
+KON then KOFF back to back, level: 4445:3800 5188:7000 5937:7FFF 6739:3FFF
+At 7FFFh, KOFF then KON back to back, level: 125:3FFF 1572:0000 5402:3800 6146:7000 6946:7FFF 7691:3FFF
+KON write 0001h reads 0001 (high 0000), 0001 after 5000; KOFF 0001h reads 0001 (high 0000); KON high FF00h reads FF00
+KOFF high FF00h reads FF00
+SPUCNT 0000h, KON attack linear shift 8, level: none
+then SPUCNT 8000h (level was 0000), level: none ENDX low FFFF
+At 7FFFh, SPUCNT to 0000h, level: 81:3FFF 446:0000
+then SPUCNT 8000h (level was 0000), level: none
+Sustain never stepping at 7FFFh, write level 1234h: reads 1234, then: none
+Sustain linear increase shift 8, write level 1234h: reads 1234, then: 269:4A34 1016:7FFF 1818:3FFF 2563:4037 3312:406F 4114:40A7
+Voice released to 0, write level 1234h: reads 1234, then: 623:D234 1424:0000
+Voice 5, released, write level 8123h: reads 8123
+Done.
+```
+
+04ATK.txt:
+
+```
+===== 04 ATK SPU ADSR ATTACK | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+Attack: voice 0, ADSR low as shown (decay 0, sustain level Fh), sustain never
+stepping. Level changes cycles:value from KON, the first rise above 6000h, the time
+it reached 7FFFh, then eight readings.
+Lin sh00 st0 (000F): 5205:3800 5974:7000 6771:7FFF | >6000 5974:7000 | end 6771
+ every 2500: 0000 0000 - - - - - -
+Lin sh00 st1 (010F): 4350:3000 5142:6000 5887:7FFF | >6000 5887:7FFF | end 5887
+ every 2500: 0000 3000 - - - - - -
+Lin sh00 st2 (020F): 4364:2800 5156:5000 5901:7800 6693:7FFF | >6000 5901:7800 | end 6693
+ every 2500: 0000 2800 - - - - - -
+Lin sh00 st3 (030F): 4348:2000 5140:4000 5885:6000 6739:7FFF | >6000 6739:7FFF | end 6739
+ every 2500: 0000 2000 - - - - - -
+Lin sh02 st0 (080F): 4403:0E00 5227:1C00 5977:2A00 6728:3800 | >6000 9011:6200 | end 11262
+ every 5000: 0E00 7000 - - - - - -
+Lin sh05 st0 (140F): 4402:01C0 5176:0380 5926:0540 6676:0700 | >6000 45855:6040 | end 60459
+ every 25000: 2F40 6900 - - - - - -
+Lin sh08 st0 (200F): 4402:0038 5176:0070 5926:00A8 6676:00E0 | >6000 340767:6008 | end 453664
+ every 100000: 1B58 37C8 5438 70E0 - - - -
+Lin sh10 st0 (280F): 4420:000E 5095:001C 5950:002A 6701:0038 | >6000 1352211:6008 | end 1801523
+ every 300000: 150E 2A70 3FD2 5526 6A88 7FEA - -
+Lin sh11 st0 (2C0F): 4411:0007 5086:000E 5941:0015 6692:001C | >6000 2700091:6001 | end 3598603
+ every 500000: 11AA 2377 3544 4711 58DE 6AAB 7C78 -
+Lin sh11 st3 (2F0F): 4407:0004 5181:0008 5939:000C 6689:0010 | >6000 4722988:6004 | end 6295054
+ every 1000000: 1444 289C 3CF4 514C 65A4 79FC - -
+Lin sh12 st0 (300F): 5128:0007 6708:000E 8169:0015 9724:001C | >6000 5396532:6001 | end 7193630
+ every 1000000: 11B8 2385 3552 471F 58EC 6AC0 7C86 -
+Lin sh13 st0 (340F): 5931:0007 9016:000E 12075:0015 15135:001C | >6000 - | end -
+ every 1000000: 08DC 11C6 1AA9 2393 2C76 3560 3E43 472D
+Lin sh14 st0 (380F): 5213:0007 11319:000E 17501:0015 23583:001C | >6000 - | end -
+ every 1000000: 046E 08E3 0D58 11CD 163B 1AB0 1F25 239A
+Lin sh16 st0 (400F): 22827:0007 47435:000E 71948:0015 96535:001C | >6000 - | end -
+ every 1000000: 0118 0237 0356 046E 058D 06AC 07C4 08E3
+Lin sh20 st0 (500F): 28946:0007 422142:000E 815410:0015 1208626:001C | >6000 - | end -
+ every 1000000: 0015 002A 0038 004D 005B 0070 007E 0093
+Lin sh24 st0 (600F): 5526351:0007 11817725:000E | >6000 - | end -
+ every 2000000: 0000 0000 0007 0007 0007 000E 000E 000E
+Lin sh26 st2 (6A0F): 5193006:0005 30358850:000A | >6000 - | end -
+ every 4250000: 0000 0005 0005 0005 0005 0005 0005 000A
+Lin sh29 st2 (760F): 21462346:0005 | >6000 - | end -
+ every 4250000: 0000 0000 0000 0000 0000 0005 0005 0005
+Lin sh31 st2 (7E0F): 12570439:0005 | >6000 - | end -
+ every 4250000: 0000 0000 0005 0005 0005 0005 0005 0005
+Lin sh31 st3 (7F0F): none | >6000 - | end -
+ every 2500000: 0000 0000 0000 0000 0000 0000 0000 0000
+Exp sh00 st0 (800F): 4464:3800 5261:7000 5951:7E00 6715:7FFF | >6000 5261:7000 | end 6715
+ every 2500: 0000 3800 - - - - - -
+Exp sh04 st0 (900F): 4412:0380 5087:0700 5942:0A80 6693:0E00 | >6000 25198:6200 | end 51948
+ every 25000: 5E80 7E00 - - - - - -
+Exp sh08 st0 (A00F): 4407:0038 5181:0070 5939:00A8 6689:00E0 | >6000 340780:6008 | end 790079
+ every 200000: 37C8 643E 7276 - - - - -
+Exp sh09 st0 (A40F): 4322:001C 5091:0038 5945:0054 6696:0070 | >6000 677902:6008 | end 1575723
+ every 375000: 34D4 629A 6FF2 7D4A - - - -
+Exp sh10 st0 (A80F): 4428:000E 5202:001C 5960:002A 6710:0038 | >6000 1352306:6008 | end 3147794
+ every 750000: 351A 62A8 7000 7D58 - - - -
+Exp sh11 st0 (AC0F): 4361:0007 5158:000E 5931:0015 6704:001C | >6000 2700048:6001 | end 6292783
+ every 1500000: 3544 62AF 7007 7D5F - - - -
+Exp sh12 st0 (B00F): 5196:0007 6726:000E 8240:0015 9748:001C | >6000 5396529:6001 | end 12582662
+ every 2000000: 2385 471F 62AF 6B99 747C 7D66 - -
+Exp sh14 st0 (B80F): 5934:0007 12090:000E 18202:0015 24322:001C | >6000 - | end -
+ every 2000000: 08E3 11CD 1AB0 239A 2C7D 3567 3E4A 4734
+Done.
+```
+
+05DEC.txt:
+
+```
+===== 05 DEC SPU ADSR DECAY | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+Decay: voice 0, attack linear shift 0 step 0, decay shift and sustain level as
+shown, sustain never stepping. Changes from KON, the first fall to (SL+1)*800h or
+below (spx:540), then eight readings: where the level stops is the sustain level.
+Dec 00 SL 0 (0000): 4692:3800 5524:7000 6294:7FFF 7062:3FFF | <=SL 9384:07FF | end -
+ every 5000: 3800 07FF 07FF 07FF 07FF 07FF 07FF 07FF
+Dec 00 SL 3 (0003): 4352:3800 5184:7000 5949:7FFF 6712:3FFF | <=SL 7480:1FFF | end -
+ every 5000: 3800 1FFF 1FFF 1FFF 1FFF 1FFF 1FFF 1FFF
+Dec 00 SL 7 (0007): 4339:3800 5190:7000 5858:7FFF 6624:3FFF | <=SL 6624:3FFF | end -
+ every 5000: 3800 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Dec 00 SL B (000B): 4333:3800 5184:7000 5852:7FFF 6618:3FFF | <=SL 6618:3FFF | end -
+ every 5000: 3800 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Dec 00 SL E (000E): 4333:3800 5184:7000 5858:7FFF 6624:3FFF | <=SL 6624:3FFF | end -
+ every 5000: 3800 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Dec 00 SL F (000F): 4339:3800 5190:7000 5864:7FFF 6643:3FFF | <=SL - | end -
+ every 5000: 3800 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Dec 02 SL 7 (0027): 4339:3800 5140:7000 5905:7FFF 6669:6FFF | <=SL 10542:3971 | end -
+ every 12500: 3971 3971 3971 3971 3971 3971 3971 3971
+Dec 04 SL 7 (0047): 4350:3800 5146:7000 5905:7FFF 6664:7BFF | <=SL 22789:3FA2 | end -
+ every 25000: 3FA2 3FA2 3FA2 3FA2 3FA2 3FA2 3FA2 3FA2
+Dec 06 SL 7 (0067): 4345:3800 5141:7000 5900:7FFF 6659:7EFF | <=SL 74282:3F8E | end -
+ every 75000: 3F8E 3F8E 3F8E 3F8E 3F8E 3F8E 3F8E 3F8E
+Dec 08 SL 0 (0080): 4333:3800 5115:7000 5874:7FFF 6635:7FBF | <=SL 1051183:07FE | end -
+ every 250000: 4447 23B3 1268 094D 07FE 07FE 07FE 07FE
+Dec 08 SL 7 (0087): 4446:3800 5143:7000 5908:7FFF 6667:7FBF | <=SL 275537:3FF1 | end -
+ every 200000: 4DD1 3FF1 3FF1 3FF1 3FF1 3FF1 3FF1 3FF1
+Dec 08 SL F (008F): 4446:3800 5143:7000 5918:7FFF 6691:7FBF | <=SL - | end -
+ every 50000: 7FBF 7FBF 7FBF 7FBF 7FBF 7FBF 7FBF 7FBF
+Dec 10 SL 7 (00A7): 5182:3800 5983:7000 6747:7FFF 7506:7FEF | <=SL 1049648:3FFA | end -
+ every 500000: 5C8A 4243 3FFA 3FFA 3FFA 3FFA 3FFA 3FFA
+Dec 11 SL 7 (00B7): 4339:3800 5140:7000 5905:7FFF 6669:7FF7 | <=SL 2001913:3FFF | end -
+ every 1000000: 5B62 400E 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Dec 12 SL 7 (00C7): 4389:3800 5114:7000 5901:7FFF 6688:7FF7 | <=SL 3997187:3FFF | end -
+ every 2000000: 5B4A 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Dec 12 SL 0 (00C0): 4382:3800 5092:7000 5879:7FFF 6666:7FF7 | <=SL 13958152:0800 | end -
+ every 4250000: 3D6F 1BC4 0B13 07FF 07FF 07FF 07FF 07FF
+Dec 13 SL 7 (00D7): 4388:3800 5218:7000 5904:7FFF 7437:7FF7 | <=SL 7988486:3FFF | end -
+ every 2000000: 6C40 5B3E 4CA7 3FFF 3FFF 3FFF 3FFF 3FFF
+Dec 15 SL 7 (00F7): 4382:3800 5109:7000 5896:7FFF 10523:7FF7 | <=SL - | end -
+ every 2000000: 7AEF 75D7 70BF 6C32 67C4 634F 5F04 5B32
+Done.
+```
+
+06SUS.txt:
+
+```
+===== 06 SUS SPU ADSR SUSTAIN | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+Sustain: voice 0, attack linear shift 0 step 0, decay shift 0, sustain level 7
+(4000h), then the sustain as shown. The watch starts at the first reading of 4000h
+or less after 7FFFh ("from"): changes, the first rise above 6000h, the time it
+reached 7FFFh (increase) or 0 (decrease), eight readings. Times from KON.
+Sus lin inc sh00 st0 (0000): 7272:77FF 8093:7FFF | >6000 7272:77FF | end 8093
+ every 2500 from 6528: - - - - - - - -
+Sus lin inc sh04 st0 (0400): 8311:437F 8991:46FF 9846:4A7F 10597:4DFF | >6000 15228:62FF | end 22078
+ every 12500 from 7498: 77FF - - - - - - -
+Sus lin inc sh08 st0 (0800): 8241:4037 9015:406F 9764:40A7 10514:40DF | >6000 120349:6027 | end 232447
+ every 100000 from 7439: 5C6F 78DF - - - - - -
+Sus lin inc sh08 st3 (08C0): 8248:401F 9022:403F 9774:405F 10524:407F | >6000 204884:601F | end 400676
+ every 200000 from 7443: 607F - - - - - - -
+Sus lin inc sh08 st0 b29 (2800): 8241:4037 9015:406F 9764:40A7 10514:40DF | >6000 120349:6027 | end 232447
+ every 100000 from 7439: 5C6F 78DF - - - - - -
+Sus lin inc sh11 st0 (0B00): 8241:4006 9015:400D 9764:4014 10514:401B | >6000 906781:6004 | end 1805293
+ every 500000 from 7439: 51CC 6399 7566 - - - - -
+Sus lin inc sh12 st0 (0C00): 9053:4006 10533:400D 12083:4014 13633:401B | >6000 1806117:6004 | end 3603275
+ every 1000000 from 7442: 51CC 6399 7566 - - - - -
+Sus lin inc sh16 st0 (1000): 11284:4006 35897:400D 60480:4014 85075:401B | >6000 - | end -
+ every 1000000 from 7452: 411E 423D 4355 4474 4593 46AB 47CA 48E9
+Sus lin dec sh00 st0 (4000): 8247:FFFF 8966:0000 | >6000 8247:FFFF | end 8966
+ every 2500 from 7442: - - - - - - - -
+Sus lin dec sh08 st0 (4800): 8369:3FBF 9148:3F7F 9898:3F3F 10649:3EFF | >6000 204174:FFFF | end 204937
+ every 100000 from 7564: 1F7F - - - - - - -
+Sus lin dec sh08 st3 (48C0): 8535:3FD7 9310:3FAF 10060:3F87 10816:3F5F | >6000 322673:FFEF | end 323439
+ every 200000 from 7729: 175F - - - - - - -
+Sus lin dec sh12 st0 (4C00): 9009:3FF7 10489:3FEF 12039:3FE7 13589:3FDF | >6000 3153195:FFFF | end 3153956
+ every 1000000 from 7388: 2BA7 174F 02F7 - - - - -
+Sus exp inc sh08 st0 (8800): 8418:4037 9192:406F 9950:40A7 10700:40DF | >6000 120584:6027 | end 568256
+ every 200000 from 7613: 6655 748D - - - - - -
+Sus exp inc sh10 st0 (8A00): 8248:400D 9022:401B 9774:4029 10524:4037 | >6000 457507:600B | end 2253110
+ every 500000 from 7443: 60EB 69D5 72B8 7BA2 - - - -
+Sus exp inc sh12 st0 (8C00): 8994:4006 10528:400D 12040:4014 13650:401B | >6000 1806136:6004 | end 8993838
+ every 2000000 from 7439: 60E4 69CE 72B1 7B9B - - - -
+Sus exp dec sh00 st0 (C000): 8311:1FFF 8991:0FFF 9846:07FF 10547:03FF | >6000 - | end 18274
+ every 2500 from 7498: 07FF 00FF 001F 0001 - - - -
+Sus exp dec sh08 st0 (C800): 8147:3FDF 8919:3FBF 9669:3F9F 10414:3F7F | >6000 - | end 1601740
+ every 500000 from 7336: 1138 0414 007B - - - - -
+Sus exp dec sh12 st0 (CC00): 8947:3FFB 10475:3FF7 12085:3FF3 13595:3FEF | >6000 - | end 13114139
+ every 2000000 from 7388: 2CBD 1E52 1426 0CFD 07E7 02D1 - -
+Sus lin inc sh31 st3 (1FC0): none | >6000 - | end -
+ every 250000 from 6817: 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Sus lin dec sh31 st3 (5FC0): none | >6000 - | end -
+ every 250000 from 6698: 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Sus exp inc sh31 st3 (9FC0): none | >6000 - | end -
+ every 250000 from 6698: 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Sus exp dec sh31 st3 (DFC0): none | >6000 - | end -
+ every 250000 from 6698: 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Sus lin dec sh31 st2 (5F80): none | >6000 - | end -
+ every 250000 from 6698: 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF 3FFF
+Done.
+```
+
+07REL.txt:
+
+```
+===== 07 REL SPU ADSR RELEASE | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+Release: voice 0 held at 7FFFh (attack shift 0, sustain level Fh, sustain never
+stepping), then KOFF. Changes from KOFF, the first fall to 4000h, the time it
+reached 0, eight readings.
+Rel lin sh00 (1FC0): 333:3FFF 903:FFFF 1662:0000 | <=4000 333:3FFF | end 1662
+ every 2500: - - - - - - - -
+Rel lin sh04 (1FC4): 298:3FFF 1388:3BFF 2176:37FF 2852:33FF | <=4000 298:3FFF | end 13645
+ every 12500: 03FF - - - - - - -
+Rel lin sh08 (1FC8): 298:3FBF 973:3F7F 1749:3F3F 2525:3EFF | <=4000 298:3FBF | end 196840
+ every 125000: 173F - - - - - - -
+Rel lin sh11 (1FCB): 298:3FF7 867:3FEF 1641:3FE7 2417:3FDF | <=4000 298:3FF7 | end 1572902
+ every 1000000: 1747 - - - - - - -
+Rel lin sh12 (1FCC): 296:3FFF 1486:3FF7 3096:3FEF 4606:3FE7 | <=4000 296:3FFF | end 3146462
+ every 1000000: 2BA7 174F 02F7 - - - - -
+Rel lin sh13 (1FCD): 298:3FFF 3685:3FF7 6756:3FEF 9828:3FE7 | <=4000 298:3FFF | end 6292877
+ every 1000000: 35D7 2BAF 217F 1757 0D27 02FF - -
+Rel lin sh16 (1FD0): 297:3FFF 7431:3FF7 31991:3FEF 56559:3FE7 | <=4000 297:3FFF | end -
+ every 1000000: 3EB7 3D6F 3C2F 3AE7 399F 385F 3717 35CF
+Rel exp sh00 (1FE0): 298:3FFF 553:1FFF 1229:0FFF 2005:07FF | <=4000 298:3FFF | end 10445
+ every 2500: 07FF 007F 000F 0001 - - - -
+Rel exp sh04 (1FE4): 298:3FFF 1073:3DFF 1850:3C0F 2626:3A2E | <=4000 298:3FFF | end 165510
+ every 25000: 1722 0857 02E4 0102 0051 0015 - -
+Rel exp sh08 (1FE8): 299:3FFF 1489:3FDF 2265:3FBF 3038:3F9F | <=4000 299:3FFF | end 1595134
+ every 375000: 1814 08B1 02C9 007C - - - -
+Rel exp sh11 (1FEB): 298:3FFF 1320:3FFB 2121:3FF7 2928:3FF3 | <=4000 298:3FFF | end 6553928
+ every 2000000: 1E54 0CFE 02D2 - - - - -
+Rel exp sh12 (1FEC): 302:3FFF 558:3FFB 2012:3FF7 3466:3FF3 | <=4000 302:3FFF | end 13105597
+ every 2000000: 2CBD 1E52 1424 0CFC 07E6 02D0 - -
+Attack linear shift 12 cut at 3552 by KOFF, release linear shift 8: 797:3512 1585:34D2 2350:3492 3118:3452 | <=0800 139780:07D2 | end 165121
+ every 250000: - - - - - - - -
+Level after the release, 200000 cycles: none
+Release linear shift 8, second KOFF at 0000: none | <=0800 - | end 303
+ every 125000: - - - - - - - -
+Done.
+```
+
+08SWP.txt:
+
+```
+===== 08 SWP SPU VOLUME SWEEP | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+Sweeps on voice 2's volume, voice 2 never keyed on. The start is set as a fixed
+volume 5000 cycles before (spx:574-577). Current volume 1E08h (spx:650). Changes
+from the sweep write, the time it reached 7FFFh (increase) or 0 (decrease).
+Fixed volume 1234h, cycles until 1E08h changes: 452:2468 25:2468 729:2468 664:2468
+Fixed volume 4000h (bit 14, spx:560 range) reads 1E08h 8000
+V2L from 0000 reg 8000 (reads 8000): 605:3800 1380:7000 2131:7FFF | x - | end 2131
+ every 2500: - - - - - - - -
+V2L from 0000 reg 8010 (reads 8010): 353:0380 972:0700 1822:0A80 2568:0E00 | x - | end 27845
+ every 12500: 3B80 7380 - - - - - -
+V2L from 0000 reg 8020 (reads 8020): 504:0038 1288:0070 2033:00A8 2784:00E0 | x - | end 449744
+ every 100000: 1C70 38E0 5588 71F8 - - - -
+V2L from 0000 reg 8023 (reads 8023): 348:0020 974:0040 1724:0060 2473:0080 | x - | end 785875
+ every 200000: 20A0 4120 61C0 - - - - -
+V2L from 0000 reg 802C (reads 802C): 604:0007 1378:000E 2134:0015 2879:001C | x - | end 3594831
+ every 500000: 11CD 239A 3567 4734 5901 6ACE 7C9B -
+V2L from 0000 reg 8030 (reads 8030): 1111:0007 2692:000E 4239:0015 5795:001C | x - | end 7189623
+ every 1000000: 11CD 239A 3567 4734 5901 6ACE 7C9B -
+V2L from 0000 reg 8040 (reads 8040): 23037:0007 47639:000E 72141:0015 96741:001C | x - | end -
+ every 1000000: 0118 0237 0356 046E 058D 06AC 07C4 08E3
+V2L from 7FFE reg A020 (reads A020): 613:7FBE 1393:7F7E 2144:7F3E 2899:7EFE | x - | end 393851
+ every 125000: 573E 2EBE 05FE - - - - -
+V2L from 7FFE reg A030 (reads A030): 1509:7FF6 2978:7FEE 4534:7FE6 6095:7FDE | x - | end 6292189
+ every 1000000: 6BA6 574E 42F6 2E9E 1A46 05EE - -
+V2L from 0000 reg C020 (reads C020): 348:0038 868:0070 1618:00A8 2370:00E0 | x - | end 785779
+ every 200000: 3918 6484 72CA - - - - -
+V2L from 0000 reg C030 (reads C030): 607:0007 2136:000E 3646:0015 5257:001C | x - | end 12575113
+ every 2000000: 239A 4734 62B6 6BA0 7483 7D6D - -
+V2L from 7FFE reg E000 (reads E000): 352:3FFF 872:1FFF 1617:0FFF 2366:07FF | x - | end 10876
+ every 2500: 07FF 00FF 001F 0001 - - - -
+V2L from 7FFE reg E020 (reads E020): 504:7FBE 1278:7F7E 2023:7F3E 2773:7EFE | x - | end 1863637
+ every 500000: 2323 0925 01DA - - - - -
+V2L from 7FFE reg E030 (reads E030): 1131:7FF6 2665:7FEE 4171:7FE6 5681:7FDE | x - | end -
+ every 2000000: 5B31 3FEA 2CAD 1E47 141B 0CF7 07E1 02CB
+V2L from 2000 reg 9020 (reads 9020): 353:1FC0 1071:1F80 1821:1F40 2568:1F00 | x - | end -
+ every 250000: CE80 8000 8000 8000 8000 8000 8000 8000
+V2L from C000 reg 8020 (reads 8020): 499:C038 1273:C070 2024:C0A8 2874:C0E0 | x - | end 674062
+ every 250000: 0750 4E68 - - - - - -
+V2L from C000 reg B020 (reads B020): 353:C038 873:C070 1628:C0A8 2473:C0E0 | x - | end -
+ every 250000: 0000 0000 0000 0000 0000 0000 0000 0000
+V2L from 2000 reg B020 (reads B020): 716:0000 | x - | end -
+ every 250000: 0000 0000 0000 0000 0000 0000 0000 0000
+V2L from 7FFE reg F020 (reads F020): 509:7FBE 1278:7F7E 2034:7F3E 2779:7EFE | x - | end -
+ every 500000: 2323 0925 01DA 0000 0000 0000 0000 0000
+V2L from 2000 reg 807F (reads 807F): none | x - | end -
+ every 250000: 2000 2000 2000 2000 2000 2000 2000 2000
+V2L from 2000 reg B07F (reads B07F): 510:0000 | x - | end -
+ every 250000: 0000 0000 0000 0000 0000 0000 0000 0000
+V2R from 0000 reg 8020 (reads 8020): 358:0038 978:0070 1730:00A8 2475:00E0 | x - | end 449518
+ every 100000: 1CA8 3918 5588 71F8 - - - -
+V0L from 0000 reg 8020 (reads 8020): 699:0038 1473:0070 2231:00A8 2981:00E0 | x - | end 450017
+ every 100000: 1C70 38E0 5550 71F8 - - - -
+Done.
+```
+
+09END.txt:
+
+```
+===== 09 END SPU ENDX LOOPS | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+Voice 0. S1, S2, S4: one, two, four blocks, the last End+Repeat. Cycles from KON
+until ENDX bit 0 reads 0 (0: it never read 1 after KON), and until it reads 1
+(0: not within the limit).
+S1 pitch 1000, ENDX bit 0 clear, set: 1646,17016 851,16200 795,16143 2252,17602
+S2 pitch 1000, ENDX bit 0 clear, set: 935,37809 853,37725
+S4 pitch 1000, ENDX bit 0 clear, set: 935,80827 851,80736
+S4 pitch 0800, ENDX bit 0 clear, set: 937,157599
+S4 pitch 2000, ENDX bit 0 clear, set: 871,42341
+S4 pitch 3FFF, ENDX bit 0 clear, set: 935,23961
+S4 pitch 4000, ENDX bit 0 clear, set: 871,23953
+S4 pitch 4001, ENDX bit 0 clear, set: 935,23961
+S4 pitch 8000, ENDX bit 0 clear, set: 931,23960
+S4 pitch FFFF, ENDX bit 0 clear, set: 937,23967
+S1 pitch 0100, ENDX bit 0 clear, set: 937,200617
+S1 pitch 0001, ENDX bit 0 clear, set: 934,0
+S1 pitch 0000, ENDX bit 0 clear, set: 63,0
+S4+8 pitch 1000, ENDX bit 0 clear, set: 64,68496
+ENDX low FFFF, write 0000h reads 0000, then: 11889:FFFE 19579:FFFF
+ENDX write 5555h reads 5555, then: 481:0000 7392:FFFE 15058:FFFF
+ENDX high 00FF
+L (loop start at block 1), repeat was 4000: right after KON 4000, then: 18757:4082
+S4 (loop start at block 0), repeat was 4100: right after KON 4100, then: 1889:4060
+M (End+Mute at block 1), repeat 4100: ENDX set at 38155:0001, level then 0000, repeat 4100
+M, level from 20000 cycles after KON: 37904:0000
+L, repeat 40E0 written 2000 cycles after KON (reads 40E0), 150000 later: 4082
+L, repeat 40E0 written 200000 cycles after KON (reads 40E0), 200000 later: 40E0, 400000 later: 40E0
+Start written during play reads 4020
+Done.
+```
+
+10IRQ.txt:
+
+```
+===== 10 IRQ SPU IRQ9 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+Voice 0 keyed on, IRQ address as shown, cycles from KON to SPUSTAT bit 6 and to
+I_STAT bit 9 (0 = not within the limit). S4 at 4060h, four blocks of 10h bytes.
+S4 pitch 1000 IRQ 4060: SPUSTAT.6 at 1256, I_STAT.9 at 1057
+S4 pitch 1000 IRQ 4061: SPUSTAT.6 at 6450, I_STAT.9 at 6251
+S4 pitch 1000 IRQ 4062: SPUSTAT.6 at 318, I_STAT.9 at 116
+S4 pitch 1000 IRQ 4064: SPUSTAT.6 at 40242, I_STAT.9 at 40043
+S4 pitch 1000 IRQ 4065: SPUSTAT.6 at 49481, I_STAT.9 at 49216
+S4 pitch 1000 IRQ 4066: SPUSTAT.6 at 318, I_STAT.9 at 116
+S4 pitch 0400 IRQ 4064: SPUSTAT.6 at 150830, I_STAT.9 at 150631
+S4 pitch 4000 IRQ 4064: SPUSTAT.6 at 309, I_STAT.9 at 44
+S4 noise pitch 1000 IRQ 4064: SPUSTAT.6 at 40251, I_STAT.9 at 40052
+S4 pitch 0000 IRQ 4064: SPUSTAT.6 at 0, I_STAT.9 at 0
+M (End+Mute at block 1) with the repeat address set before KON to P (4100h):
+M, IRQ at P pitch 1000 IRQ 4100: SPUSTAT.6 at 40170, I_STAT.9 at 39971
+M, repeat P, IRQ at M block 0, IRQ 40A0, hits: 1660 3212 4707 6242 7778; SPUSTAT.6 read 0 after the first acknowledge (cycles from KON): 2437:0000
+S1 released 100000 cycles before, level 0000, IRQ at S1: SPUSTAT.6 at 101
+S1 looping, IRQ 4020, hits: 676 2215 3764 5300 6836; SPUSTAT.6 read 0 after the first acknowledge (cycles from KON): 1436:0000
+S4 looping, IRQ 4064, hits: 41398 42942 44494 46030 47566; SPUSTAT.6 read 0 after the first acknowledge (cycles from KON): 42213:0000
+Manual writes of k halfwords from 61FF (8 bytes before the IRQ address 6200):
+ k=1 SPUSTAT.6 0 I_STAT.9 0 k=2 SPUSTAT.6 0 I_STAT.9 0 k=3 SPUSTAT.6 0 I_STAT.9 0 k=4 SPUSTAT.6 1 I_STAT.9 1
+ k=5 SPUSTAT.6 1 I_STAT.9 1 k=6 SPUSTAT.6 1 I_STAT.9 1 k=7 SPUSTAT.6 1 I_STAT.9 1 k=8 SPUSTAT.6 1 I_STAT.9 1
+DMA write 64 bytes from 32 before the IRQ address: SPUSTAT.6 0
+DMA write 64 bytes ending just before it: SPUSTAT.6 0
+DMA write 64 bytes from 8 after it: SPUSTAT.6 0
+DMA read 64 bytes from 32 before it: SPUSTAT.6 1
+DMA read 64 bytes ending just before it: SPUSTAT.6 1
+DMA write over it with IRQ9 enable clear, then enabled: SPUSTAT.6 0
+IRQ address write 1234h reads 1234
+Done.
+```
+
+11CAP.txt:
+
+```
+===== 11 CAP SPU CAPTURE TIMING | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+SPUSTAT bit 11 (spx:716, :723-725) over 1.2 million cycles; then capture IRQs
+(spx:848-856), timed from a rise of bit 11, with bit 11 at each hit (h/l).
+Transfer control 0004, SPUSTAT bit 11 changes: 146492:0000 343100:0800 539684:0000 736336:0800 932924:0000 1129508:0800
+Transfer control 0000, SPUSTAT bit 11 changes: none
+Transfer control 0008, SPUSTAT bit 11 changes: 101409:0800 297993:0000 494645:0800 691233:0000 887817:0800 1084469:0000
+Transfer control 000C, SPUSTAT bit 11 changes: none
+Transfer control 0002, SPUSTAT bit 11 changes: none
+IRQ 0000, transfer control 0004, from bit 11 rising, hits: 154983l 548233l 941439l 1334655l
+IRQ 0040, transfer control 0004, from bit 11 rising, hits: 393131h 786313h 1179563h 1572745h
+IRQ 0080, transfer control 0004, from bit 11 rising, hits: 196524l 589716l 982966l 1376148l
+IRQ 00C0, transfer control 0004, from bit 11 rising, hits: 393132h 786324h 1179574h 1572756h
+IRQ 0100, transfer control 0004, from bit 11 rising, hits: 196514l 589696l 982946l 1376128l
+IRQ 0180, transfer control 0004, from bit 11 rising, hits: 196514l 589696l 982946l 1376128l
+IRQ 01FF, transfer control 0004, from bit 11 rising, hits: 193432h 586648h 979864h 1373080h
+IRQ 0001, transfer control 0004, from bit 11 rising, hits: 199575l 592791l 986007l 1379223l
+IRQ 0100, transfer control 0000, from bit 11 rising (no rise seen), hits: none
+IRQ 0100, transfer control 0008, from bit 11 rising, hits: none
+IRQ 0200, transfer control 0004, from bit 11 rising, hits: none
+Done.
+```
+
+12VCP.txt:
+
+```
+===== 12 VCP SPU CAPTURE NOISE | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+The first half (256 samples) of a capture buffer, read by DMA right after SPUSTAT
+bit 11 rises. Tone T: block 0 shift 4 filter 0 nibbles 0..F, block 1 shift 4
+filter 1, looped. ADSR held at 7FFFh unless shown. Volumes 0, main volume 0.
+Voice 1 T pitch 1000h, 255 changes in 256:
+ FC83 FD03 FD88 FE28 FEC5 FF57 FFE1 0062 00DB 014C 01B7 021B 0278 02D0 0322 036F
+ 0392 02FE 024F 01AA 010F 007E FFF7 FF78 FF01 FE91 FE29 FDC7 FD6A FD14 FD4A FF98
+ 007E 00FE 017D 01FD 027C 02FC 024B FD30 FC83 FD03 FD82 FE01 FE81 FF00 FF80 FFFF
+ 007E 00FE 017D 01FD 027C 02FC 024B FD30 FC83 FD03 FD88 FE28 FEC5 FF57 FFE1 0062
+Voice 1 T pitch 0800h, 255 changes in 256:
+ FD82 FDC2 FE01 FE41 FE81 FEC1 FF00 FF40 FF80 FFC0 FFFF 003F 007E 00BE 00FE 013E
+ 017D 01BD 01FD 023C 027C 02BC 02FC 0321 024B FFBC FD30 FC5D FC83 FCC2 FD03 FD43
+Voice 1 T pitch 2000h, 255 changes in 256:
+ 007E 017D 027C 024B FC83 FD82 FE81 FF80 007E 017D 027C 024B FC83 FD88 FEC5 FFE1
+ 00DB 01B7 0278 0322 0392 024F 010F FFF7 FF01 FE29 FD6A FD4A 007E 017D 027C 024B
+Voice 1 T pitch 1000h, ADSR decayed to sustain level 7, 255 changes in 256:
+ FD4A FF98 007E 00FE 017D 01FD 027C 02FC 024B FD30 FC83 FD03 FD82 FE01 FE81 FF00
+ FF80 FFFF 007E 00FE 017D 01FD 027C 02FC 024B FD30 FC83 FD03 FD88 FE28 FEC5 FF57
+Its level 3FFF
+Voice 1 released, 0 changes in 256:
+ 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
+Voice 3 T pitch 1000h, 255 changes in 256:
+ 0392 02FE 024F 01AA 010F 007E FFF7 FF78 FF01 FE91 FE29 FDC7 FD6A FD14 FD4A FF98
+ 007E 00FE 017D 01FD 027C 02FC 024B FD30 FC83 FD03 FD82 FE01 FE81 FF00 FF80 FFFF
+CD left, no CD playing, 0 changes in 256:
+ 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
+CD right, 0 changes in 256:
+ 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
+Noise (spx:680-696): voice 1 noise mode, SPUCNT noise shift and step as shown.
+Noise shift 15 step 3, 255 changes in 256:
+ DCBC 3977 F2F0 E5E0 CBC2 1782 2F05 DE0D 3C19 F835 F06B E0D7 C1AE 035B 06B7 0D70
+ 1AE1 35C2 EB87 D70E 2E1B DC38 386F F0E0 E1C0 C380 0700 0E01 1C02 3805 F00D E01A
+Noise shift 15 step 0, 255 changes in 256:
+ 3FC9 FF95 FF2A FE55 FCAB F957 F2AE E55D CABC 1576 2AED D5DD 2BB8 D774 2EE6 DDCE
+ 3B9B F738 EE71 DCE3 39C4 F38A E714 CE29 1C52 38A4 F14B E296 C52D 0A59 14B3 2966
+Noise shift 14 step 0, 127 changes in 256:
+ 3453 3453 E8A8 E8A8 D151 D151 22A0 22A0 C542 C542 0A84 0A84 1509 1509 2A12 2A12
+ D427 D427 284C 284C D09B D09B 2135 2135 C26D C26D 04D9 04D9 09B2 09B2 1365 1365
+Noise shift 12 step 0, 32 changes in 256:
+ CFBC 1F77 1F77 1F77 1F77 1F77 1F77 1F77 1F77 3EEE 3EEE 3EEE 3EEE 3EEE 3EEE 3EEE
+ 3EEE FDDE FDDE FDDE FDDE FDDE FDDE FDDE FDDE FBBC FBBC FBBC FBBC FBBC FBBC FBBC
+Noise shift 10 step 0, 8 changes in 256:
+ F00D F00D F00D F00D F00D F00D F00D F00D F00D F00D F00D F00D F00D F00D F00D F00D
+ F00D F00D F00D F00D F00D F00D F00D F00D F00D F00D F00D F00D F00D E01B E01B E01B
+Noise shift 8 step 0, 2 changes in 256:
+ D8EF D8EF D8EF D8EF D8EF D8EF D8EF D8EF D8EF D8EF D8EF D8EF D8EF 31DD 31DD 31DD
+ 31DD 31DD 31DD 31DD 31DD 31DD 31DD 31DD 31DD 31DD 31DD 31DD 31DD 31DD 31DD 31DD
+Noise shift 4 step 0, 0 changes in 256:
+ C77C C77C C77C C77C C77C C77C C77C C77C C77C C77C C77C C77C C77C C77C C77C C77C
+ C77C C77C C77C C77C C77C C77C C77C C77C C77C C77C C77C C77C C77C C77C C77C C77C
+Done.
+```
+
+13XFR.txt:
+
+```
+===== 13 XFR SPU TRANSFERS | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+Scratch at 30000h (6000h), filled with EEEEh before each row, read back by DMA
+with transfer control 0004h. Halfwords written: A000h, A001h, ...
+Transfer address write 6000h reads 6000, after 8 manual 6000, after DMA 6000
+Fifo 1DA8h reads A007 A007
+4 manual, then 4 more (A008h..) with no new address: A000 A001 A002 A003 A008 A009 A00A A00B EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+4 manual, then 4 written to the Fifo in Manual Write mode: A000 A001 A002 A003 EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+40 halfwords into the Fifo (32 deep, spx:741): A000 A001 A002 A003 A004 A005 A006 A007 A008 A009 A00A A00B A00C A00D A00E A00F A010 A011 A012 A013 A014 A015 A016 A017 A018 A019 A01A A01B A01C A01D A01E A01F EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+Type 0 manual 8: A007 EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+Type 1 manual 8: A007 EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+Type 2 manual 8: A000 A001 A002 A003 A004 A005 A006 A007 EEEE EEEE
+Type 3 manual 8: A000 A002 A004 A006 EEEE EEEE EEEE EEEE EEEE EEEE
+Type 4 manual 8: A003 A007 EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+Type 5 manual 8: A006 EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+Type 6 manual 8: A007 EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+Type 7 manual 8: A007 EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+Type 3 DMA write of B000h, B001h, ..: B000 B002 B004 EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+Type 3 DMA read of C000h, C001h, ..: C000 FFFF C001 FFFF C002 FFFF C003 FFFF C004 0000 C005 0000 EEEE 0000 EEEE FFFF EEEE FFFF EEEE FFFF
+Type 4 DMA read of C000h, C001h, ..: C000 C000 C000 C000 C001 C001 C001 C001 C002 C002 C002 C002 C003 C003 C003 C003 C004 C004 C004 C004
+Type 5 DMA read of C000h, C001h, ..: C000 0000 C000 0000 C000 0000 C000 0000 C001 0000 C001 0000 C001 0000 C001 0000 C002 0000 C002 0000
+Manual Write of 1, SPUSTAT (bit 11 masked) was 0000, from the SPUCNT write: 220:0410 989:0010
+Manual Write of 4, SPUSTAT (bit 11 masked) was 0000, from the SPUCNT write: 378:0010
+Manual Write of 16, SPUSTAT (bit 11 masked) was 0000, from the SPUCNT write: 196:0410 937:0010
+1F801014h 200931E1h, DMA read 128 bytes of D000h..:
+ FFFF D000 D001 D002 D003 D004 D005 A006 A007 A008 A009 A00A A00B A00C A00D A00E
+ A00F EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+ FFFF EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+1F801014h 200931E1h, DMA read 128 bytes of D000h..:
+ FFFF D000 D001 D002 D003 D004 D005 A006 A007 A008 A009 A00A A00B A00C A00D A00E
+ A00F EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+ FFFF EEEE EEEE EEEE EEEE EEEE EEEE EEEE
+Done.
+```
+
+14REG.txt:
+
+```
+===== 14 REG SPU REGISTERS | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+1DBCh-1DBFh and 1E60h-1E7Fh (spx:1108-1121), written and read back, put back.
+1DBCh DFFF F7FF, 1E60h..: F5FF F3FF BFFF 29DF 74BB FFFE BFF7 FFEF FFFF FD7D 6EFF 3BF3 FC7F FFFF BFFF 7D8F
+Unknown 1DBC: was DFFF, write 1234 reads 1234
+Unknown 1DBE: was F7FF, write FEDC reads FEDC
+1E60h.. written inverted, reads: 0A00 0C00 4000 D620 8B44 0001 4008 0010 0000 0282 9100 C40C 0380 0000 4000 8270
+Unknown 1DA0h 1DA0: was AC00, write 5A5A reads 5A5A
+Voice 5 registers written FFFFh:
+ volume L 1C50: was 0000, write 7FFF reads 7FFF
+ volume L sweep 1C50: was 0000, write FFFF reads FFFF
+ pitch 1C54: was 1000, write FFFF reads FFFF
+ start 1C56: was 4000, write FFFF reads FFFF
+ ADSR low 1C58: was 000F, write FFFF reads FFFF
+ ADSR high 1C5A: was 1FC0, write FFFF reads FFFF
+ repeat 1C5E: was 4000, write FFFF reads FFFF
+Voice flag registers (bits 24-31 not used, spx:660, :666, :683; PMON bit 0 :382):
+ PMON low 1D90: was 0000, write FFFF reads FFFF
+ PMON high 1D92: was 0000, write FFFF reads FFFF
+ NON high 1D96: was 0000, write FFFF reads FFFF
+ EON high 1D9A: was 0000, write FFFF reads FFFF
+ ENDX high 1D9E: was 00FF, write FFFF reads FFFF
+ CD volume L 1DB0: was 0000, write 8765 reads 8765
+ extern volume R 1DB6: was 0000, write 8765 reads 8765
+ reverb volume L 1D84: was 0000, write 8001 reads 8001
+ mBASE 1DA2: was FFFE, write 1234 reads 1234
+Main volume L sweep A020 reads A020, current main volume 1DB8h 0000 0000
+32-bit stores to 1C58h, 32 tries: low half wrong 7, high half wrong 0
+1C58h lw 1357ABCD, lbu 1C58h CD 1C59h AB 1C5Ah 57
+sb 12345678h to 1C54h: 5678; to 1C55h over 1111h: 1111
+Done.
+```
+
+15UNU.txt:
+
+```
+===== 15 UNU SPU UNUSED 1E80 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
+BadVaddr as the group starts: 00000480
+Halfword reads of 1F801E80h..1F801FFEh; lbu and lw of 1F801E80h last.
+
+192 of 192 read FFFFh
+lbu 1E80h: FF
+lw 1E80h: FFFFFFFF
+lw 1E7Ch: 7D8FBFFF
+Done.
+```
+
+## References
+
+[^h]: Hardware test run 20260928T0000Z-5501a-card-h on the SCPH-5501: [spuenv output](/tests/raw/20260928T0000Z-5501a-card-h/spuenv/01STA.txt) and the other files listed under that run.