SPU Registers and Envelope: Difference between revisions
| Revision as of 05:11, 23 October 2026 RemmyLee (Hardware tests: 72 more test pages, listed on the main page by area; RUN.toml no longer published) | Revision as of 05:18, 23 October 2026 RemmyLee (Hardware tests: nine DMA, MDEC and BIOS test pages with part names for titles; join one-sentence paragraphs per voice.md) | ||
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| ### State at Entry | ### State at Entry | ||
| − | As the program found the SPU, every voice had pitch 3FFFh and start address 0200h, and SPU_DELAY (1F801014h) read 200931E1h. SPUSTAT read 0005h sixteen times in a row.[^h] | + | As the program found the SPU, every voice had pitch 3FFFh and start address 0200h, and SPU_DELAY (1F801014h) read 200931E1h. SPUSTAT read 0005h sixteen times in a row.[^h] The unknown register 1DA0h reads AC00h most of the time and 0100h at other times: three of the first sixteen back-to-back reads gave 0100h, and two of sixteen reads 100000 cycles apart did the same.[^h] |
| − | The unknown register 1DA0h reads AC00h most of the time and 0100h at other times: three of the first sixteen back-to-back reads gave 0100h, and two of sixteen reads 100000 cycles apart did the same.[^h] | ||
| − | |||
| ### SPUCNT and SPUSTAT | ### SPUCNT and SPUSTAT | ||