psx.wiki

Timer Write and Cache Line Fills: Difference between revisions

Revision as of 04:48, 23 October 2026
RemmyLee
(Main page: drop the Hardware Tests lede)
Revision as of 05:11, 23 October 2026
RemmyLee
(Hardware tests: 72 more test pages, listed on the main page by area; RUN.toml no longer published)
Line 1:Line 1:
+---
+title: Timer Write and Cache Line Fills
+type: test
+summary: Measures when an I/O store lands against the instruction cache fills that a following jump causes, and what each cold cache line costs.
+category: Hardware tests
+info: Machine = SCPH-5501
+info: Program = SXFILLW to SXFILLW6
+---
+
+## Overview
+
+The programs time one window of code with two root counters. Both count system clock cycles, and interrupts are off. The code sits in a 64-byte aligned area, so the cache line of every word is known. The window reads root counter 1 (T1), stores zero to root counter 2's count, makes a JALR into a short function and returns, then reads counter 2 (T2) and counter 1 again.[^run1]
+
+T1 is the whole window and T2 runs from the moment the store lands to the end. The difference between them shows when the store reached the counter, apart from what the cache fills cost.[^run1]
+
+SXFILLW places the store and the JALR with its delay slot at each word of their cache lines. It also places the jump target at words 0 to 2. Each later program changes one part of the window: SXFILLW2 the store itself, SXFILLW3 and SXFILLW6 which cache lines are cold, and SXFILLW4 and SXFILLW5 the instructions around the timer reads. Each case runs three times cold and three times warm. A cold run follows FlushCache or the eviction of chosen lines.[^run1][^run2][^run3][^run4][^run5][^run6]
+
+## Results
+
+### Landing Time of the Store
+
+The store to the counter lands 11 cycles after the first T1 read when the delay slot of the JALR lies in a line that is already filled. This holds cold and warm and for every target word. When the delay slot opens a new cold line, the store lands 18 cycles after the T1 read (20 in one cold run).[^run1]
+
+In the warm window, T2 read 7, 6 and 5 cycles for target words 0, 1 and 2.[^run1]
+
+### Cost of the Fills
+
+Putting a NOP or a RAM store in place of the counter store changes the cold window by little. The cold window took 36 cycles with the counter store and 33 with a NOP. With a RAM store it took 40 (45 in one run). The warm window took 16 or 17 cycles in all three forms.[^run2]
+
+### Cost of Each Cold Line
+
+SXFILLW3 lets the window run warm once and then evicts chosen lines before timing it. The lines are a (the store, the JALR and its slot), b (the jump target), c (the return JR) and d (the timer reads). Without the counter store, the cost of each cold line adds to the others:[^run3]
+
+Table: Window time with chosen lines cold and no counter store (cycles)
+
+| Cold lines | T1 |
+| --- | --- |
+| none | 17 |
+| a | 18 |
+| b | 20 |
+| c | 25 |
+| d | 22 |
+| a and b | 21 |
+| b and c | 28 |
+| a, b, c and d | 34 |
+| all, after FlushCache | 34 |
+
+The line holding the return JR costs the most, 8 cycles, and the line of the timer reads 5.[^run3]
+
+When the delay slot opens a new line of its own, that line costs 8 cycles cold. With the slot line and the target line both cold the window took 30 cycles. With every line cold it took 46.[^run6]
+
+### The Instruction after the Last Timer Read
+
+The window takes one cycle more when the instruction after the last T1 read uses the register loaded by the T2 read just before it. With SW of that register or ADDU from it after the read, the window took 18 cycles warm and 37 cold. With a store of another register, a store of zero, a store to the counter or a NOP in that place it took 17 and 36. A RAM load in that place took 17 warm and 36 to 39 cold.[^run4][^run5]
+
+The instruction before the first T1 read made no difference.[^run4]
+
+## Runs
+
+### 23 October 2026 (link)
+
+[SXFILLW.txt](/tests/raw/20261023T0118Z-5501a-link/sxfillw/SXFILLW.txt):
+
+```
+SXFILLW start
+SXFILLW h0 f0 cold 0: T1 37 T2 26
+SXFILLW h0 f0 cold 1: T1 40 T2 29
+SXFILLW h0 f0 cold 2: T1 37 T2 26
+SXFILLW h0 f0 warm 0: T1 18 T2 7
+SXFILLW h0 f0 warm 1: T1 18 T2 7
+SXFILLW h0 f0 warm 2: T1 18 T2 7
+SXFILLW h0 f1 cold 0: T1 36 T2 25
+SXFILLW h0 f1 cold 1: T1 36 T2 25
+SXFILLW h0 f1 cold 2: T1 36 T2 25
+SXFILLW h0 f1 warm 0: T1 17 T2 6
+SXFILLW h0 f1 warm 1: T1 17 T2 6
+SXFILLW h0 f1 warm 2: T1 17 T2 6
+SXFILLW h0 f2 cold 0: T1 35 T2 24
+SXFILLW h0 f2 cold 1: T1 35 T2 24
+SXFILLW h0 f2 cold 2: T1 35 T2 24
+SXFILLW h0 f2 warm 0: T1 16 T2 5
+SXFILLW h0 f2 warm 1: T1 16 T2 5
+SXFILLW h0 f2 warm 2: T1 16 T2 5
+SXFILLW h1 f0 cold 0: T1 37 T2 26
+SXFILLW h1 f0 cold 1: T1 37 T2 26
+SXFILLW h1 f0 cold 2: T1 37 T2 26
+SXFILLW h1 f0 warm 0: T1 18 T2 7
+SXFILLW h1 f0 warm 1: T1 18 T2 7
+SXFILLW h1 f0 warm 2: T1 18 T2 7
+SXFILLW h1 f1 cold 0: T1 39 T2 28
+SXFILLW h1 f1 cold 1: T1 36 T2 25
+SXFILLW h1 f1 cold 2: T1 36 T2 25
+SXFILLW h1 f1 warm 0: T1 17 T2 6
+SXFILLW h1 f1 warm 1: T1 17 T2 6
+SXFILLW h1 f1 warm 2: T1 17 T2 6
+SXFILLW h1 f2 cold 0: T1 35 T2 24
+SXFILLW h1 f2 cold 1: T1 35 T2 24
+SXFILLW h1 f2 cold 2: T1 35 T2 24
+SXFILLW h1 f2 warm 0: T1 16 T2 5
+SXFILLW h1 f2 warm 1: T1 16 T2 5
+SXFILLW h1 f2 warm 2: T1 16 T2 5
+SXFILLW h2 f0 cold 0: T1 37 T2 26
+SXFILLW h2 f0 cold 1: T1 37 T2 26
+SXFILLW h2 f0 cold 2: T1 37 T2 26
+SXFILLW h2 f0 warm 0: T1 18 T2 7
+SXFILLW h2 f0 warm 1: T1 18 T2 7
+SXFILLW h2 f0 warm 2: T1 18 T2 7
+SXFILLW h2 f1 cold 0: T1 36 T2 25
+SXFILLW h2 f1 cold 1: T1 36 T2 25
+SXFILLW h2 f1 cold 2: T1 36 T2 25
+SXFILLW h2 f1 warm 0: T1 17 T2 6
+SXFILLW h2 f1 warm 1: T1 17 T2 6
+SXFILLW h2 f1 warm 2: T1 17 T2 6
+SXFILLW h2 f2 cold 0: T1 35 T2 24
+SXFILLW h2 f2 cold 1: T1 35 T2 24
+SXFILLW h2 f2 cold 2: T1 35 T2 24
+SXFILLW h2 f2 warm 0: T1 16 T2 5
+SXFILLW h2 f2 warm 1: T1 16 T2 5
+SXFILLW h2 f2 warm 2: T1 16 T2 5
+SXFILLW h3 f0 cold 0: T1 49 T2 31
+SXFILLW h3 f0 cold 1: T1 45 T2 27
+SXFILLW h3 f0 cold 2: T1 47 T2 27
+SXFILLW h3 f0 warm 0: T1 18 T2 7
+SXFILLW h3 f0 warm 1: T1 18 T2 7
+SXFILLW h3 f0 warm 2: T1 18 T2 7
+SXFILLW h3 f1 cold 0: T1 44 T2 26
+SXFILLW h3 f1 cold 1: T1 44 T2 26
+SXFILLW h3 f1 cold 2: T1 44 T2 26
+SXFILLW h3 f1 warm 0: T1 17 T2 6
+SXFILLW h3 f1 warm 1: T1 17 T2 6
+SXFILLW h3 f1 warm 2: T1 17 T2 6
+SXFILLW h3 f2 cold 0: T1 43 T2 25
+SXFILLW h3 f2 cold 1: T1 43 T2 25
+SXFILLW h3 f2 cold 2: T1 43 T2 25
+SXFILLW h3 f2 warm 0: T1 16 T2 5
+SXFILLW h3 f2 warm 1: T1 16 T2 5
+SXFILLW h3 f2 warm 2: T1 16 T2 5
+SXFILLW end PASS
+ResetGraph:jtb=801e78b8,env=801e7900
+```
+
+[bench.txt](/tests/raw/20261023T0118Z-5501a-link/sxfillw/bench.txt):
+
+```
+2480 bytes of TTY text in psx.log
+```
+
+### 23 October 2026 (link)
+
+[SXFILLW2.txt](/tests/raw/20261023T0313Z-5501a-link/sxfillw2/SXFILLW2.txt):
+
+```
+SXDEV I_MASK at init AC400000
+SXFILLW2 start
+SXFILLW2 W cold 0: T1 36 T2 26
+SXFILLW2 W cold 1: T1 36 T2 26
+SXFILLW2 W cold 2: T1 36 T2 26
+SXFILLW2 W warm 0: T1 17 T2 7
+SXFILLW2 W warm 1: T1 17 T2 7
+SXFILLW2 W warm 2: T1 17 T2 7
+SXFILLW2 N cold 0: T1 33 T2 10357
+SXFILLW2 N cold 1: T1 33 T2 48103
+SXFILLW2 N cold 2: T1 33 T2 20307
+SXFILLW2 N warm 0: T1 16 T2 20399
+SXFILLW2 N warm 1: T1 16 T2 20450
+SXFILLW2 N warm 2: T1 16 T2 20501
+SXFILLW2 R cold 0: T1 45 T2 30866
+SXFILLW2 R cold 1: T1 40 T2 3077
+SXFILLW2 R cold 2: T1 40 T2 40825
+SXFILLW2 R warm 0: T1 17 T2 40915
+SXFILLW2 R warm 1: T1 17 T2 40967
+SXFILLW2 R warm 2: T1 17 T2 41019
+SXFILLW2 E cold 0: T1 45 T2 26
+SXFILLW2 E cold 1: T1 48 T2 29
+SXFILLW2 E cold 2: T1 45 T2 26
+SXFILLW2 E warm 0: T1 19 T2 7
+SXFILLW2 E warm 1: T1 19 T2 7
+SXFILLW2 E warm 2: T1 19 T2 7
+SXFILLW2 end PASS
+ResetGraph:jtb=801e78b8,env=801e7900
+```
+
+[bench.txt](/tests/raw/20261023T0313Z-5501a-link/sxfillw2/bench.txt):
+
+```
+873 bytes of TTY text in psx.log
+```
+
+### 23 October 2026 (link)
+
+[SXFILLW3.txt](/tests/raw/20261023T0340Z-5501a-link/sxfillw3/SXFILLW3.txt):
+
+```
+SXDEV I_MASK at init 3C040000
+SXFILLW3 start
+SXFILLW3 W 0 0: T1 18 T2 7
+SXFILLW3 W 0 1: T1 18 T2 7
+SXFILLW3 W 0 2: T1 18 T2 7
+SXFILLW3 W 1 0: T1 18 T2 7
+SXFILLW3 W 1 1: T1 18 T2 7
+SXFILLW3 W 1 2: T1 18 T2 7
+SXFILLW3 W 2 0: T1 24 T2 13
+SXFILLW3 W 2 1: T1 24 T2 13
+SXFILLW3 W 2 2: T1 24 T2 13
+SXFILLW3 W 3 0: T1 24 T2 13
+SXFILLW3 W 3 1: T1 24 T2 13
+SXFILLW3 W 3 2: T1 24 T2 13
+SXFILLW3 W 4 0: T1 26 T2 15
+SXFILLW3 W 4 1: T1 30 T2 19
+SXFILLW3 W 4 2: T1 26 T2 15
+SXFILLW3 W 5 0: T1 26 T2 15
+SXFILLW3 W 5 1: T1 26 T2 15
+SXFILLW3 W 5 2: T1 32 T2 21
+SXFILLW3 W 6 0: T1 32 T2 21
+SXFILLW3 W 6 1: T1 32 T2 21
+SXFILLW3 W 6 2: T1 32 T2 21
+SXFILLW3 W 7 0: T1 32 T2 21
+SXFILLW3 W 7 1: T1 32 T2 21
+SXFILLW3 W 7 2: T1 36 T2 25
+SXFILLW3 W 8 0: T1 23 T2 12
+SXFILLW3 W 8 1: T1 23 T2 12
+SXFILLW3 W 8 2: T1 28 T2 17
+SXFILLW3 W 9 0: T1 23 T2 12
+SXFILLW3 W 9 1: T1 23 T2 12
+SXFILLW3 W 9 2: T1 23 T2 12
+SXFILLW3 W 10 0: T1 29 T2 18
+SXFILLW3 W 10 1: T1 29 T2 18
+SXFILLW3 W 10 2: T1 29 T2 18
+SXFILLW3 W 11 0: T1 29 T2 18
+SXFILLW3 W 11 1: T1 29 T2 18
+SXFILLW3 W 11 2: T1 29 T2 18
+SXFILLW3 W 12 0: T1 34 T2 23
+SXFILLW3 W 12 1: T1 31 T2 20
+SXFILLW3 W 12 2: T1 31 T2 20
+SXFILLW3 W 13 0: T1 31 T2 20
+SXFILLW3 W 13 1: T1 31 T2 20
+SXFILLW3 W 13 2: T1 31 T2 20
+SXFILLW3 W 14 0: T1 37 T2 26
+SXFILLW3 W 14 1: T1 37 T2 26
+SXFILLW3 W 14 2: T1 37 T2 26
+SXFILLW3 W 15 0: T1 37 T2 26
+SXFILLW3 W 15 1: T1 37 T2 26
+SXFILLW3 W 15 2: T1 37 T2 26
+SXFILLW3 W F 0: T1 37 T2 26
+SXFILLW3 W F 1: T1 37 T2 26
+SXFILLW3 W F 2: T1 37 T2 26
+SXFILLW3 N 0 0: T1 17 T2 38710
+SXFILLW3 N 0 1: T1 17 T2 38850
+SXFILLW3 N 0 2: T1 17 T2 38981
+SXFILLW3 N 1 0: T1 18 T2 39178
+SXFILLW3 N 1 1: T1 18 T2 39339
+SXFILLW3 N 1 2: T1 18 T2 39500
+SXFILLW3 N 2 0: T1 20 T2 39671
+SXFILLW3 N 2 1: T1 20 T2 39828
+SXFILLW3 N 2 2: T1 20 T2 39985
+SXFILLW3 N 3 0: T1 21 T2 40186
+SXFILLW3 N 3 1: T1 21 T2 40373
+SXFILLW3 N 3 2: T1 21 T2 40560
+SXFILLW3 N 4 0: T1 25 T2 40741
+SXFILLW3 N 4 1: T1 25 T2 40903
+SXFILLW3 N 4 2: T1 25 T2 41065
+SXFILLW3 N 5 0: T1 26 T2 41271
+SXFILLW3 N 5 1: T1 26 T2 41463
+SXFILLW3 N 5 2: T1 26 T2 41655
+SXFILLW3 N 6 0: T1 28 T2 41865
+SXFILLW3 N 6 1: T1 28 T2 42054
+SXFILLW3 N 6 2: T1 28 T2 42242
+SXFILLW3 N 7 0: T1 29 T2 42474
+SXFILLW3 N 7 1: T1 29 T2 42692
+SXFILLW3 N 7 2: T1 29 T2 42910
+SXFILLW3 N 8 0: T1 22 T2 43083
+SXFILLW3 N 8 1: T1 22 T2 43242
+SXFILLW3 N 8 2: T1 22 T2 43401
+SXFILLW3 N 9 0: T1 23 T2 43604
+SXFILLW3 N 9 1: T1 23 T2 43793
+SXFILLW3 N 9 2: T1 25 T2 43984
+SXFILLW3 N 10 0: T1 25 T2 44183
+SXFILLW3 N 10 1: T1 25 T2 44368
+SXFILLW3 N 10 2: T1 25 T2 44553
+SXFILLW3 N 11 0: T1 26 T2 44782
+SXFILLW3 N 11 1: T1 26 T2 44997
+SXFILLW3 N 11 2: T1 26 T2 45212
+SXFILLW3 N 12 0: T1 30 T2 45416
+SXFILLW3 N 12 1: T1 30 T2 45606
+SXFILLW3 N 12 2: T1 30 T2 45796
+SXFILLW3 N 13 0: T1 34 T2 46033
+SXFILLW3 N 13 1: T1 31 T2 46253
+SXFILLW3 N 13 2: T1 31 T2 46473
+SXFILLW3 N 14 0: T1 33 T2 46703
+SXFILLW3 N 14 1: T1 33 T2 46919
+SXFILLW3 N 14 2: T1 33 T2 47135
+SXFILLW3 N 15 0: T1 34 T2 47395
+SXFILLW3 N 15 1: T1 34 T2 47641
+SXFILLW3 N 15 2: T1 34 T2 47887
+SXFILLW3 N F 0: T1 34 T2 20090
+SXFILLW3 N F 1: T1 34 T2 57854
+SXFILLW3 N F 2: T1 34 T2 30070
+SXFILLW3 end PASS
+ResetGraph:jtb=801e78b8,env=801e7900
+```
+
+[bench.txt](/tests/raw/20261023T0340Z-5501a-link/sxfillw3/bench.txt):
+
+```
+3139 bytes of TTY text in psx.log
+```
+
+### 23 October 2026 (link)
+
+[SXFILLW4.txt](/tests/raw/20261023T0420Z-5501a-link/sxfillw4/SXFILLW4.txt):
+
+```
+SXDEV I_MASK at init 3C020000
+SXFILLW4 start
+SXFILLW4 A cold 0: T1 37 T2 26
+SXFILLW4 A cold 1: T1 37 T2 26
+SXFILLW4 A cold 2: T1 37 T2 26
+SXFILLW4 A warm 0: T1 18 T2 7
+SXFILLW4 A warm 1: T1 18 T2 7
+SXFILLW4 A warm 2: T1 18 T2 7
+SXFILLW4 B cold 0: T1 37 T2 26
+SXFILLW4 B cold 1: T1 37 T2 26
+SXFILLW4 B cold 2: T1 37 T2 26
+SXFILLW4 B warm 0: T1 18 T2 7
+SXFILLW4 B warm 1: T1 18 T2 7
+SXFILLW4 B warm 2: T1 18 T2 7
+SXFILLW4 C cold 0: T1 36 T2 26
+SXFILLW4 C cold 1: T1 41 T2 31
+SXFILLW4 C cold 2: T1 36 T2 26
+SXFILLW4 C warm 0: T1 17 T2 7
+SXFILLW4 C warm 1: T1 17 T2 7
+SXFILLW4 C warm 2: T1 17 T2 7
+SXFILLW4 D cold 0: T1 36 T2 26
+SXFILLW4 D cold 1: T1 39 T2 29
+SXFILLW4 D cold 2: T1 36 T2 26
+SXFILLW4 D warm 0: T1 17 T2 7
+SXFILLW4 D warm 1: T1 17 T2 7
+SXFILLW4 D warm 2: T1 17 T2 7
+SXFILLW4 E cold 0: T1 37 T2 26
+SXFILLW4 E cold 1: T1 37 T2 26
+SXFILLW4 E cold 2: T1 37 T2 26
+SXFILLW4 E warm 0: T1 18 T2 7
+SXFILLW4 E warm 1: T1 18 T2 7
+SXFILLW4 E warm 2: T1 18 T2 7
+SXFILLW4 end PASS
+ResetGraph:jtb=801e78b8,env=801e7900
+```
+
+[bench.txt](/tests/raw/20261023T0420Z-5501a-link/sxfillw4/bench.txt):
+
+```
+1015 bytes of TTY text in psx.log
+```
+
+### 23 October 2026 (link)
+
+[SXFILLW5.txt](/tests/raw/20261023T0505Z-5501a-link/sxfillw5/SXFILLW5.txt):
+
+```
+SXDEV I_MASK at init AC400000
+SXFILLW5 start
+SXFILLW5 A cold 0: T1 37 T2 26
+SXFILLW5 A cold 1: T1 37 T2 26
+SXFILLW5 A cold 2: T1 37 T2 26
+SXFILLW5 A warm 0: T1 18 T2 7
+SXFILLW5 A warm 1: T1 18 T2 7
+SXFILLW5 A warm 2: T1 18 T2 7
+SXFILLW5 B cold 0: T1 36 T2 26
+SXFILLW5 B cold 1: T1 36 T2 26
+SXFILLW5 B cold 2: T1 36 T2 26
+SXFILLW5 B warm 0: T1 17 T2 7
+SXFILLW5 B warm 1: T1 17 T2 7
+SXFILLW5 B warm 2: T1 17 T2 7
+SXFILLW5 C cold 0: T1 36 T2 26
+SXFILLW5 C cold 1: T1 36 T2 26
+SXFILLW5 C cold 2: T1 36 T2 26
+SXFILLW5 C warm 0: T1 17 T2 7
+SXFILLW5 C warm 1: T1 17 T2 7
+SXFILLW5 C warm 2: T1 17 T2 7
+SXFILLW5 D cold 0: T1 36 T2 26
+SXFILLW5 D cold 1: T1 36 T2 26
+SXFILLW5 D cold 2: T1 36 T2 26
+SXFILLW5 D warm 0: T1 17 T2 7
+SXFILLW5 D warm 1: T1 17 T2 7
+SXFILLW5 D warm 2: T1 17 T2 7
+SXFILLW5 E cold 0: T1 37 T2 26
+SXFILLW5 E cold 1: T1 37 T2 26
+SXFILLW5 E cold 2: T1 37 T2 26
+SXFILLW5 E warm 0: T1 18 T2 7
+SXFILLW5 E warm 1: T1 18 T2 7
+SXFILLW5 E warm 2: T1 18 T2 7
+SXFILLW5 F cold 0: T1 39 T2 29
+SXFILLW5 F cold 1: T1 36 T2 26
+SXFILLW5 F cold 2: T1 39 T2 29
+SXFILLW5 F warm 0: T1 17 T2 7
+SXFILLW5 F warm 1: T1 17 T2 7
+SXFILLW5 F warm 2: T1 17 T2 7
+SXFILLW5 G cold 0: T1 36 T2 26
+SXFILLW5 G cold 1: T1 41 T2 31
+SXFILLW5 G cold 2: T1 36 T2 26
+SXFILLW5 G warm 0: T1 17 T2 7
+SXFILLW5 G warm 1: T1 17 T2 7
+SXFILLW5 G warm 2: T1 17 T2 7
+SXFILLW5 H cold 0: T1 40 T2 11297
+SXFILLW5 H cold 1: T1 40 T2 49054
+SXFILLW5 H cold 2: T1 40 T2 21279
+SXFILLW5 H warm 0: T1 17 T2 21369
+SXFILLW5 H warm 1: T1 17 T2 21421
+SXFILLW5 H warm 2: T1 17 T2 21473
+SXFILLW5 end PASS
+ResetGraph:jtb=801e78b8,env=801e7900
+```
+
+[bench.txt](/tests/raw/20261023T0505Z-5501a-link/sxfillw5/bench.txt):
+
+```
+1585 bytes of TTY text in psx.log
+```
+
+### 23 October 2026 (link)
+
+[SXFILLW6.txt](/tests/raw/20261023T0540Z-5501a-link/sxfillw6/SXFILLW6.txt):
+
+```
+SXDEV I_MASK at init 3C040000
+SXFILLW6 start
+SXFILLW6 W 0 0: T1 18 T2 7
+SXFILLW6 W 0 1: T1 18 T2 7
+SXFILLW6 W 0 2: T1 18 T2 7
+SXFILLW6 W 1 0: T1 29 T2 9
+SXFILLW6 W 1 1: T1 27 T2 9
+SXFILLW6 W 1 2: T1 27 T2 9
+SXFILLW6 W 2 0: T1 24 T2 13
+SXFILLW6 W 2 1: T1 24 T2 13
+SXFILLW6 W 2 2: T1 24 T2 13
+SXFILLW6 W 3 0: T1 32 T2 14
+SXFILLW6 W 3 1: T1 32 T2 14
+SXFILLW6 W 3 2: T1 32 T2 14
+SXFILLW6 W 4 0: T1 26 T2 15
+SXFILLW6 W 4 1: T1 26 T2 15
+SXFILLW6 W 4 2: T1 26 T2 15
+SXFILLW6 W 5 0: T1 35 T2 17
+SXFILLW6 W 5 1: T1 35 T2 17
+SXFILLW6 W 5 2: T1 35 T2 17
+SXFILLW6 W 6 0: T1 32 T2 21
+SXFILLW6 W 6 1: T1 32 T2 21
+SXFILLW6 W 6 2: T1 32 T2 21
+SXFILLW6 W 7 0: T1 40 T2 22
+SXFILLW6 W 7 1: T1 40 T2 22
+SXFILLW6 W 7 2: T1 40 T2 22
+SXFILLW6 W 8 0: T1 23 T2 12
+SXFILLW6 W 8 1: T1 23 T2 12
+SXFILLW6 W 8 2: T1 23 T2 12
+SXFILLW6 W 9 0: T1 32 T2 14
+SXFILLW6 W 9 1: T1 32 T2 14
+SXFILLW6 W 9 2: T1 32 T2 14
+SXFILLW6 W 10 0: T1 29 T2 18
+SXFILLW6 W 10 1: T1 29 T2 18
+SXFILLW6 W 10 2: T1 29 T2 18
+SXFILLW6 W 11 0: T1 37 T2 19
+SXFILLW6 W 11 1: T1 37 T2 19
+SXFILLW6 W 11 2: T1 37 T2 19
+SXFILLW6 W 12 0: T1 31 T2 20
+SXFILLW6 W 12 1: T1 31 T2 20
+SXFILLW6 W 12 2: T1 34 T2 23
+SXFILLW6 W 13 0: T1 40 T2 22
+SXFILLW6 W 13 1: T1 40 T2 22
+SXFILLW6 W 13 2: T1 40 T2 22
+SXFILLW6 W 14 0: T1 37 T2 26
+SXFILLW6 W 14 1: T1 37 T2 26
+SXFILLW6 W 14 2: T1 37 T2 26
+SXFILLW6 W 15 0: T1 45 T2 27
+SXFILLW6 W 15 1: T1 45 T2 27
+SXFILLW6 W 15 2: T1 45 T2 27
+SXFILLW6 W F 0: T1 48 T2 30
+SXFILLW6 W F 1: T1 45 T2 27
+SXFILLW6 W F 2: T1 51 T2 33
+SXFILLW6 N 0 0: T1 17 T2 38732
+SXFILLW6 N 0 1: T1 17 T2 38876
+SXFILLW6 N 0 2: T1 17 T2 39011
+SXFILLW6 N 1 0: T1 25 T2 39209
+SXFILLW6 N 1 1: T1 25 T2 39375
+SXFILLW6 N 1 2: T1 25 T2 39541
+SXFILLW6 N 2 0: T1 20 T2 39716
+SXFILLW6 N 2 1: T1 20 T2 39877
+SXFILLW6 N 2 2: T1 20 T2 40039
+SXFILLW6 N 3 0: T1 30 T2 40247
+SXFILLW6 N 3 1: T1 30 T2 40441
+SXFILLW6 N 3 2: T1 30 T2 40635
+SXFILLW6 N 4 0: T1 25 T2 40815
+SXFILLW6 N 4 1: T1 25 T2 40981
+SXFILLW6 N 4 2: T1 25 T2 41147
+SXFILLW6 N 5 0: T1 33 T2 41358
+SXFILLW6 N 5 1: T1 33 T2 41555
+SXFILLW6 N 5 2: T1 33 T2 41752
+SXFILLW6 N 6 0: T1 28 T2 41958
+SXFILLW6 N 6 1: T1 28 T2 42150
+SXFILLW6 N 6 2: T1 28 T2 42344
+SXFILLW6 N 7 0: T1 38 T2 42583
+SXFILLW6 N 7 1: T1 38 T2 42808
+SXFILLW6 N 7 2: T1 41 T2 43036
+SXFILLW6 N 8 0: T1 22 T2 43213
+SXFILLW6 N 8 1: T1 22 T2 43376
+SXFILLW6 N 8 2: T1 22 T2 43539
+SXFILLW6 N 9 0: T1 30 T2 43747
+SXFILLW6 N 9 1: T1 30 T2 43941
+SXFILLW6 N 9 2: T1 30 T2 44135
+SXFILLW6 N 10 0: T1 25 T2 44341
+SXFILLW6 N 10 1: T1 25 T2 44530
+SXFILLW6 N 10 2: T1 25 T2 44719
+SXFILLW6 N 11 0: T1 35 T2 44965
+SXFILLW6 N 11 1: T1 35 T2 45187
+SXFILLW6 N 11 2: T1 35 T2 45412
+SXFILLW6 N 12 0: T1 30 T2 45626
+SXFILLW6 N 12 1: T1 30 T2 45820
+SXFILLW6 N 12 2: T1 30 T2 46014
+SXFILLW6 N 13 0: T1 38 T2 46253
+SXFILLW6 N 13 1: T1 38 T2 46480
+SXFILLW6 N 13 2: T1 38 T2 46705
+SXFILLW6 N 14 0: T1 33 T2 46939
+SXFILLW6 N 14 1: T1 33 T2 47165
+SXFILLW6 N 14 2: T1 37 T2 47389
+SXFILLW6 N 15 0: T1 46 T2 47659
+SXFILLW6 N 15 1: T1 46 T2 47915
+SXFILLW6 N 15 2: T1 46 T2 48171
+SXFILLW6 N F 0: T1 43 T2 20384
+SXFILLW6 N F 1: T1 46 T2 58155
+SXFILLW6 N F 2: T1 43 T2 30381
+SXFILLW6 end PASS
+ResetGraph:jtb=801e78b8,env=801e7900
+```
+
+Output files that match an earlier run: [bench.txt](/tests/raw/20261023T0540Z-5501a-link/sxfillw6/bench.txt) (as run 20261023T0340Z-5501a-link).
+
+## References
+
+[^run1]: Hardware test run 20261023T0118Z-5501a-link on the SCPH-5501: [SXFILLW.txt](/tests/raw/20261023T0118Z-5501a-link/sxfillw/SXFILLW.txt).
+[^run2]: Hardware test run 20261023T0313Z-5501a-link on the SCPH-5501: [SXFILLW2.txt](/tests/raw/20261023T0313Z-5501a-link/sxfillw2/SXFILLW2.txt).
+[^run3]: Hardware test run 20261023T0340Z-5501a-link on the SCPH-5501: [SXFILLW3.txt](/tests/raw/20261023T0340Z-5501a-link/sxfillw3/SXFILLW3.txt).
+[^run4]: Hardware test run 20261023T0420Z-5501a-link on the SCPH-5501: [SXFILLW4.txt](/tests/raw/20261023T0420Z-5501a-link/sxfillw4/SXFILLW4.txt).
+[^run5]: Hardware test run 20261023T0505Z-5501a-link on the SCPH-5501: [SXFILLW5.txt](/tests/raw/20261023T0505Z-5501a-link/sxfillw5/SXFILLW5.txt).
+[^run6]: Hardware test run 20261023T0540Z-5501a-link on the SCPH-5501: [SXFILLW6.txt](/tests/raw/20261023T0540Z-5501a-link/sxfillw6/SXFILLW6.txt).