DMA List Loops

Times CPU work while DMA channel 2 walks a finished list, a list that points at itself and two entries that point at each other.

DMA List Loops
Machine	SCPH-5501
Program	dma/chain-looping (ps1-tests)

This is an old revision of this page, as edited by RemmyLee at 05:11, 23 October 2026. Edit this revision | Latest revision

Overview

The work is a loop of 1000 additions to a variable in RAM. Root counter 2 times it in units of 8 system clock cycles, and the program prints the time in cycles. The program times it once with no DMA running. It then starts DMA channel 2 in list mode (sync mode 2) on three lists: a list with one entry that ends at once, a list whose only entry points to itself, and two entries that point to each other.¹

After the work the program reads whether CHCR bit 24 has cleared (finished) and whether the channel's DICR flag is set (irq), then stops the channel.¹

Results

The work took 17,104 to 17,120 cycles with no DMA running and the same with the finished list. That list finished and raised no interrupt flag.²

With the self-referencing list and with the pair of entries the work took 25,648 to 25,672 cycles. That is about 50% longer than the work alone. Neither list finished, and neither raised an interrupt flag.²

Table 1: Work time in system clock cycles over six runs
List	Work	Finished	IRQ
No DMA	17,104 to 17,120
One entry that ends	17,104 to 17,120	yes	no
One entry pointing to itself	25,648 to 25,664	no	no
Two entries pointing to each other	25,648 to 25,672	no	no

Runs

25 September 2026

12CHN.txt

===== 12 CHN DMA CHAIN LOOP | BIOS 19951204 System ROM Version 3.0 11/18/96 A

dma/chain-looping
Tests CPU behavior with various invalid GPU linked list chains.

Testing with no DMA active...
  Work took 17120 ticks
Testing with empty but complete chain...
  Work took 17112 ticks, finished = true, irq = false
Testing single self-referencing chain...
  Work took 25648 ticks, finished = false, irq = false
Testing double self-referencing chain...
  Work took 25656 ticks, finished = false, irq = false

27 September 2026

12CHN.txt

===== 12 CHN DMA CHAIN LOOP | BIOS 19951204 System ROM Version 3.0 11/18/96 A

dma/chain-looping
Tests CPU behavior with various invalid GPU linked list chains.

Testing with no DMA active...
  Work took 17104 ticks
Testing with empty but complete chain...
  Work took 17104 ticks, finished = true, irq = false
Testing single self-referencing chain...
  Work took 25664 ticks, finished = false, irq = false
Testing double self-referencing chain...
  Work took 25664 ticks, finished = false, irq = false

27 September 2026 run 2

12CHN.txt

===== 12 CHN DMA CHAIN LOOP | BIOS 19951204 System ROM Version 3.0 11/18/96 A

dma/chain-looping
Tests CPU behavior with various invalid GPU linked list chains.

Testing with no DMA active...
  Work took 17112 ticks
Testing with empty but complete chain...
  Work took 17120 ticks, finished = true, irq = false
Testing single self-referencing chain...
  Work took 25664 ticks, finished = false, irq = false
Testing double self-referencing chain...
  Work took 25672 ticks, finished = false, irq = false

27 September 2026 run 3

12CHN.txt

===== 12 CHN DMA CHAIN LOOP | BIOS 19951204 System ROM Version 3.0 11/18/96 A

dma/chain-looping
Tests CPU behavior with various invalid GPU linked list chains.

Testing with no DMA active...
  Work took 17104 ticks
Testing with empty but complete chain...
  Work took 17104 ticks, finished = true, irq = false
Testing single self-referencing chain...
  Work took 25664 ticks, finished = false, irq = false
Testing double self-referencing chain...
  Work took 25664 ticks, finished = false, irq = false

27 September 2026 run 4

12CHN.txt

===== 12 CHN DMA CHAIN LOOP | BIOS 19951204 System ROM Version 3.0 11/18/96 A

dma/chain-looping
Tests CPU behavior with various invalid GPU linked list chains.

Testing with no DMA active...
  Work took 17104 ticks
Testing with empty but complete chain...
  Work took 17112 ticks, finished = true, irq = false
Testing single self-referencing chain...
  Work took 25648 ticks, finished = false, irq = false
Testing double self-referencing chain...
  Work took 25656 ticks, finished = false, irq = false

28 September 2026

12CHN.txt

===== 12 CHN DMA CHAIN LOOP | BIOS 19951204 System ROM Version 3.0 11/18/96 A

dma/chain-looping
Tests CPU behavior with various invalid GPU linked list chains.

Testing with no DMA active...
  Work took 17104 ticks
Testing with empty but complete chain...
  Work took 17104 ticks, finished = true, irq = false
Testing single self-referencing chain...
  Work took 25648 ticks, finished = false, irq = false
Testing double self-referencing chain...
  Work took 25648 ticks, finished = false, irq = false

References

^ ^a ^b ps1-tests, dma/chain-looping. https://github.com/JaCzekanski/ps1-tests.
^ ^a ^b SCPH-5501 output: main/12CHN.txt and the files beside it, with the other runs listed under Runs.

Categories: Hardware tests