psx.wiki

GTE Lighting Input Latency: Difference between revisions

Revision as of 05:11, 23 October 2026
RemmyLee
(Hardware tests: 72 more test pages, listed on the main page by area; RUN.toml no longer published)
Revision as of 05:26, 23 October 2026
RemmyLee
(Hardware tests: cross-link the two CD-ROM no-disc pages and the two GTE input timing pages, with the measured step sizes)
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| BFC | | | 12 || BFC | | | 12 |
−An empty cell is a register the command does not use. NCDT needs the far colour longest: a write to GFC up to 13 NOPs after NCDT still changed its result.[^run]+An empty cell is a register the command does not use. NCDT needs the far colour longest: a write to GFC up to 13 NOPs after NCDT still changed its result.[^run] [GTE Input Timing and I/O Load Pairs](/tests/gte-input-timing/) sweeps the inputs of every GTE command in steps of up to 8 NOPs, cold from RAM and then cached. In that program a write to VXY2 four NOPs after NCT still reached the command in one of the two runs.[^cpu4]
## Runs## Runs
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[^src]: pcsx-redux nugget, tests/gte-latency/gte-latency.c and gte-latency-common.h, header comments. MIT License. https://github.com/pcsx-redux/nugget[^src]: pcsx-redux nugget, tests/gte-latency/gte-latency.c and gte-latency-common.h, header comments. MIT License. https://github.com/pcsx-redux/nugget
[^run]: Hardware test run 20261022T2233Z-5501a-link on the SCPH-5501: [GTELATENCY.txt](/tests/raw/20261022T2233Z-5501a-link/gtelatency/GTELATENCY.txt), the "boundary" lines.[^run]: Hardware test run 20261022T2233Z-5501a-link on the SCPH-5501: [GTELATENCY.txt](/tests/raw/20261022T2233Z-5501a-link/gtelatency/GTELATENCY.txt), the "boundary" lines.
+[^cpu4]: SCPH-5501 output: [cpu4/12GA4.txt](/tests/raw/20260928T0000Z-5501a-card-h/cpu4/12GA4.txt).