View source for GTE Lighting Input Latency

You do not have permission to edit this page. Log in to edit.
---
title: GTE Lighting Input Latency
type: test
summary: Measures how long NCT, NCCT and NCDT keep reading each input register after they start.
category: Hardware tests
info: Machine = SCPH-5501
info: Program = gte-latency (pcsx-redux nugget)
---

## Overview

A [GTE](/hardware/gte/) command reads its input registers while it runs. The program starts a lighting command, waits N NOPs, then writes a different value to one input register with MTC2 or CTC2. N runs from 0 to 32, and every output of the command is compared against an unchanged baseline.[^src]

The smallest N at which the late write no longer changes the output is the number of instruction slots the command still needs that register. The scene uses identity light and colour matrices, three unit normals, a grey colour of 80h and zero back and far colours. Every input is reset before each probe.[^src]

## Results

A command reads its inputs in a fixed order. The first vertex and the first rows of the light matrix are read at once, and the back colour, far colour and RGBC late. The number of NOPs after which a write to each register no longer reached the command is as follows:[^run]

Table: Instruction slots each input stays in use

| Register | NCT | NCCT | NCDT |
| --- | --- | --- | --- |
| VXY0, VXY1 | 0 | 0 | 0 |
| VZ0 | 0 | 0 | 1 |
| VZ1 | 1 | 1 | 2 |
| VXY2 | 3 | 3 | 3 |
| VZ2 | 4 | 4 | 3 |
| L11L12, L13L21, L33 | 0 | 0 | 0 |
| L31L32 | 2 | 1 | 2 |
| L22L23 | 3 | 3 | 3 |
| LR1LR2 | 5 | 5 | 5 |
| LR3LG1 | 3 | 5 | 3 |
| LG2LG3 | 7 | 9 | 7 |
| LB1LB2 | 8 | 8 | 8 |
| LB3 | 5 | 5 | 5 |
| RBK | 8 | 7 | 8 |
| GBK | 7 | 9 | 7 |
| BBK | 8 | 8 | 8 |
| RGBC | | 12 | 13 |
| RFC | | | 13 |
| GFC | | | 14 |
| BFC | | | 12 |

An empty cell is a register the command does not use. NCDT needs the far colour longest: a write to GFC up to 13 NOPs after NCDT still changed its result.[^run] [GTE Input Timing and I/O Load Pairs](/tests/gte-input-timing/) runs each GTE command cold from RAM and then cached, and it sweeps the inputs in steps of up to 8 NOPs. There a write to VXY2 four NOPs after NCT still reached the command in one of the two runs.[^cpu4]

## Runs

### 22 October 2026

[gtelatency/GTELATENCY.txt](/tests/raw/20261022T2233Z-5501a-link/gtelatency/GTELATENCY.txt)

[gtelatency/bench.txt](/tests/raw/20261022T2233Z-5501a-link/gtelatency/bench.txt)

```
226143 bytes of TTY text in psx.log
```

[gtelatency/when.txt](/tests/raw/20261022T2233Z-5501a-link/gtelatency/when.txt)

```
20261022T2233Z
```

## References

[^src]: pcsx-redux nugget, tests/gte-latency/gte-latency.c and gte-latency-common.h, header comments. MIT License. https://github.com/pcsx-redux/nugget
[^run]: Hardware test run 20261022T2233Z-5501a-link on the SCPH-5501: [GTELATENCY.txt](/tests/raw/20261022T2233Z-5501a-link/gtelatency/GTELATENCY.txt), the "boundary" lines.
[^cpu4]: SCPH-5501 output: [cpu4/12GA4.txt](/tests/raw/20260928T0000Z-5501a-card-h/cpu4/12GA4.txt).