Memory Card After a Write: Difference between revisions
| Revision as of 05:11, 23 October 2026 RemmyLee (Hardware tests: 72 more test pages, listed on the main page by area; RUN.toml no longer published) | Revision as of 05:18, 23 October 2026 RemmyLee (Hardware tests: nine DMA, MDEC and BIOS test pages with part names for titles; join one-sentence paragraphs per voice.md) | ||
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| SXCARDWDIAG reads frame 0, writes it three times with a read after each write, and reads it again at the end. For every byte it logs the byte sent, the byte received and the time to the receive interrupt. Times are root counter 2 ticks of 8 cycles.[^wd] | SXCARDWDIAG reads frame 0, writes it three times with a read after each write, and reads it again at the end. For every byte it logs the byte sent, the byte received and the time to the receive interrupt. Times are root counter 2 ticks of 8 cycles.[^wd] | ||
| − | SXCARDGAP and SXCARDGAP2 write frame 0, wait a set number of horizontal blanks counted on root counter 1, and then read. A polled pass instead reads again and again after the write until the card answers.[^gap2run] | + | SXCARDGAP and SXCARDGAP2 write frame 0, wait a set number of horizontal blanks counted on root counter 1, and then read. A polled pass instead reads again and again after the write until the card answers.[^gap2run] The [Memory Card](/hardware/memory-card/) page describes the card protocol. |
| − | The [Memory Card](/hardware/memory-card/) page describes the card protocol. | ||
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| ## Results | ## Results | ||