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--- title: MDEC Hand-Made Streams type: test summary: Measures the MDEC with hand-made streams that change one input at a time, the command bits, the status sequence and decode time by DMA. category: Hardware tests info: Machine = SCPH-5501 info: Program = mdec2 --- ## Overview The program follows the [MDEC Output](/tests/mdecout/) test on the [MDEC](/hardware/mdec/). It feeds streams made by hand so that each row changes one input: the colour matrix over the Cr, Cb and Y range, the mono clip, the quant tables and q_scale, each AC position, the scale table and the end codes. It also sets the unused command bits, follows the status register through a decode and times decodes by DMA0 and DMA1.[^run] Every CPU decode reloads the tables first. A CPU wait gives up after 20000 idle turns and a DMA wait after 10 million cycles, and the channel is then stopped.[^run] See also: - [MDEC Status and Decode Timing](/tests/mdec-status-decode-timing/) - [MDEC Block Timing](/tests/mdec-block-timing/) ## Results ### Command Bits Bits 16 to 24 of the decode command changed neither the status, the output nor its CRC. Bit 25 changed only the status: A3040001h became A3840001h, so the bit appears in status bit 23. MDEC(2) with bits 1 to 24 set took 16 table words, which is the count with them clear.[^h-mcb] ### Status Sequence The status after reset is 80040000h, and after MDEC(2) with bit 0 set it is A004001Fh. One colour macroblock of DC-only blocks gave the same status changes at 15 and at 24 bit:[^h-mst] Table: Status changes for one colour macroblock | Cycles after the command | Status | | --- | --- | | 27 | 60041CFCh | | 10752 | 20041CFCh | | 19435 to 19441 | A0041CFCh | ### End Codes and Padding A block with all 63 AC values and no end code gave 16 words, and the next DC began the next block. FE00h padding between two blocks did not change the output: both streams gave CRC 9BCFAB33h. Three FE00h halfwords before the first DC removed 32 words from the output.[^h-mrl] ### Constant Output The DC-only decodes of groups 01 to 04 returned the same output whatever their input on this run. Every 15-bit decode had the first pixel FD80h and 104 words, and every 8-bit mono decode had the first byte 80h, through all DC values, quant entries and q_scale values. These groups therefore measure neither the colour matrix nor the mono clip. The quant table rows of group 04 are constant in the same way.[^h-mcm][^h-mmo][^h-mqt] ### Decode by DMA Table: Decodes by DMA0 and DMA1 with blocks of 32 words | Decode | DMA0 done | DMA1 done | | --- | --- | --- | | 15 bit, 1 macroblock | 2912 cycles | 5152 cycles | | 8 bit, 1 block | | 168 cycles | | 8 bit, 4 blocks | | 1056 cycles | | 15 bit, 2 to 16 macroblocks | 2912 to 35504 cycles | not done after 10 million | | 24 bit, 1 to 16 macroblocks | 2912 to 35408 cycles | not done after 10 million | DMA1 block sizes from 1 to 32 words with 8 colour macroblocks all timed out, and the CRC of the partial output changed with the block size.[^h-mtm][^h-mdb] ## Runs ### 28 September 2026 card-h Raw output: [00RUN.txt](/tests/raw/20260928T0000Z-5501a-card-h/mdec2/00RUN.txt) · [01MCM.txt](/tests/raw/20260928T0000Z-5501a-card-h/mdec2/01MCM.txt) · [02MC2.txt](/tests/raw/20260928T0000Z-5501a-card-h/mdec2/02MC2.txt) · [03MMO.txt](/tests/raw/20260928T0000Z-5501a-card-h/mdec2/03MMO.txt) · [04MQT.txt](/tests/raw/20260928T0000Z-5501a-card-h/mdec2/04MQT.txt) · [05MAC.txt](/tests/raw/20260928T0000Z-5501a-card-h/mdec2/05MAC.txt) · [06MSC.txt](/tests/raw/20260928T0000Z-5501a-card-h/mdec2/06MSC.txt) · [07MRL.txt](/tests/raw/20260928T0000Z-5501a-card-h/mdec2/07MRL.txt) · [08MCB.txt](/tests/raw/20260928T0000Z-5501a-card-h/mdec2/08MCB.txt) · [09MST.txt](/tests/raw/20260928T0000Z-5501a-card-h/mdec2/09MST.txt) · [10MTM.txt](/tests/raw/20260928T0000Z-5501a-card-h/mdec2/10MTM.txt) · [11MDB.txt](/tests/raw/20260928T0000Z-5501a-card-h/mdec2/11MDB.txt) 00RUN.txt: ``` ===== 00 RUN | BIOS 19951204 System ROM Version 3.0 11/18/96 A 11 tests A chain program, linked at 80010000 Saved on the card in slot 2, from image 1 COP0 at start: BPC 00000000 BDA 80024F50 TAR 8010D558 DCIC 00000000 BadVaddr 1F801DAA BDAM FFFFFFFF BPCM 00000000 SR 70000000 Cause 00000020 EPC 8010E10C PRId 00000002 ``` 01MCM.txt: ``` ===== 01 MCM M2 MATRIX 15BIT | BIOS 19951204 System ROM Version 3.0 11/18/96 A BadVaddr as the group starts: 1F801DAA One colour macroblock of DC-only blocks (Cr, Cb, then Y in all four), q_scale 1, the 4bit/8bit EXE's tables (quant 2 for DC), 15 bit unsigned, by CPU. Each cell is the first pixel; * = the 256 pixels are not all the same. Columns: Cb -512, -256, -128, -64, 0, 64, 128, 256, 511 (decompression.txt:99-115, data-format.txt:65-71). Y -512 Cr -512: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y -512 Cr -256: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y -512 Cr -128: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y -512 Cr -64: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y -512 Cr 0: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y -512 Cr 64: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y -512 Cr 128: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y -512 Cr 256: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y -512 Cr 511: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y -128 Cr -512: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y -128 Cr -256: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y -128 Cr -128: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y -128 Cr -64: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y -128 Cr 0: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y -128 Cr 64: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y -128 Cr 128: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y -128 Cr 256: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y -128 Cr 511: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y 0 Cr -512: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y 0 Cr -256: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y 0 Cr -128: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y 0 Cr -64: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y 0 Cr 0: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y 0 Cr 64: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y 0 Cr 128: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y 0 Cr 256: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y 0 Cr 511: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y 128 Cr -512: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y 128 Cr -256: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y 128 Cr -128: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y 128 Cr -64: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y 128 Cr 0: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y 128 Cr 64: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y 128 Cr 128: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y 128 Cr 256: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y 128 Cr 511: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y 511 Cr -512: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y 511 Cr -256: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y 511 Cr -128: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y 511 Cr -64: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y 511 Cr 0: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y 511 Cr 64: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y 511 Cr 128: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y 511 Cr 256: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Y 511 Cr 511: FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) FD80*(104 words) Done. ``` 02MC2.txt: ``` ===== 02 MC2 M2 MATRIX 24BIT | BIOS 19951204 System ROM Version 3.0 11/18/96 A BadVaddr as the group starts: 1F801DAA The MCM grid at 24 bit, signed (first pixel as BBGGRR). Columns Cb as in MCM. Y -512 Cr -512: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y -512 Cr -256: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y -512 Cr -128: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y -512 Cr -64: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y -512 Cr 0: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y -512 Cr 64: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y -512 Cr 128: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y -512 Cr 256: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y -512 Cr 511: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y -128 Cr -512: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y -128 Cr -256: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y -128 Cr -128: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y -128 Cr -64: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y -128 Cr 0: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y -128 Cr 64: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y -128 Cr 128: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y -128 Cr 256: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y -128 Cr 511: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y 0 Cr -512: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y 0 Cr -256: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y 0 Cr -128: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y 0 Cr -64: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y 0 Cr 0: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y 0 Cr 64: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y 0 Cr 128: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y 0 Cr 256: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y 0 Cr 511: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y 128 Cr -512: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y 128 Cr -256: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y 128 Cr -128: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y 128 Cr -64: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y 128 Cr 0: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y 128 Cr 64: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y 128 Cr 128: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y 128 Cr 256: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y 128 Cr 511: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y 511 Cr -512: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y 511 Cr -256: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y 511 Cr -128: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y 511 Cr -64: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y 511 Cr 0: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y 511 Cr 64: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y 511 Cr 128: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y 511 Cr 256: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Y 511 Cr 511: FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) FCFD80*(104 words) Done. ``` 03MMO.txt: ``` ===== 03 MMO M2 MONO DC | BIOS 19951204 System ROM Version 3.0 11/18/96 A BadVaddr as the group starts: 1F801DAA One mono block of only a DC value, q_scale 1 (DC times quant 2, saturated at +-400h, decompression.txt:24-27), the first output byte (8 bit) or nibble (4 bit), for DC -512 to 496 in steps of 16 (y_to_mono, decompression.txt:117-125). 8 bit unsigned: 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 8 bit signed: 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 80(104) 4 bit unsigned: 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 4 bit signed: 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) 0(104) DC and one AC at zigzag 1 (q_scale 63), 8 bit signed, row 0 and row 7 of the block, to pass the 9-bit clip (Y AND 1FFh, decompression.txt:121): DC 511 AC 511: 0FFCFD80 F35F2CE0 | EFFF1F71 04F900E6 (104 words) DC 511 AC -512: 0FFCFD80 F35F2CE0 | EFFF1F71 04F900E6 (104 words) DC 511 AC 256: 0FFCFD80 F35F2CE0 | EFFF1F71 04F900E6 (104 words) DC -512 AC 511: 0FFCFD80 F35F2CE0 | EFFF1F71 04F900E6 (104 words) DC -512 AC -512: 0FFCFD80 F35F2CE0 | EFFF1F71 04F900E6 (104 words) DC -512 AC 256: 0FFCFD80 F35F2CE0 | EFFF1F71 04F900E6 (104 words) DC 0 AC 511: 0FFCFD80 F35F2CE0 | EFFF1F71 04F900E6 (104 words) DC 0 AC -512: 0FFCFD80 F35F2CE0 | EFFF1F71 04F900E6 (104 words) DC 0 AC 256: 0FFCFD80 F35F2CE0 | EFFF1F71 04F900E6 (104 words) Done. ``` 04MQT.txt: ``` ===== 04 MQT M2 QUANT TABLE | BIOS 19951204 System ROM Version 3.0 11/18/96 A BadVaddr as the group starts: 1F801DAA Mono 8 bit signed, one block of only DC 100 (then DC -100), the first byte, with the luminance quant table's entry 0 as shown and q_scale 0, 1, 2, 63 in the DC halfword (decompression.txt:23-27: DC is not scaled by q_scale; q_scale 0 is x2). quant[0] 0: 80(104) 80(104) 80(104) 80(104) | 80(104) 80(104) 80(104) 80(104) quant[0] 1: 80(104) 80(104) 80(104) 80(104) | 80(104) 80(104) 80(104) 80(104) quant[0] 2: 80(104) 80(104) 80(104) 80(104) | 80(104) 80(104) 80(104) 80(104) quant[0] 3: 80(104) 80(104) 80(104) 80(104) | 80(104) 80(104) 80(104) 80(104) quant[0] 4: 80(104) 80(104) 80(104) 80(104) | 80(104) 80(104) 80(104) 80(104) quant[0] 8: 80(104) 80(104) 80(104) 80(104) | 80(104) 80(104) 80(104) 80(104) quant[0] 16: 80(104) 80(104) 80(104) 80(104) | 80(104) 80(104) 80(104) 80(104) quant[0] 64: 80(104) 80(104) 80(104) 80(104) | 80(104) 80(104) 80(104) 80(104) quant[0] 255: 80(104) 80(104) 80(104) 80(104) | 80(104) 80(104) 80(104) 80(104) One AC of 10 at zigzag 1 after DC 0: quant[1] and q_scale as shown, words 0 and 1 ((AC x quant x q_scale + 4) / 8, decompression.txt:33): quant[1] 1: qs1 0FFCFD80 F35F2CE0 qs2 0FFCFD80 F35F2CE0 qs8 0FFCFD80 F35F2CE0 qs63 0FFCFD80 F35F2CE0 quant[1] 2: qs1 0FFCFD80 F35F2CE0 qs2 0FFCFD80 F35F2CE0 qs8 0FFCFD80 F35F2CE0 qs63 0FFCFD80 F35F2CE0 quant[1] 16: qs1 0FFCFD80 F35F2CE0 qs2 0FFCFD80 F35F2CE0 qs8 0FFCFD80 F35F2CE0 qs63 0FFCFD80 F35F2CE0 quant[1] 255: qs1 0FFCFD80 F35F2CE0 qs2 0FFCFD80 F35F2CE0 qs8 0FFCFD80 F35F2CE0 qs63 0FFCFD80 F35F2CE0 Saturation: AC +511 and -512 at zigzag 1, quant 255, q_scale 63 (clamped to +-400h, decompression.txt:27), against AC +127 at quant 64 q_scale 1: AC 511: crc 7A6A8F92, 0FFCFD80 F35F2CE0 AC -512: crc 7A6A8F92, 0FFCFD80 F35F2CE0 AC 127: crc 7A6A8F92, 0FFCFD80 F35F2CE0 Cr and Cb quant: a colour macroblock with Cr DC 200 only, the colour table's entry 0 set to 1, 2, 4 while the luminance table stays standard (15 bit, first pixel): FD80 FD80 FD80 Done. ``` 05MAC.txt: ``` ===== 05 MAC M2 AC ZIGZAG | BIOS 19951204 System ROM Version 3.0 11/18/96 A BadVaddr as the group starts: 1F801DAA Mono 8 bit signed, DC 0 and one AC of 100 at zigzag position k (run k-1), q_scale 8, quant all 2 (value 200), the standard scale table: the block's CRC and words 0, 1 and 15 (decompression.txt:17-36, the zigzag table :150-160). k 1: crc E79D125C 23647F7F 80809BDD 80809BDD (words differ) k 2: crc 6243886E 7F7F7F7F 7F7F7F7F 80808080 (words differ) k 3: crc 47F06FD4 7F7F7F7F 7F7F7F7F 7F7F7F7F (words differ) k 4: crc 8A9A4176 317F7F7F 808080CF 7F7F7F31 (words differ) k 5: crc 930C57F0 80BB457F 7F45BB80 7F45BB80 (words differ) k 6: crc 578C0497 9B80DD7F 80237F64 80237F64 (words differ) k 7: crc D13B5589 80A0607F 7F60A080 80A0607F (words differ) k 8: crc 5AB7C969 2E7F7F7F 808080D2 808080D2 (words differ) k 9: crc 4E2752B5 7F7F7F7F 7F7F7F7F 80808080 (words differ) k 10: crc CF56357B 7F7F7F7F 7F7F7F7F 7F7F7F7F (words differ) k 11: crc A7898CB4 29767F7F 80808AD6 7F7F762A (words differ) k 12: crc 16BB47B7 80A65A7F 7F5AA680 7F5AA680 (words differ) k 13: crc 7E87F9C4 8080CF7F 80317F7F 7FCF8080 (words differ) k 14: crc F3EADECB 7F80807F 7F80807F 7F80807F (words differ) k 15: crc C354795E 7F238064 9B7FDD80 9B7FDD80 (words differ) k 16: crc 2C2A7E2E 7F80807F 7F80807F 807F7F80 (words differ) k 17: crc 02ECCFE8 8080D27F 802E7F7F 802E7F7F (words differ) k 18: crc A4865FFF 80AF517F 7F51AF80 80AF517F (words differ) k 19: crc ABAC9621 23647F7F 80809BDD 80809BDD (words differ) k 20: crc E6EA4AF6 64646464 64646464 9B9B9B9B (words differ) k 21: crc 26124E0E 45454545 45454545 45454545 (words differ) k 22: crc 1E7D5EFD 1C4F767F 808AB1E4 7F764F1C (words differ) k 23: crc E559D0FD 80BB457F 7F45BB80 7F45BB80 (words differ) k 24: crc 9653B86A 8A80D67F 80297F76 7FD7808A (words differ) k 25: crc 0D190369 7F80807F 7F80807F 7F80807F (words differ) k 26: crc 29078467 7F31807F 807FCF80 7F80317F (words differ) k 27: crc 0E3673B7 BB7F8045 45807FBB 45807FBB (words differ) k 28: crc 2DB3D6A0 807F9B23 DD64807F DD64807F (words differ) k 29: crc 53D272E5 A07F8060 60807FA0 A07F8060 (words differ) k 30: crc CA5BAC6C 7F2E807F 807FD280 807FD280 (words differ) k 31: crc 68A2D4F3 7F80807F 7F80807F 807F7F80 (words differ) k 32: crc 54C2B8BF 9B80DD7F 80237F64 80237F64 (words differ) k 33: crc 730DD188 80CA367F 7F36CA80 80CA367F (words differ) k 34: crc 92BCCBAB 13365160 A0AFCAED A0AFCAED (words differ) k 35: crc 1358D5A2 23232323 23232323 DDDDDDDD (words differ) k 36: crc 86A7F44A 0A1C2931 CFD7E4F6 312A1C0A (words differ) k 37: crc F72E1DDA A6DB255A 5A25DBA6 5A25DBA6 (words differ) k 38: crc 2A61D32B B180E476 8A1C7F4F 76E480B1 (words differ) k 39: crc A6DF7D2C 7F80807F 7F80807F 7F80807F (words differ) k 40: crc CC8EA200 7F298076 8A7FD680 76802A7F (words differ) k 41: crc 3DCFFD7E A67F805A 5A807FA6 5A807FA6 (words differ) k 42: crc C88568C9 807F8031 CF7F807F 31807F80 (words differ) k 43: crc 868AB327 807F802E D27F807F D27F807F (words differ) k 44: crc 9B538367 AF7F8051 51807FAF AF7F8051 (words differ) k 45: crc 22E6655B 7F238064 9B7FDD80 9B7FDD80 (words differ) k 46: crc BEE0DB88 649B9B64 649B9B64 9B65659B (words differ) k 47: crc 8604E4D4 CAA0ED51 AF136036 AF136036 (words differ) k 48: crc EB2F7F65 D2ED132E 2E13EDD2 D2ED132E (words differ) k 49: crc 0F14D4A2 E4CFF629 D70A311C 2AF6CFE4 (words differ) k 50: crc 6C41034A 45BBBB45 45BBBB45 45BBBB45 (words differ) k 51: crc A365A488 761C804F B17FE48A 4F801C76 (words differ) k 52: crc 81DCCA0F BB7F8045 45807FBB 45807FBB (words differ) k 53: crc 22026120 807F8A29 D676807F 2A8A7F80 (words differ) k 54: crc 11465541 807F9B23 DD64807F DD64807F (words differ) k 55: crc 016EB1B1 CA7F8036 36807FCA CA7F8036 (words differ) k 56: crc 77056EFA 5113A036 CA60EDAF CA60EDAF (words differ) k 57: crc A7A96E98 23DDDD23 23DDDD23 DD2323DD (words differ) k 58: crc 09573BB6 290ACF1C E431F6D7 1CCF0A2A (words differ) k 59: crc 02266BC7 DB5AA625 25A65ADB 25A65ADB (words differ) k 60: crc DF19BC5B 8076B11C E44F8A7F 1CB17680 (words differ) k 61: crc D2044F13 A051CA13 ED36AF60 ED36AF60 (words differ) k 62: crc 1AEBCFAC ED2ED213 13D22EED ED2ED213 (words differ) k 63: crc 7DC7A246 CF29E40A F61CD731 0AE42ACF (words differ) q_scale 0 ("special mode without qt[k]", stored at blk[k] without the zigzag), AC 100 at k: k 1: crc D65D77F1 07141D23 DDE3ECF9 DDE3ECF9 k 2: crc 700D4887 DFF20E21 210EF2DF 210EF2DF k 3: crc 0AF4EE0E ECDDF91D E3072314 E3072314 k 4: crc AFD8C3DF 19E7E719 19E7E719 19E7E719 k 5: crc E42FFB0A 1D07DD14 EC23F9E3 EC23F9E3 k 6: crc 2E4E2DAE F221DF0E 0EDF21F2 0EDF21F2 k 7: crc A824BB50 DD1DEC07 F914E323 F914E323 k 8: crc 52EC9A81 23232323 23232323 DDDDDDDD k 9: crc 31E9FC66 0A1B2930 D0D7E5F6 30291B0A k 10: crc 1FA39977 D3ED132D 2D13EDD3 D3ED132D k 19: crc 7BD7F4BF E6D3F726 DA092D1A DA092D1A k 28: crc 531ED389 1DE3E31D 1DE3E31D E31D1DE3 k 37: crc 372D16B9 1D07DD14 EC23F9E3 EC23F9E3 k 46: crc 150DCB44 F51AE60B 0BE61AF5 F51AE60B k 55: crc 59A6CD94 ED10F504 FC0BF013 FC0BF013 Done. ``` 06MSC.txt: ``` ===== 06 MSC M2 SCALE TABLE | BIOS 19951204 System ROM Version 3.0 11/18/96 A BadVaddr as the group starts: 1F801DAA Mono 8 bit signed, DC 200, AC 100 at zigzag 1 and -60 at zigzag 9, q_scale 8, quant all 2, with the scale table (MDEC(3), commands.txt:24-31) as shown: Standard: crc 6BA54377, BF00324D 7F808080 .. 7F7F7F80 All 0: crc 758D6336, 00000000 00000000 .. 00000000 Row 0 standard, the rest 0: crc C831F7F9, 32323232 32323232 .. 32323232 All 4000h: crc C6EBAA71, 19191919 19191919 .. 19191919 All 7FFFh: crc D5854CE9, 64646464 64646464 .. 64646464 All 8000h: crc D5854CE9, 64646464 64646464 .. 64646464 Standard negated: crc 157DF336, BF00324D 7F808080 .. 7F7F7F80 4000h on the diagonal: crc 445C3E02, 00004019 00000000 .. 00000000 Standard with bit 0 cleared: crc 6BA54377, BF00324D 7F808080 .. 7F7F7F80 Done. ``` 07MRL.txt: ``` ===== 07 MRL M2 RLE EDGES | BIOS 19951204 System ROM Version 3.0 11/18/96 A BadVaddr as the group starts: 1F801DAA Mono 8 bit signed decodes of hand-made streams (data-format.txt:57-96), each padded with FE00h to whole words, tables loaded fresh. Words out (16 a block), CRC, words 0 and 1. DC 100, EOB: 272 words, crc BBD3E8A0, 19191919 19191919 Three FE00h, then DC 100, EOB: 240 words, crc B8DC8A5F, 19191919 19191919 FE01h first (q_scale 3Fh, DC -511), EOB: 256 words, crc 3E995B18, 80808080 80808080 FC00h first (q_scale 3Fh, DC 0), EOB: 256 words, crc 6F8B250A, 00000000 00000000 DC -512 (200h), EOB: 256 words, crc 3E995B18, 80808080 80808080 AC 50 at k 63, EOB: 240 words, crc 8B47BA1A, CF29E40A F61CD731 AC 50 at k 63, no EOB, then DC 100, EOB: 256 words, crc 90AADE1A, CF29E40A F61CD731 Run 63 from k 0 (k 64), no EOB, then DC 100, EOB: 256 words, crc ED3571FC, 00000000 00000000 FE01h as an AC (run 63, AC 1), then DC 100, EOB: 256 words, crc 774FF80E, 00000000 00000000 DC and 63 AC of +-20 (run 0), EOB: 16 words, crc C7404FE9, 946EE680 8006BE3A DC and 63 AC, no EOB, then DC 100, EOB: 32 words, crc 9268D875, 946EE680 8006BE3A Two blocks back to back: 32 words, crc 9BCFAB33, 19191919 19191919 Two blocks with two FE00h between: 32 words, crc 9BCFAB33, 19191919 19191919 A block, then an RLE halfword where a DC is due: 32 words, crc C7819458, 1C4E757F 808AB1E4 Done. ``` 08MCB.txt: ``` ===== 08 MCB M2 COMMAND BITS | BIOS 19951204 System ROM Version 3.0 11/18/96 A BadVaddr as the group starts: 1F801DAA Mono 8 bit signed, DC 100 and AC 50 at zigzag 1, with one of the command's bits 16-24 ("Not used (should be zero)", commands.txt:8) or bit 25 (bit 15, for 15 bit only, :7) set: the status just after the command, words out, CRC and word 0. No bit 0: status A3040001, 16 words, crc B8470132, 34677F7F, status after 8304FFFF Bit 16: status A3040001, 16 words, crc B8470132, 34677F7F, status after 8304FFFF Bit 17: status A3040001, 16 words, crc B8470132, 34677F7F, status after 8304FFFF Bit 18: status A3040001, 16 words, crc B8470132, 34677F7F, status after 8304FFFF Bit 19: status A3040001, 16 words, crc B8470132, 34677F7F, status after 8304FFFF Bit 20: status A3040001, 16 words, crc B8470132, 34677F7F, status after 8304FFFF Bit 21: status A3040001, 16 words, crc B8470132, 34677F7F, status after 8304FFFF Bit 22: status A3040001, 16 words, crc B8470132, 34677F7F, status after 8304FFFF Bit 23: status A3040001, 16 words, crc B8470132, 34677F7F, status after 8304FFFF Bit 24: status A3040001, 16 words, crc B8470132, 34677F7F, status after 8304FFFF Bit 25: status A3840001, 16 words, crc B8470132, 34677F7F, status after 8384FFFF MDEC(2) with the unused bits 1-24 set (0x41FFFFFE, luminance only, commands.txt:16-18), then 16 words, then the status: after the command A004000F, after 16 words 8004FFFF Done. ``` 09MST.txt: ``` ===== 09 MST M2 STATUS TRACE | BIOS 19951204 System ROM Version 3.0 11/18/96 A BadVaddr as the group starts: 1F801DAA The status register (i-o-ports.txt:20-39) from before the command, after the command, after each input word, for 3000 cycles with nothing read, then after each output word read; only the changes, the first 48. DC-only blocks. Colour 15 bit, one macroblock: 104 words read; status changes (cycles:status): 27:60041CFC 10752:20041CFC 19441:A0041CFC Colour 24 bit, one macroblock: 104 words read; status changes (cycles:status): 27:60041CFC 10753:20041CFC 19435:A0041CFC Mono 8 bit, two blocks: 32 words read; status changes (cycles:status): 27:60041CFC Mono 4 bit, two blocks: 16 words read; status changes (cycles:status): 27:60041CFC Status after reset 80040000; after MDEC(2) with no words A004001F; after 32 words 8004FFFF Done. ``` 10MTM.txt: ``` ===== 10 MTM M2 DECODE TIMES | BIOS 19951204 System ROM Version 3.0 11/18/96 A BadVaddr as the group starts: 1F801DAA Decodes by DMA0 (blocks of 32) and DMA1 (blocks of 32, or the whole output when smaller), DMA1 armed first. Cycles (timer / 8, times 8) from the DMA0 start to DMA0 done and to DMA1 done. DC-only blocks unless dense (63 AC of +-3, run 0). 15 bit, 1 macroblocks: 32 words in, 128 out: DMA0 done 2912, DMA1 done 5152, status E0041CDC 15 bit, 2 macroblocks: 32 words in, 256 out: DMA0 done 2912, DMA1 done 10000088 (timed out), status 30041CDC 15 bit, 4 macroblocks: 32 words in, 512 out: DMA0 done 2912, DMA1 done 10000104 (timed out), status 30041CDC 15 bit, 8 macroblocks: 64 words in, 1024 out: DMA0 done 19104, DMA1 done 10000088 (timed out), status 30041CBC 15 bit, 16 macroblocks: 96 words in, 2048 out: DMA0 done 35504, DMA1 done 10000072 (timed out), status 30041C9C 24 bit, 1 macroblocks: 32 words in, 192 out: DMA0 done 2920, DMA1 done 10000088 (timed out), status 30041CDC 24 bit, 2 macroblocks: 32 words in, 384 out: DMA0 done 2912, DMA1 done 10000104 (timed out), status 30041CDC 24 bit, 4 macroblocks: 32 words in, 768 out: DMA0 done 2920, DMA1 done 10000104 (timed out), status 30041CDC 24 bit, 8 macroblocks: 64 words in, 1536 out: DMA0 done 19096, DMA1 done 10000072 (timed out), status 30041CBC 24 bit, 16 macroblocks: 96 words in, 3072 out: DMA0 done 35408, DMA1 done 10000088 (timed out), status 30041C9C 8 bit, 1 blocks: 32 words in, 16 out: DMA0 done 4294967295, DMA1 done 168, status 68041CFC 8 bit, 4 blocks: 32 words in, 64 out: DMA0 done 4294967295, DMA1 done 1056, status E0041CFC 8 bit, 16 blocks: 32 words in, 256 out: DMA0 done 2928, DMA1 done 10000080 (timed out), status 30041CDC 8 bit, 64 blocks: 64 words in, 1024 out: DMA0 done 19064, DMA1 done 10000104 (timed out), status 30041CBC 4 bit, 1 blocks: 32 words in, 8 out: DMA0 done 4294967295, DMA1 done 200, status 68041CFC 4 bit, 4 blocks: 32 words in, 32 out: DMA0 done 4294967295, DMA1 done 192, status 60041CFC 4 bit, 16 blocks: 32 words in, 128 out: DMA0 done 2944, DMA1 done 5168, status E0041CDC 4 bit, 64 blocks: 64 words in, 512 out: DMA0 done 19032, DMA1 done 29712, status E0041CBC 15 bit, 4 macroblocks, dense: 800 words in, 512 out: DMA0 done 15376, DMA1 done 10000072 (timed out), status 300419DC 24 bit, 4 macroblocks, dense: 800 words in, 768 out: DMA0 done 15432, DMA1 done 10000112 (timed out), status 300419DC 8 bit, 16 blocks, dense: 544 words in, 256 out: DMA0 done 11328, DMA1 done 10000088 (timed out), status 30041ADC By CPU, three times each: 15 bit macroblock: first output word ready 120 cycles after the last input word (52 to read the timer) 24 bit macroblock: first output word ready 82 cycles after the last input word (22 to read the timer) 8 bit block: first output word ready 82 cycles after the last input word (22 to read the timer) 4 bit block: first output word ready 86 cycles after the last input word (22 to read the timer) 15 bit macroblock: first output word ready 82 cycles after the last input word (22 to read the timer) 24 bit macroblock: first output word ready 82 cycles after the last input word (22 to read the timer) 8 bit block: first output word ready 82 cycles after the last input word (22 to read the timer) 4 bit block: first output word ready 82 cycles after the last input word (27 to read the timer) 15 bit macroblock: first output word ready 82 cycles after the last input word (22 to read the timer) 24 bit macroblock: first output word ready 82 cycles after the last input word (22 to read the timer) 8 bit block: first output word ready 84 cycles after the last input word (22 to read the timer) 4 bit block: first output word ready 82 cycles after the last input word (22 to read the timer) Done. ``` 11MDB.txt: ``` ===== 11 MDB M2 DMA BLOCKS | BIOS 19951204 System ROM Version 3.0 11/18/96 A BadVaddr as the group starts: 1F801DAA 8 colour macroblocks of DC-only blocks at 15 bit (64 words in, 1024 out), by DMA, with the block sizes shown (dma/channels.txt:39-42, "for MDEC max 20h"). Cycles as in MTM; the CRC of the output should not change. DMA0 blocks of 32, DMA1 blocks of 1: DMA0 done 19088, DMA1 done 10000104 (timed out), crc 8C5ED4DC, status 30041CBC DMA0 blocks of 32, DMA1 blocks of 2: DMA0 done 19096, DMA1 done 10000096 (timed out), crc C0257F5A, status 30041CBC DMA0 blocks of 32, DMA1 blocks of 4: DMA0 done 19048, DMA1 done 10000120 (timed out), crc C0257F5A, status 30041CBC DMA0 blocks of 32, DMA1 blocks of 8: DMA0 done 19024, DMA1 done 10000088 (timed out), crc C0257F5A, status 30041CBC DMA0 blocks of 32, DMA1 blocks of 16: DMA0 done 19112, DMA1 done 10000072 (timed out), crc C0257F5A, status 30041CBC DMA0 blocks of 32, DMA1 blocks of 32: DMA0 done 19056, DMA1 done 10000064 (timed out), crc DF9E6035, status 30041CBC DMA0 blocks of 1, DMA1 blocks of 32: DMA0 done 19520, DMA1 done 10000080 (timed out), crc DF9E6035, status 30041CBC DMA0 blocks of 2, DMA1 blocks of 32: DMA0 done 19176, DMA1 done 10000112 (timed out), crc DF9E6035, status 30041CBC DMA0 blocks of 4, DMA1 blocks of 32: DMA0 done 19184, DMA1 done 10000080 (timed out), crc DF9E6035, status 30041CBC DMA0 blocks of 8, DMA1 blocks of 32: DMA0 done 19080, DMA1 done 10000080 (timed out), crc DF9E6035, status 30041CBC DMA0 blocks of 16, DMA1 blocks of 32: DMA0 done 19088, DMA1 done 10000120 (timed out), crc DF9E6035, status 30041CBC DMA0 blocks of 32, DMA1 blocks of 32: DMA0 done 19064, DMA1 done 10000120 (timed out), crc DF9E6035, status 30041CBC DMA0 blocks of 32, DMA1 blocks of 32, DMA1 started 2000 later: DMA0 done 21272, DMA1 done 10000096 (timed out), crc DF9E6035, status 30041CBC DMA0 blocks of 32, DMA1 blocks of 32, DMA1 started 20000 later: DMA0 done 39248, DMA1 done 10000104 (timed out), crc DF9E6035, status 30041CBC DMA0 blocks of 32, DMA1 blocks of 32, DMA1 started 100000 later: DMA0 done 119240, DMA1 done 10000080 (timed out), crc DF9E6035, status 30041CBC DMA0 blocks of 1, DMA1 blocks of 1: DMA0 done 19632, DMA1 done 10000088 (timed out), crc 8C5ED4DC, status 30041CBC Done. ``` ## References [^run]: SCPH-5501 output: [mdec2/09MST.txt](/tests/raw/20260928T0000Z-5501a-card-h/mdec2/09MST.txt). [^h-mcb]: Run 20260928T0000Z-5501a-card-h: [mdec2/08MCB.txt](/tests/raw/20260928T0000Z-5501a-card-h/mdec2/08MCB.txt). [^h-mst]: Run 20260928T0000Z-5501a-card-h: [mdec2/09MST.txt](/tests/raw/20260928T0000Z-5501a-card-h/mdec2/09MST.txt). [^h-mrl]: Run 20260928T0000Z-5501a-card-h: [mdec2/07MRL.txt](/tests/raw/20260928T0000Z-5501a-card-h/mdec2/07MRL.txt). [^h-mcm]: Run 20260928T0000Z-5501a-card-h: [mdec2/01MCM.txt](/tests/raw/20260928T0000Z-5501a-card-h/mdec2/01MCM.txt). [^h-mmo]: Run 20260928T0000Z-5501a-card-h: [mdec2/03MMO.txt](/tests/raw/20260928T0000Z-5501a-card-h/mdec2/03MMO.txt). [^h-mqt]: Run 20260928T0000Z-5501a-card-h: [mdec2/04MQT.txt](/tests/raw/20260928T0000Z-5501a-card-h/mdec2/04MQT.txt). [^h-mtm]: Run 20260928T0000Z-5501a-card-h: [mdec2/10MTM.txt](/tests/raw/20260928T0000Z-5501a-card-h/mdec2/10MTM.txt). [^h-mdb]: Run 20260928T0000Z-5501a-card-h: [mdec2/11MDB.txt](/tests/raw/20260928T0000Z-5501a-card-h/mdec2/11MDB.txt).