GPUSTAT DMA Bits
Reads the DMA request and ready bits of GPUSTAT around a draw in each DMA direction.
| Machine | SCPH-5501 |
|---|---|
| Program | gpu/gpustat (ps1-tests) |
This is an old revision of this page, as edited by RemmyLee at 05:18, 23 October 2026. Edit this revision | Latest revision
Overview
The program draws by CPU writes to GP0 and by a DMA list. It also draws by DMA in sync mode 1 with GP1(04h) direction 1 (FIFO) and with direction 2 (CPU to GP0). Before, during and after each draw it checks bits 25 to 30 of GPUSTAT against its own expected values.1 The bits it checks are bit 25 (DMA request), bit 26 (ready to receive a command word), bit 27 (ready to send VRAM to the CPU), bit 28 (ready to receive a DMA block) and bits 29 and 30 (DMA direction).2
Results
In the runs from 27 September 2026 on, the SCPH-5501 passed all 13 checks.2
In the run of 25 September 2026 the check during a sync mode draw with direction 2 failed. GPUSTAT read bit 25 set (02000000h) and bit 28 set (10000000h), where the test expected both clear. The other 12 checks passed in that run.2
Runs
25 September 2026
===== 07 GST GPU GPUSTAT | BIOS 19951204 System ROM Version 3.0 11/18/96 A
gpu/gpustat
Bits in GPUSTAT description:
Bit 25 - DMA Request
- When DMA Direction == 0 (Off) - always 0
- When DMA Direction == 1 (FIFO) - ?
- When DMA Direction == 2 (CPUtoGP0) - same as Bit 28
- When DMA Direction == 3 (GPUREADtoCPU) - same as Bit 27
Bit 26 - Ready to receive Cmd Word
Bit 27 - Ready to send VRAM to CPU
Bit 28 - Ready to receive DMA Block
Bits 29-30 - DMA Direction (0 - Off, 1 - FIFO, 2 - CPUtoGP0, 3 - GPUREADtoCPU)
pass - testGpustat_CPU_beforeRender
pass - testGpustat_CPU_duringRender
pass - testGpustat_CPU_afterRender
pass - testGpustat_linkedListDMA_beforeRender
pass - testGpustat_LinkedListDMA_duringRender
pass - testGpustat_LinkedListDMA_afterRender
pass - testGpustat_SyncModeDMA_dir1_beforeRender
pass - testGpustat_SyncModeDMA_dir1_duringRender
pass - testGpustat_SyncModeDMA_dir1_afterRender
pass - testGpustat_SyncModeDMA_dir2_beforeRender
fail - testGpustat_SyncModeDMA_dir2_duringRender:254 `(stat) & (1 << 25) == 0 << 25`, given: 0x2000000, expected: 0x0
fail - testGpustat_SyncModeDMA_dir2_duringRender:257 `(stat) & (1 << 28) == 0 << 28`, given: 0x10000000, expected: 0x0
pass - testGpustat_SyncModeDMA_dir2_afterRender
Done.
27 September 2026
===== 07 GST GPU GPUSTAT | BIOS 19951204 System ROM Version 3.0 11/18/96 A
gpu/gpustat
Bits in GPUSTAT description:
Bit 25 - DMA Request
- When DMA Direction == 0 (Off) - always 0
- When DMA Direction == 1 (FIFO) - ?
- When DMA Direction == 2 (CPUtoGP0) - same as Bit 28
- When DMA Direction == 3 (GPUREADtoCPU) - same as Bit 27
Bit 26 - Ready to receive Cmd Word
Bit 27 - Ready to send VRAM to CPU
Bit 28 - Ready to receive DMA Block
Bits 29-30 - DMA Direction (0 - Off, 1 - FIFO, 2 - CPUtoGP0, 3 - GPUREADtoCPU)
pass - testGpustat_CPU_beforeRender
pass - testGpustat_CPU_duringRender
pass - testGpustat_CPU_afterRender
pass - testGpustat_linkedListDMA_beforeRender
pass - testGpustat_LinkedListDMA_duringRender
pass - testGpustat_LinkedListDMA_afterRender
pass - testGpustat_SyncModeDMA_dir1_beforeRender
pass - testGpustat_SyncModeDMA_dir1_duringRender
pass - testGpustat_SyncModeDMA_dir1_afterRender
pass - testGpustat_SyncModeDMA_dir2_beforeRender
pass - testGpustat_SyncModeDMA_dir2_duringRender
pass - testGpustat_SyncModeDMA_dir2_afterRender
Done.
27 September 2026 run 2
===== 07 GST GPU GPUSTAT | BIOS 19951204 System ROM Version 3.0 11/18/96 A
gpu/gpustat
Bits in GPUSTAT description:
Bit 25 - DMA Request
- When DMA Direction == 0 (Off) - always 0
- When DMA Direction == 1 (FIFO) - ?
- When DMA Direction == 2 (CPUtoGP0) - same as Bit 28
- When DMA Direction == 3 (GPUREADtoCPU) - same as Bit 27
Bit 26 - Ready to receive Cmd Word
Bit 27 - Ready to send VRAM to CPU
Bit 28 - Ready to receive DMA Block
Bits 29-30 - DMA Direction (0 - Off, 1 - FIFO, 2 - CPUtoGP0, 3 - GPUREADtoCPU)
pass - testGpustat_CPU_beforeRender
pass - testGpustat_CPU_duringRender
pass - testGpustat_CPU_afterRender
pass - testGpustat_linkedListDMA_beforeRender
pass - testGpustat_LinkedListDMA_duringRender
pass - testGpustat_LinkedListDMA_afterRender
pass - testGpustat_SyncModeDMA_dir1_beforeRender
pass - testGpustat_SyncModeDMA_dir1_duringRender
pass - testGpustat_SyncModeDMA_dir1_afterRender
pass - testGpustat_SyncModeDMA_dir2_beforeRender
pass - testGpustat_SyncModeDMA_dir2_duringRender
pass - testGpustat_SyncModeDMA_dir2_afterRender
Done.
27 September 2026 run 3
===== 07 GST GPU GPUSTAT | BIOS 19951204 System ROM Version 3.0 11/18/96 A
gpu/gpustat
Bits in GPUSTAT description:
Bit 25 - DMA Request
- When DMA Direction == 0 (Off) - always 0
- When DMA Direction == 1 (FIFO) - ?
- When DMA Direction == 2 (CPUtoGP0) - same as Bit 28
- When DMA Direction == 3 (GPUREADtoCPU) - same as Bit 27
Bit 26 - Ready to receive Cmd Word
Bit 27 - Ready to send VRAM to CPU
Bit 28 - Ready to receive DMA Block
Bits 29-30 - DMA Direction (0 - Off, 1 - FIFO, 2 - CPUtoGP0, 3 - GPUREADtoCPU)
pass - testGpustat_CPU_beforeRender
pass - testGpustat_CPU_duringRender
pass - testGpustat_CPU_afterRender
pass - testGpustat_linkedListDMA_beforeRender
pass - testGpustat_LinkedListDMA_duringRender
pass - testGpustat_LinkedListDMA_afterRender
pass - testGpustat_SyncModeDMA_dir1_beforeRender
pass - testGpustat_SyncModeDMA_dir1_duringRender
pass - testGpustat_SyncModeDMA_dir1_afterRender
pass - testGpustat_SyncModeDMA_dir2_beforeRender
pass - testGpustat_SyncModeDMA_dir2_duringRender
pass - testGpustat_SyncModeDMA_dir2_afterRender
Done.
27 September 2026 run 4
===== 07 GST GPU GPUSTAT | BIOS 19951204 System ROM Version 3.0 11/18/96 A
gpu/gpustat
Bits in GPUSTAT description:
Bit 25 - DMA Request
- When DMA Direction == 0 (Off) - always 0
- When DMA Direction == 1 (FIFO) - ?
- When DMA Direction == 2 (CPUtoGP0) - same as Bit 28
- When DMA Direction == 3 (GPUREADtoCPU) - same as Bit 27
Bit 26 - Ready to receive Cmd Word
Bit 27 - Ready to send VRAM to CPU
Bit 28 - Ready to receive DMA Block
Bits 29-30 - DMA Direction (0 - Off, 1 - FIFO, 2 - CPUtoGP0, 3 - GPUREADtoCPU)
pass - testGpustat_CPU_beforeRender
pass - testGpustat_CPU_duringRender
pass - testGpustat_CPU_afterRender
pass - testGpustat_linkedListDMA_beforeRender
pass - testGpustat_LinkedListDMA_duringRender
pass - testGpustat_LinkedListDMA_afterRender
pass - testGpustat_SyncModeDMA_dir1_beforeRender
pass - testGpustat_SyncModeDMA_dir1_duringRender
pass - testGpustat_SyncModeDMA_dir1_afterRender
pass - testGpustat_SyncModeDMA_dir2_beforeRender
pass - testGpustat_SyncModeDMA_dir2_duringRender
pass - testGpustat_SyncModeDMA_dir2_afterRender
Done.
28 September 2026
===== 07 GST GPU GPUSTAT | BIOS 19951204 System ROM Version 3.0 11/18/96 A
gpu/gpustat
Bits in GPUSTAT description:
Bit 25 - DMA Request
- When DMA Direction == 0 (Off) - always 0
- When DMA Direction == 1 (FIFO) - ?
- When DMA Direction == 2 (CPUtoGP0) - same as Bit 28
- When DMA Direction == 3 (GPUREADtoCPU) - same as Bit 27
Bit 26 - Ready to receive Cmd Word
Bit 27 - Ready to send VRAM to CPU
Bit 28 - Ready to receive DMA Block
Bits 29-30 - DMA Direction (0 - Off, 1 - FIFO, 2 - CPUtoGP0, 3 - GPUREADtoCPU)
pass - testGpustat_CPU_beforeRender
pass - testGpustat_CPU_duringRender
pass - testGpustat_CPU_afterRender
pass - testGpustat_linkedListDMA_beforeRender
pass - testGpustat_LinkedListDMA_duringRender
pass - testGpustat_LinkedListDMA_afterRender
pass - testGpustat_SyncModeDMA_dir1_beforeRender
pass - testGpustat_SyncModeDMA_dir1_duringRender
pass - testGpustat_SyncModeDMA_dir1_afterRender
pass - testGpustat_SyncModeDMA_dir2_beforeRender
pass - testGpustat_SyncModeDMA_dir2_duringRender
pass - testGpustat_SyncModeDMA_dir2_afterRender
Done.
References
-
^ ps1-tests, gpu/gpustat. https://github.com/JaCzekanski/ps1-tests.
-
^ a b c SCPH-5501 output: main/07GST.txt and the files beside it, with the other runs listed under Runs.