SPU Envelope Grid and GPU Fill Timing

Measures the SPU registers as a program finds them, GPU fill times by shape, Gouraud shading steps, the shared SPU envelope step grid, 32-bit SPU stores, MDEC output left unread and the SPU DMA read with a zero delay field.

This is an old revision of this page, as edited by RemmyLee at 05:49, 23 October 2026. Edit this revision | Latest revision

Overview

The program runs seven groups. Four of them use the SPU, two use the GPU and one uses the MDEC.¹ The SPU group S32 measures the same loss as the page SPU 32-bit Stores, which cites this output.

See also:

• SPU Registers and Envelope

Results

SPU Registers as Found

Voice 16's pitch read 0BFCh, EON read FFFFh and 003Fh, SPUCNT C085h and SPUSTAT 0005h. Voices 22 and 23 had pitch 3FFFh and ADSR 0000h 0000h, and the other voices had start address 0C28h or 0200h. Sixty vertical blanks later one halfword read differently: SPUSTAT at 1DAEh had gone from 0005h to 0805h.²

Fill Time by Shape

A fill 1024 pixels wide took 671 to 716 counts for 8 rows and 35,843 to 35,902 counts for 511 rows. From 64 rows up each row cost 70 to 72 counts (18,018 / 256 = 70.4). The same number of pixels took longer in a narrow shape than in a wide one. Place and colour made no difference: a 256 x 256 fill took 5,522 to 5,619 counts at six places and with colours 000000h and FFFFFFh. Two 256 x 256 fills sent back to back took 11,008 to 11,010 counts, which is the sum of the two.³

Gouraud Steps

With dithering off, red shaded from 0 to 31 over 255 pixels changed every 8 pixels, and over 200 pixels every 6 or 7 pixels. The steps fell at the same x whichever vertex was sent first.⁴

Envelope Step Grid

Voice 0's linear attack changed level about every 24,576 cycles, which is 32 samples of 768 cycles. When voice 1 was keyed on 0 to 18,432 cycles after one of voice 0's changes, it changed level on the same cycles as voice 0. Keyed on 23,808 to 24,960 cycles after it, voice 1's first change came on voice 0's next change but one, and its later changes again on the same cycles as voice 0's.⁵

After SPUCNT was set to 0000h for 3,000 or 100,000 cycles and back to 8000h, voice 0 was keyed on again. Its new changes fell within 37 cycles of the grid of its changes before the SPU was turned off, whether the key on came at once or 6,144 or 12,288 cycles after the enable.⁵

32-bit Stores to the SPU

Of 256 stores to each register, 39 to 43 lost their low half and none lost the high half. Every store whose timer 2 read just before it was 1 mod 8 lost its low half, and no store at another residue lost either half.⁶

MDEC Output Left Unread

With an 8-bit decode's input all in and its output unread, the status read 2204FFFFh. In four cases the 16 words read out afterwards had CRC 728FE2EDh, and the status was 8204FFFFh after the 16th word. Markers A001h to A004h written while the output was unread left the status at 2204FFFFh. Written after the read, A005h to A008h showed in the status as 8004A005h to 8004A008h. A second decode command and its 32 words written while the output was unread gave no further output in the next 5,000 cycles.⁷

DMA Read With a Zero Delay Field

With 1F801014h at 200931E1h, the 128-byte read put FFFFh at halfwords 0 and 32 in every run, and D01Fh and D03Fh were missing from the buffer every time. Some runs had one or two further FFFFh halfwords. The start delay after the sample tick and the voice pitch made no consistent difference. With 220931E1h the read had no FFFFh and nothing missing.⁸

Runs

5 October 2026

followup33/00RUN.txt

===== 00 RUN | BIOS 19951204 System ROM Version 3.0 11/18/96 A
7 tests
A chain program, linked at 80100000
Saved on the card in slot 2, from image 1
COP0 at start: BPC 00000000 BDA 00000000 TAR BFC02BAC DCIC 00000000 BadVaddr 00000480 BDAM 00000000
BPCM 00000000 SR 00000000 Cause 00000020 EPC 80016C84 PRId 00000002

followup33/01SBS.txt

===== 01 SBS F33 SPU AS FOUND | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
SPU registers 1C00h-1E7Fh as this program found them, before any group wrote one
(1DA8h, the Fifo, not read). Voice N: volume L R, pitch, start, ADSR, level, repeat,
current volume L R (1E00h+N*4).
Voice 16 pitch (1D04h) 0BFC; EON (1D98h, 1D9Ah) FFFF 003F; SPUCNT C085 SPUSTAT 0005
v 0: 0000 0000 pitch 0400 start 0C28 ADSR 8088 DFF1 level 0000 repeat 14C4, now 0000 0000
v 1: 0000 0000 pitch 0407 start 0C28 ADSR 8087 DFF1 level 0000 repeat 14C4, now 0000 0000
v 2: 0000 0000 pitch 0800 start 0C28 ADSR 8088 DFF1 level 0000 repeat 14C4, now 0000 0000
v 3: 0000 0000 pitch 080E start 0C28 ADSR 8087 DFF1 level 0000 repeat 14C4, now 0000 0000
v 4: 0000 0000 pitch 08FA start 0200 ADSR 8C7A DFED level 0000 repeat 034C, now 0000 0000
v 5: 0000 0000 pitch 090B start 0200 ADSR 8C7A DFED level 0000 repeat 034C, now 0000 0000
v 6: 0000 0000 pitch 02AB start 0C28 ADSR 8088 DFF1 level 0000 repeat 14C4, now 0000 0000
v 7: 0000 0000 pitch 02B0 start 0C28 ADSR 8087 DFF1 level 0000 repeat 14C4, now 0000 0000
v 8: 0000 0000 pitch 0A14 start 0200 ADSR 8C7A DFED level 0000 repeat 034C, now 0000 0000
v 9: 0000 0000 pitch 0A27 start 0200 ADSR 8C7A DFED level 0000 repeat 034C, now 0000 0000
v10: 0000 0000 pitch 0BFC start 0200 ADSR 8C7A DFED level 0000 repeat 034C, now 0000 0000
v11: 0000 0000 pitch 0C12 start 0200 ADSR 8C7A DFED level 0000 repeat 034C, now 0000 0000
v12: 0000 0000 pitch 08FA start 0200 ADSR 8C7A DFED level 0000 repeat 034C, now 0000 0000
v13: 0000 0000 pitch 090B start 0200 ADSR 8C7A DFED level 0000 repeat 034C, now 0000 0000
v14: 0000 0000 pitch 0A14 start 0200 ADSR 8C7A DFED level 0000 repeat 034C, now 0000 0000
v15: 0000 0000 pitch 0A27 start 0200 ADSR 8C7A DFED level 0000 repeat 034C, now 0000 0000
v16: 0000 0000 pitch 0BFC start 0200 ADSR 8C7A DFED level 0000 repeat 034C, now 0000 0000
v17: 0000 0000 pitch 0C12 start 0200 ADSR 8C7A DFED level 0000 repeat 034C, now 0000 0000
v18: 0000 0000 pitch 0556 start 0C28 ADSR 8088 DFF1 level 0000 repeat 14C4, now 0000 0000
v19: 0000 0000 pitch 0560 start 0C28 ADSR 8087 DFF1 level 0000 repeat 14C4, now 0000 0000
v20: 0000 0000 pitch 0A14 start 0200 ADSR 8C7A DFED level 0000 repeat 034C, now 0000 0000
v21: 0000 0000 pitch 0A27 start 0200 ADSR 8C7A DFED level 0000 repeat 034C, now 0000 0000
v22: 0000 0000 pitch 3FFF start 0200 ADSR 0000 0000 level 0000 repeat 0200, now 0000 0000
v23: 0000 0000 pitch 3FFF start 0200 ADSR 0000 0000 level 0000 repeat 0200, now 0000 0000
Control 1D80h-1DBEh:
 1D80: 0000 0000 0000 0000 0000 0000 FFFF FFFF
 1D90: 0000 0000 0000 0000 FFFF 003F FFFF 00FF
 1DA0: AC00 E128 FFFE 0200 ---- C085 0004 0005
 1DB0: 7FFF 7FFF 0000 0000 0000 0000 DFFF F7FF
Reverb 1DC0h-1DFEh:
 1DC0: 033D 0231 7E00 5000 B400 B000 4C00 B000
 1DD0: 6000 5400 1ED6 1A31 1D14 183B 1BC2 16B2
 1DE0: 1A32 15EF 15EE 1055 1334 0F2D 11F6 0C5D
 1DF0: 1056 0AE1 0AE0 07A2 0464 0232 8000 8000
1E60h-1E7Eh:
 1E60: F5FF F3EF BFFF 29DF 74BB FFFE BFF7 FFFF
 1E70: FFFF FD7D 6EFF 33B3 FC7F FFFF BFFF 7D8F
60 vblanks later, 1 halfwords read differently: 1DAE:0005>0805
Done.

followup33/02FLX.txt

===== 02 FLX F33 FILL SHAPES | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
Fills timed as followup17 FIL (first GP0 word to GPUSTAT bit 26, display collapsed, 3
samples, then bit 28's first time); 1024 wide is 3F1h (gpu.txt:663-664).
Width fill 16x256 at 0,256 colour 102030: 1706 1639 1701, bit 28 at 150
Width fill 32x256 at 0,256 colour 102030: 1953 1890 1941, bit 28 at 150
Width fill 64x256 at 0,256 colour 102030: 2449 2428 2428, bit 28 at 154
Width fill 128x256 at 0,256 colour 102030: 3527 3520 3460, bit 28 at 150
Width fill 256x256 at 0,256 colour 102030: 5532 5524 5578, bit 28 at 150
Width fill 384x256 at 0,256 colour 102030: 7653 7648 7646, bit 28 at 154
Width fill 512x256 at 0,256 colour 102030: 9713 9706 9702, bit 28 at 151
Width fill 768x256 at 0,256 colour 102030: 13895 13828 13832, bit 28 at 150
Width fill 1024x256 at 0,256 colour 102030: 18018 18009 18260, bit 28 at 150
Height fill 1024x8 at 0,0 colour 102030: 716 671 671, bit 28 at 150
Height fill 1024x16 at 0,0 colour 102030: 1282 1211 1220, bit 28 at 150
Height fill 1024x32 at 0,0 colour 102030: 2384 2371 2368, bit 28 at 155
Height fill 1024x64 at 0,0 colour 102030: 4619 4609 4617, bit 28 at 154
Height fill 1024x128 at 0,0 colour 102030: 9113 9035 9035, bit 28 at 150
Height fill 1024x256 at 0,0 colour 102030: 18020 18010 18018, bit 28 at 150
Height fill 1024x384 at 0,0 colour 102030: 26937 26917 26988, bit 28 at 150
Height fill 1024x511 at 0,0 colour 102030: 35848 35843 35902, bit 28 at 150
2048 chunks fill 1024x32 at 0,256 colour 102030: 2405 2370 2371, bit 28 at 150
2048 chunks fill 512x64 at 0,256 colour 102030: 2498 2490 2490, bit 28 at 150
2048 chunks fill 256x128 at 0,256 colour 102030: 2862 2855 2858, bit 28 at 150
2048 chunks fill 128x256 at 0,256 colour 102030: 3531 3519 3454, bit 28 at 150
2044 chunks fill 64x511 at 0,0 colour 102030: 4805 4795 4788, bit 28 at 150
511 chunks fill 16x511 at 0,0 colour 102030: 3232 3214 3215, bit 28 at 150
Place fill 256x256 at 16,256 colour 102030: 5534 5578 5578, bit 28 at 150
Place fill 256x256 at 256,256 colour 102030: 5584 5587 5527, bit 28 at 150
Place fill 256x256 at 768,256 colour 102030: 5542 5582 5584, bit 28 at 150
Place fill 256x256 at 0,0 colour 102030: 5534 5588 5578, bit 28 at 150
Place fill 256x256 at 0,128 colour 102030: 5584 5587 5619, bit 28 at 184
Place fill 256x256 at 0,255 colour 102030: 5591 5582 5524, bit 28 at 150
Colour fill 256x256 at 0,256 colour 000000: 5604 5597 5525, bit 28 at 155
Colour fill 256x256 at 0,256 colour FFFFFF: 5534 5528 5522, bit 28 at 150
Two fills 256x256 at 0,256 and 256,256 back to back, 6 words: 11010 11009 11008, bit 28 at 5544
Done.

followup33/03GEP.txt

===== 03 GEP F33 GOURAUD PIXELS | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
Gouraud triangles, dithering off (E1h 0): followup17 GED's four with every drawn pixel
printed, then red alone along x, each vertex first in turn, red's 5-bit steps.
d0 r 4 a 12, vertices 130,384 131,377 124,380; every drawn pixel by row:
 y 378 x 129: 02C9 0B24
 y 379 x 127: 0592 0DED 1648 1E83
 y 380 x 124: 001F 085B 10B6 1911 216C 29A7 3202
 y 381 x 126: 2435 2C90 34CB 3D26 4582
 y 382 x 127: 3C10 484B 50A6 5901
 y 383 x 129: 6425 6C80
d0 r 13 a 0, vertices 141,380 122,391 122,369; every drawn pixel by row:
 y 370 x 122: 003E 041D
 y 371 x 122: 005D 045C 0C3B 141A
 y 372 x 122: 009B 047A 0C59 1439 1838 2017
 y 373 x 122: 00BA 04B9 0C98 1477 1856 2035 2815
 y 374 x 122: 00F8 04D7 0CB7 1496 1875 2074 2853 2C32 3411
 y 375 x 122: 0117 04F6 0CF5 14D4 18B3 2093 2872 2C51 3450 3C2F 400E
 y 376 x 122: 0155 0534 0D14 14F3 18D2 20D1 28B0 2C8F 346F 3C4E 402D 480C 500B
 y 377 x 122: 0174 0553 0D32 1531 1910 20F0 28CF 2CAE 348D 3C8C 406B 484B 502A 5409
 y 378 x 122: 01B2 0592 0D71 1550 192F 210E 290D 2CED 34CC 3CAB 408A 4869 5068 5447 5C27 6406
 y 379 x 122: 01D1 05B0 0D8F 158E 196E 214D 292C 2D0B 34EA 3CE9 40C9 48A8 5087 5466 5C45 6424 6824 7003
 y 380 x 122: 01F0 05EF 0DCE 15AD 198C 216B 294A 2D4A 3529 3D08 40E7 48C6 50A5 54A5 5C84 6463 6842 7021 7800
 y 381 x 122: 022E 060D 0DEC 15CC 19CB 21AA 2989 2D68 3547 3D27 4126 4905 50E4 54C3 5CA2 6481 6881 7060
 y 382 x 122: 024D 064C 0E2B 160A 19E9 21C8 29A8 2DA7 3586 3D65 4144 4923 5103 54E2 5CE1 64C0
 y 383 x 122: 028B 066A 0E49 1629 1A08 2207 29E6 2DC5 35A4 3D84 4163 4962 5141 5520
 y 384 x 122: 02AA 0689 0E88 1667 1A46 2226 2A05 2DE4 35E3 3DC2 41A1 4980 5160
 y 385 x 122: 02E8 06C7 0EA7 1686 1A65 2264 2A43 2E22 3602 3DE1 41C0
 y 386 x 122: 0307 06E6 0EE5 16C4 1AA3 2283 2A62 2E41 3620
 y 387 x 122: 0345 0725 0F04 16E3 1AC2 22A1 2AA0
 y 388 x 122: 0364 0743 0F22 1721 1B01 22E0
 y 389 x 122: 03A2 0782 0F61 1740
 y 390 x 122: 03C1 07A0
d0 r 13 a 8, vertices 137,389 116,384 132,368; every drawn pixel by row:
 y 369 x 131: 005D 041E
 y 370 x 130: 009B 045C 081C
 y 371 x 129: 00D9 049A 085A 0C3B
 y 372 x 128: 0117 04D8 0898 0C79 1039
 y 373 x 127: 0155 0516 08D6 0CB7 1077 1837 1C18
 y 374 x 126: 0193 0554 0914 0CF5 10B5 1875 1C56 2016
 y 375 x 125: 01D1 0592 0952 0D33 10F3 18B3 1C94 2054 2435
 y 376 x 124: 020F 05D0 0990 0D71 1131 18F1 1CD2 2092 2473 2C33
 y 377 x 123: 022E 060E 09CE 0DAF 116F 192F 1D10 20D0 24B1 2C71 3031 3412
 y 378 x 122: 026C 064C 0A0C 0DED 11AD 196D 1D4E 210E 24EF 2CAF 306F 3450 3810
 y 379 x 121: 02AA 068A 0A4A 0E2B 11EB 19AB 1D8C 214C 252D 2CED 30AD 348E 384E 3C2F
 y 380 x 120: 02E8 06C8 0A88 0E69 1229 19E9 1DCA 218A 256B 2D2B 30EB 34CC 388C 3C6D 442D
 y 381 x 119: 0326 0706 0AC6 0EA7 1267 1A27 1E08 21C8 25A9 2D69 3129 350A 38CA 3CAB 446B 482B 4C0C
 y 382 x 118: 0364 0744 0B04 0EE5 12A5 1A65 1E46 2206 25E7 2DA7 3167 3548 3908 3CE9 44A9 4869 4C4A 500A
 y 383 x 117: 03A2 0782 0B42 0F23 12E3 1AA3 1E84 2244 2625 2DE5 31A5 3586 3946 3D27 44E7 48A7 4C88 5048 5808
 y 384 x 116: 03E0 07C0 0B80 0F61 1321 1AE1 1EC2 2282 2663 2E23 31E3 35C4 3984 3D65 4525 48E5 4CC6 5086 5846 5C27
 y 385 x 121: 1F00 22C0 26A1 2E61 3221 3602 39C2 3DA3 4563 4923 4D04 50C4 5884 5C65 6025 6406
 y 386 x 125: 3640 3A00 3DE1 45A1 4961 4D42 5102 58C2 5CA3 6063 6444 6C04
 y 387 x 129: 4D80 5140 5900 5CE1 60A1 6482 6C42 7002
 y 388 x 133: 64C0 6C80 7040 7421
d0 r 34 a 0, vertices 162,380 112,410 112,350; every drawn pixel by row:
 y 351 x 112: 001F 001F
 y 352 x 112: 003E 001E 041E 041D
 y 353 x 112: 003E 003E 043D 041D 081D
 y 354 x 112: 005D 003D 043D 043C 081C 0C1C 0C1B
 y 355 x 112: 005D 005C 045C 043C 083C 0C3B 0C1B 101B 141A
 y 356 x 112: 007C 005C 045C 045B 083B 0C3B 0C3A 103A 141A 1419
 y 357 x 112: 007C 007B 047B 045B 085A 0C5A 0C3A 1039 1439 1419 1819 1C18
 y 358 x 112: 009B 007B 047B 047A 087A 0C5A 0C59 1059 1439 1438 1838 1C18 1C17 2017
 y 359 x 112: 009B 009A 049A 047A 0879 0C79 0C59 1058 1458 1438 1837 1C37 1C37 2017 2016
 y 360 x 112: 00BA 00BA 0499 0499 0899 0C79 0C78 1078 1458 1457 1857 1C37 1C36 2036 2016 2415 2815
 y 361 x 112: 00BA 00B9 04B9 0499 0898 0C98 0C78 1077 1477 1477 1856 1C56 1C56 2035 2035 2435 2814 2814 2C14
 y 362 x 112: 00D9 00D9 04B8 04B8 08B8 0C97 0C97 1097 1477 1476 1876 1C56 1C55 2055 2035 2434 2834 2834 2C13 3013
 y 363 x 112: 00D9 00D8 04D8 04D8 08B7 0CB7 0CB7 1096 1496 1496 1875 1C75 1C75 2054 2054 2454 2833 2833 2C33 3012 3012 3412
 y 364 x 112: 00F8 00F8 04D7 04D7 08D7 0CB6 0CB6 10B6 1495 1495 1895 1C74 1C74 2074 2074 2453 2853 2853 2C32 3032 3032 3411 3811 3811
 y 365 x 112: 0117 00F7 04F7 04F7 08D6 0CD6 0CD6 10B5 14B5 14B5 1894 1C94 1C94 2073 2073 2473 2852 2852 2C52 3031 3031 3431 3830 3810 3C10
 y 366 x 112: 0117 0117 04F6 04F6 08F6 0CD5 0CD5 10D5 14D4 14B4 18B4 1CB3 1C93 2093 2092 2472 2872 2872 2C51 3051 3051 3430 3830 3830 3C0F 3C0F 400F
 y 367 x 112: 0136 0116 0516 0515 08F5 0CF5 0CF4 10D4 14D4 14D4 18B3 1CB3 1CB3 2092 2092 2492 2871 2871 2C71 3070 3050 3450 384F 382F 3C2F 3C2E 400E 440E 440D
 y 368 x 112: 0136 0136 0515 0515 0915 0D14 0CF4 10F4 14F3 14D3 18D3 1CD2 1CB2 20B2 20B1 2491 2891 2890 2C70 3070 3070 344F 384F 384F 3C2E 3C2E 402E 442D 440D 480D
 y 369 x 112: 0155 0135 0535 0534 0914 0D14 0D13 10F3 14F3 14F2 18D2 1CD2 1CD2 20D1 20B1 24B1 28B0 2890 2C90 308F 306F 346F 386E 384E 3C4E 3C4D 402D 442D 442C 480C 4C0C 4C0B
 y 370 x 112: 0155 0154 0554 0534 0934 0D33 0D13 1113 1512 14F2 18F2 1CF1 1CD1 20D1 20D0 24B0 28B0 28AF 2C8F 308F 308E 346E 386E 386D 3C6D 3C4D 404D 444C 442C 482C 4C2B 4C0B 500B 540A
 y 371 x 112: 0174 0154 0554 0553 0933 0D33 0D32 1112 1512 1511 1911 1CF1 1CF0 20F0 20D0 24D0 28CF 28AF 2CAF 30AE 308E 348E 388D 386D 3C6D 3C6C 404C 444C 444B 482B 4C2B 4C2A 502A 540A 5409
 y 372 x 112: 0174 0173 0573 0553 0952 0D52 0D32 1132 1531 1511 1911 1D10 1CF0 20F0 20EF 24CF 28CF 28CE 2CCE 30AE 30AD 34AD 388D 388C 3C8C 3C6C 406B 446B 444B 484B 4C4A 4C2A 502A 5429 5409 5809 5C08
 y 373 x 112: 0193 0173 0573 0572 0972 0D52 0D51 1151 1531 1530 1930 1D10 1D0F 210F 20EF 24EE 28EE 28CE 2CCD 30CD 30AD 34AD 38AC 388C 3C8C 3C8B 406B 446B 446A 486A 4C4A 4C49 5049 5429 5428 5828 5C08 5C07 6007
 y 374 x 112: 0193 0192 0592 0572 0971 0D71 0D51 1150 1550 1530 1930 1D2F 1D0F 210F 210E 250E 28EE 28ED 2CED 30CD 30CC 34CC 38AC 38AB 3CAB 3C8B 408A 448A 446A 4869 4C69 4C49 5048 5448 5428 5828 5C27 5C27 6007 6006
 y 375 x 112: 01B2 01B2 0592 0591 0991 0D71 0D70 1170 1550 154F 194F 1D2F 1D2E 212E 210E 250D 290D 28ED 2CEC 30EC 30CC 34CB 38CB 38CB 3CAB 3CAA 40AA 448A 4489 4889 4C69 4C68 5068 5448 5447 5847 5C27 5C26 6026 6006 6405 6805
 y 376 x 112: 01B2 01B1 05B1 0591 0990 0D90 0D70 116F 156F 156F 194E 1D4E 1D4E 212D 212D 252D 290D 290C 2D0C 30EC 30EB 34EB 38CB 38CA 3CCA 3CAA 40A9 44A9 4489 4888 4C88 4C68 5067 5467 5467 5846 5C46 5C46 6026 6025 6425 6805 6804 6C04
 y 377 x 112: 01D1 01D1 05B0 05B0 09B0 0D90 0D8F 118F 156F 156E 196E 1D4E 1D4D 214D 212D 252C 292C 290C 2D0B 310B 310B 34EA 38EA 38EA 3CC9 3CC9 40C9 44A8 44A8 48A8 4C88 4C87 5087 5467 5466 5866 5C46 5C45 6045 6025 6424 6824 6824 6C03 7003
 y 378 x 112: 01D1 01D0 05D0 05B0 09AF 0DAF 0DAF 118E 158E 158E 196D 1D6D 1D6D 214C 214C 254C 292B 292B 2D2B 310B 310A 350A 38EA 38E9 3CE9 3CC9 40C8 44C8 44C8 48A7 4CA7 4CA7 5086 5486 5486 5865 5C65 5C65 6044 6044 6444 6823 6823 6C23 7003 7002 7402
 y 379 x 112: 01F0 01F0 05CF 05CF 09CF 0DAE 0DAE 11AE 158D 158D 198D 1D6D 1D6C 216C 216C 254B 294B 294B 2D2A 312A 312A 3509 3909 3909 3CE8 3CE8 40E8 44C7 44C7 48C7 4CA6 4CA6 50A6 5486 5485 5885 5C65 5C64 6064 6064 6443 6843 6843 6C22 7022 7022 7401 7801 7801
 y 380 x 112: 0210 01EF 05EF 05EF 09CE 0DCE 0DCE 11AD 15AD 15AD 198C 1D8C 1D8C 216B 216B 256B 294A 294A 2D4A 3129 3129 3529 3908 3908 3D08 3D08 40E7 44E7 44E7 48C6 4CC6 4CC6 50A5 54A5 54A5 5884 5C84 5C84 6063 6063 6463 6842 6842 6C42 7021 7021 7421 7821 7800 7C00
 y 381 x 112: 020F 020F 05EE 05EE 09EE 0DCD 0DCD 11CD 15AC 15AC 19AC 1DAB 1D8B 218B 218B 256A 296A 296A 2D49 3149 3149 3528 3928 3928 3D07 3D07 4107 44E6 44E6 48E6 4CC5 4CC5 50C5 54C4 54A4 58A4 5CA3 5C83 6083 6083 6462 6862 6862 6C41 7041 7041 7420 7820 7820
 y 382 x 112: 022E 020E 060E 060D 09ED 0DED 0DED 11CC 15CC 15CC 19AB 1DAB 1DAB 218A 218A 258A 2969 2969 2D69 3168 3148 3548 3947 3927 3D27 3D26 4106 4506 4506 48E5 4CE5 4CE5 50C4 54C4 54C4 58A3 5CA3 5CA3 6082 6082 6482 6861 6861 6C61 7060 7040 7440
 y 383 x 112: 022E 022E 060D 060D 0A0D 0E0C 0DEC 11EC 15EB 15CB 19CB 1DCA 1DAA 21AA 21A9 2589 2989 2988 2D68 3168 3168 3547 3947 3947 3D26 3D26 4126 4505 4505 4905 4D04 4CE4 50E4 54E3 54C3 58C3 5CC2 5CA2 60A2 60A1 6481 6881 6881 6C60 7060
 y 384 x 112: 024D 022D 062D 062C 0A0C 0E0C 0E0B 11EB 15EB 15EB 19CA 1DCA 1DCA 21A9 21A9 25A9 29A8 2988 2D88 3187 3167 3567 3966 3946 3D46 3D45 4125 4525 4524 4904 4D04 4D03 50E3 54E3 54E3 58C2 5CC2 5CC2 60C1 60A1 64A1 68A0 6880 6C80
 y 385 x 112: 024D 024D 064C 062C 0A2C 0E2B 0E0B 120B 160A 15EA 19EA 1DE9 1DC9 21C9 21C8 25A8 29A8 29A7 2D87 3187 3186 3566 3966 3966 3D65 3D45 4145 4544 4524 4924 4D23 4D03 5103 5502 54E2 58E2 5CE1 5CC1 60C1 60C0 64A0 68A0
 y 386 x 112: 026C 024C 064C 064B 0A2B 0E2B 0E2A 120A 160A 1609 1A09 1DE9 1DE8 21E8 21C8 25C8 29C7 29A7 2DA7 31A6 3186 3586 3985 3965 3D65 3D64 4144 4544 4543 4923 4D23 4D22 5102 5502 5501 5901 5CE1 5CE1 60E0 60C0
 y 387 x 112: 026C 026B 066B 064B 0A4B 0E4A 0E2A 122A 1629 1609 1A09 1E08 1DE8 21E8 21E7 25C7 29C7 29C6 2DA6 31A6 31A5 35A5 3985 3984 3D84 3D64 4163 4563 4543 4943 4D42 4D22 5122 5521 5501 5901 5D00 5CE0 60E0
 y 388 x 112: 028B 026B 066B 066A 0A4A 0E4A 0E49 1249 1629 1628 1A28 1E08 1E07 2207 21E7 25E6 29E6 29C6 2DC6 31C5 31A5 35A5 39A4 3984 3D84 3D83 4163 4563 4562 4962 4D42 4D41 5141 5521 5520 5920 5D00
 y 389 x 112: 028B 028A 068A 066A 0A69 0E69 0E49 1248 1648 1628 1A28 1E27 1E07 2207 2206 2606 29E6 29E5 2DE5 31C5 31C4 35C4 39A4 39A3 3DA3 3D83 4182 4582 4562 4961 4D61 4D41 5141 5540 5520
 y 390 x 112: 02AA 028A 068A 0689 0A89 0E69 0E68 1268 1648 1647 1A47 1E27 1E26 2226 2206 2605 2A05 29E5 2DE4 31E4 31C4 35C3 39C3 39A3 3DA3 3DA2 41A2 4582 4581 4981 4D61 4D60 5160 5540
 y 391 x 112: 02AA 02A9 06A9 0689 0A88 0E88 0E68 1267 1667 1647 1A46 1E46 1E46 2226 2225 2625 2A05 2A04 2E04 31E4 31E3 35E3 39C3 39C2 3DC2 3DA2 41A1 45A1 4581 4980 4D80 4D60
 y 392 x 112: 02C9 02C9 06A8 06A8 0AA8 0E88 0E87 1287 1667 1666 1A66 1E46 1E45 2245 2225 2624 2A24 2A04 2E03 3203 3203 35E2 39E2 39E2 3DC1 3DC1 41C1 45A1 45A0 49A0
 y 393 x 112: 02C9 02C8 06C8 06A8 0AA7 0EA7 0E87 1286 1686 1686 1A65 1E65 1E65 2244 2244 2644 2A23 2A23 2E23 3203 3202 3602 39E2 39E1 3DE1 3DC1 41C0 45C0 45A0
 y 394 x 112: 02E8 02E8 06C7 06C7 0AC7 0EA6 0EA6 12A6 1686 1685 1A85 1E65 1E64 2264 2244 2643 2A43 2A43 2E22 3222 3222 3601 3A01 3A01 3DE0 3DE0 41E0
 y 395 x 112: 02E8 02E7 06E7 06E7 0AC6 0EC6 0EC6 12A5 16A5 16A5 1A84 1E84 1E84 2263 2263 2663 2A42 2A42 2E42 3221 3221 3621 3A01 3A00 3E00
 y 396 x 112: 0307 0307 06E6 06E6 0AE6 0EC5 0EC5 12C5 16A4 16A4 1AA4 1E83 1E83 2283 2283 2662 2A62 2A62 2E41 3241 3241 3620 3A20 3A20
 y 397 x 112: 0326 0306 0706 0706 0AE5 0EE5 0EE5 12C4 16C4 16C4 1AA3 1EA3 1EA3 2282 2282 2682 2A61 2A61 2E61 3240 3240 3640
 y 398 x 112: 0326 0326 0705 0705 0B05 0EE4 0EE4 12E4 16E3 16C3 1AC3 1EC2 1EA2 22A2 22A1 2681 2A81 2A81 2E60 3260
 y 399 x 112: 0345 0325 0725 0724 0B04 0F04 0F03 12E3 16E3 16E3 1AC2 1EC2 1EC2 22A1 22A1 26A1 2A80 2A80 2E80
 y 400 x 112: 0345 0345 0724 0724 0B24 0F23 0F03 1303 1702 16E2 1AE2 1EE1 1EC1 22C1 22C0 26A0 2AA0
 y 401 x 112: 0364 0344 0744 0743 0B23 0F23 0F22 1302 1702 1701 1AE1 1EE1 1EE1 22E0 22C0
 y 402 x 112: 0364 0363 0763 0743 0B43 0F42 0F22 1322 1721 1701 1B01 1F00 1EE0 22E0
 y 403 x 112: 0383 0363 0763 0762 0B42 0F42 0F41 1321 1721 1720 1B20 1F00
 y 404 x 112: 0383 0382 0782 0762 0B61 0F61 0F41 1341 1740 1720
 y 405 x 112: 03A2 0382 0782 0781 0B81 0F61 0F60 1360 1740
 y 406 x 112: 03A2 03A1 07A1 0781 0B80 0F80 0F60
 y 407 x 112: 03C1 03C1 07A1 07A0 0BA0
 y 408 x 112: 03C1 03C0 07C0 07A0
 y 409 x 112: 03E0 03E0
Red over 255 pixels, vertex 0 first:
 y 300 x 16 red 0 to x 270 red 31, steps at: 24 32 40 48 56 64 72 80 88 96 104 112 120 128 136 144 152 160 168 176 184 192 200 208 216 224 232 240 248 256 264
 y 302 x 16 red 0 to x 207 red 23, steps at: 24 32 40 48 56 64 72 80 88 96 104 112 120 128 136 144 152 160 168 176 184 192 200
 y 304 x 16 red 0 to x 143 red 15, steps at: 24 32 40 48 56 64 72 80 88 96 104 112 120 128 136
 y 306 x 16 red 0 to x 79 red 7, steps at: 24 32 40 48 56 64 72
Red over 255 pixels, vertex 1 first:
 y 300 x 16 red 0 to x 270 red 31, steps at: 24 32 40 48 56 64 72 80 88 96 104 112 120 128 136 144 152 160 168 176 184 192 200 208 216 224 232 240 248 256 264
 y 302 x 16 red 0 to x 207 red 23, steps at: 24 32 40 48 56 64 72 80 88 96 104 112 120 128 136 144 152 160 168 176 184 192 200
 y 304 x 16 red 0 to x 143 red 15, steps at: 24 32 40 48 56 64 72 80 88 96 104 112 120 128 136
 y 306 x 16 red 0 to x 79 red 7, steps at: 24 32 40 48 56 64 72
Red over 255 pixels, vertex 2 first:
 y 300 x 16 red 0 to x 270 red 31, steps at: 24 32 40 48 56 64 72 80 88 96 104 112 120 128 136 144 152 160 168 176 184 192 200 208 216 224 232 240 248 256 264
 y 302 x 16 red 0 to x 207 red 23, steps at: 24 32 40 48 56 64 72 80 88 96 104 112 120 128 136 144 152 160 168 176 184 192 200
 y 304 x 16 red 0 to x 143 red 15, steps at: 24 32 40 48 56 64 72 80 88 96 104 112 120 128 136
 y 306 x 16 red 0 to x 79 red 7, steps at: 24 32 40 48 56 64 72
Red over 200 pixels, vertex 0 first:
 y 300 x 16 red 0 to x 215 red 31, steps at: 22 29 35 41 47 54 60 66 73 79 85 91 98 104 110 117 123 129 135 142 148 154 160 167 173 179 186 192 198 204 211
 y 302 x 16 red 0 to x 165 red 23, steps at: 22 29 35 41 47 54 60 66 73 79 85 91 98 104 110 117 123 129 135 142 148 154 160
 y 304 x 16 red 0 to x 115 red 15, steps at: 22 29 35 41 47 54 60 66 73 79 85 91 98 104 110
 y 306 x 16 red 0 to x 65 red 7, steps at: 22 29 35 41 47 54 60
Red over 200 pixels, vertex 1 first:
 y 300 x 16 red 0 to x 215 red 31, steps at: 22 29 35 41 47 54 60 66 73 79 85 91 98 104 110 117 123 129 135 142 148 154 160 167 173 179 186 192 198 204 211
 y 302 x 16 red 0 to x 165 red 23, steps at: 22 29 35 41 47 54 60 66 73 79 85 91 98 104 110 117 123 129 135 142 148 154 160
 y 304 x 16 red 0 to x 115 red 15, steps at: 22 29 35 41 47 54 60 66 73 79 85 91 98 104 110
 y 306 x 16 red 0 to x 65 red 7, steps at: 22 29 35 41 47 54 60
Red over 200 pixels, vertex 2 first:
 y 300 x 16 red 0 to x 215 red 31, steps at: 22 29 35 41 47 54 60 66 73 79 85 91 98 104 110 117 123 129 135 142 148 154 160 167 173 179 186 192 198 204 211
 y 302 x 16 red 0 to x 165 red 23, steps at: 22 29 35 41 47 54 60 66 73 79 85 91 98 104 110 117 123 129 135 142 148 154 160
 y 304 x 16 red 0 to x 115 red 15, steps at: 22 29 35 41 47 54 60 66 73 79 85 91 98 104 110
 y 306 x 16 red 0 to x 65 red 7, steps at: 22 29 35 41 47 54 60
Done.

followup33/04ENP.txt

===== 04 ENP F33 ENVELOPE PHASE | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
Voice 0 attack linear shift 16 step 0 (+7 every 32 samples, 24576 cycles) keyed on at
timer 0; voice 1 keyed on d cycles after voice 0's second change. Cycles from that
change: voice 1's KON, voice 0's next three changes, voice 1's first three. One counter
running free puts voice 1 on voice 0's grid at every d; a counter restarted by a KON
moves voice 0's grid to voice 1's KON.
d     0, voice 1 shift 16: voice 0 at 16937 41513 from its KON; from its second, voice 1 KON +214, voice 0 +24571 +49125 +73751, voice 1 +24571 +49125 +73751
d   384, voice 1 shift 16: voice 0 at 14657 39239 from its KON; from its second, voice 1 KON +467, voice 0 +24559 +49114 +73737, voice 1 +24559 +49114 +73737
d   768, voice 1 shift 16: voice 0 at 14653 39237 from its KON; from its second, voice 1 KON +826, voice 0 +24642 +49195 +73722, voice 1 +24642 +49195 +73722
d  1536, voice 1 shift 16: voice 0 at 14653 39237 from its KON; from its second, voice 1 KON +1596, voice 0 +24639 +49195 +73722, voice 1 +24639 +49195 +73722
d  3072, voice 1 shift 16: voice 0 at 14656 39232 from its KON; from its second, voice 1 KON +3138, voice 0 +24638 +49192 +73811, voice 1 +24638 +49192 +73811
d  6144, voice 1 shift 16: voice 0 at 14706 39288 from its KON; from its second, voice 1 KON +6238, voice 0 +24570 +49125 +73753, voice 1 +24570 +49125 +73753
d 12288, voice 1 shift 16: voice 0 at 14653 39237 from its KON; from its second, voice 1 KON +12365, voice 0 +24554 +49204 +73738, voice 1 +24554 +49204 +73738
d 18432, voice 1 shift 16: voice 0 at 14656 39232 from its KON; from its second, voice 1 KON +18494, voice 0 +24638 +49192 +73811, voice 1 +24638 +49192 +73811
d 23808, voice 1 shift 16: voice 0 at 14656 39232 from its KON; from its second, voice 1 KON +23895, voice 0 +24574 +49194 +73726, voice 1 +49194 +73726 +98370
d 24192, voice 1 shift 16: voice 0 at 14656 39232 from its KON; from its second, voice 1 KON +24261, voice 0 +24641 +49165 +73790, voice 1 +49165 +73790 +98327
d 24960, voice 1 shift 16: voice 0 at 14656 39232 from its KON; from its second, voice 1 KON +25031, voice 0 +25123 +49173 +73800, voice 1 +49173 +73800 +98338
Voice 1 at shift 15 (every 16 samples), 17 (64) and 18 (128), keyed d 3072:
d  3072, voice 1 shift 15: voice 0 at 4756 29332 from its KON; from its second, voice 1 KON +3149, voice 0 +24589 +49175 +73703, voice 1 +18413 +30754 +42999
d  3072, voice 1 shift 17: voice 0 at 14653 39237 from its KON; from its second, voice 1 KON +3147, voice 0 +24586 +49217 +73750, voice 1 +12266 +61430 +110649
d  3072, voice 1 shift 18: voice 0 at 26941 51525 from its KON; from its second, voice 1 KON +3147, voice 0 +24577 +49174 +73771, voice 1 +86039 +184346 +282603
The SPU off and on (SPUCNT 0000h, then 8000h), voice 0 keyed again d after the enable:
off   3000, KON     0 after the enable: voice 0 before at 15266 39848; after, KON at +102, changes at +21323 +45874 from the enable, 0 24551 past the old grid (mod 24576)
off   3000, KON  6144 after the enable: voice 0 before at 14840 39416; after, KON at +6186, changes at +21352 +45953 from the enable, 12 37 past the old grid (mod 24576)
off   3000, KON 12288 after the enable: voice 0 before at 16425 41007; after, KON at +12334, changes at +21354 +45893 from the enable, 12 24551 past the old grid (mod 24576)
off 100000, KON     0 after the enable: voice 0 before at 14895 39477; after, KON at +76, changes at +22619 +47203 from the enable, 24551 24559 past the old grid (mod 24576)
off 100000, KON  6144 after the enable: voice 0 before at 14897 39473; after, KON at +6185, changes at +22637 +47213 from the enable, 0 0 past the old grid (mod 24576)
Done.

followup33/05S32.txt

===== 05 S32 F33 SPU 32 BIT STORES | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
256 sw to each register, both halves written 0 first: store i at (3i mod 768) cycles
into its own pair of samples after a sample tick; value (1000h+i)<<16 | (2000h+i), lw
back. Timer 2 read just before each sw. Every voice keyed off and parked.
1C58h (voice 5 ADSR): lost halves (store: sample phase/timer mod 8 read): 6:75/1 10060000 9:75/1 10090000 12:75/1 100C0000 31:139/1 101F0000 34:139/1 10220000 45:195/1 102D0000 48:195/1 10300000 51:195/1 10330000 70:275/1 10460000 75:275/1 104B0000 78:275/1 104E0000 89:331/1 10590000 92:331/1 105C0000 95:331/1 105F0000 98:331/1 10620000 116:411/1 10740000; low 39, high 0 of 256
 by timer mod 8 (stores/low lost/high lost): 0:23/0/0 1:39/39/0 2:23/0/0 3:45/0/0 4:22/0/0 5:36/0/0 6:22/0/0 7:46/0/0
 by sample phase in 32-cycle slots (stores/low lost): 13/4 6/0 11/3 13/0 9/2 12/0 9/3 12/0 11/3 8/0 12/4 12/0 11/4 12/0 9/3 9/0 14/4 8/0 9/3 12/0 10/2 12/0 12/4 10/0
1C08h (voice 0 ADSR): lost halves (store: sample phase/timer mod 8 read): 4:79/1 10040000 7:79/1 10070000 10:79/1 100A0000 13:79/1 100D0000 32:143/1 10200000 35:143/1 10230000 46:199/1 102E0000 49:199/1 10310000 52:199/1 10340000 55:199/1 10370000 71:279/1 10470000 74:279/1 104A0000 76:279/1 104C0000 79:279/1 104F0000 90:335/1 105A0000 93:335/1 105D0000; low 42, high 0 of 256
 by timer mod 8 (stores/low lost/high lost): 0:23/0/0 1:42/42/0 2:24/0/0 3:44/0/0 4:20/0/0 5:37/0/0 6:22/0/0 7:44/0/0
 by sample phase in 32-cycle slots (stores/low lost): 11/4 9/0 11/4 12/0 10/2 12/0 11/4 6/0 12/4 11/0 12/4 12/0 8/2 13/0 10/3 8/0 12/3 11/0 12/4 12/0 11/4 8/0 10/4 12/0
1D78h (voice 23 ADSR): lost halves (store: sample phase/timer mod 8 read): 4:49/1 10040000 23:129/1 10170000 26:129/1 101A0000 29:129/1 101D0000 42:185/1 102A0000 45:185/1 102D0000 48:185/1 10300000 63:249/1 103F0000 66:249/1 10420000 69:249/1 10450000 82:305/1 10520000 85:305/1 10550000 88:305/1 10580000 107:385/1 106B0000 110:385/1 106E0000 113:385/1 10710000; low 43, high 0 of 256
 by timer mod 8 (stores/low lost/high lost): 0:23/0/0 1:43/43/0 2:23/0/0 3:42/0/0 4:24/0/0 5:42/0/0 6:20/0/0 7:39/0/0
 by sample phase in 32-cycle slots (stores/low lost): 12/1 10/3 12/0 7/0 11/3 11/3 11/0 10/3 12/0 10/3 12/0 8/0 14/4 8/4 10/0 11/4 12/0 11/4 12/0 8/0 13/4 8/3 11/0 12/4
1DC0h (reverb dAPF1, reverb off): lost halves (store: sample phase/timer mod 8 read): 3:73/1 10030000 6:73/1 10060000 9:73/1 10090000 12:73/1 100C0000 31:153/1 101F0000 34:153/1 10220000 42:193/1 102A0000 45:193/1 102D0000 48:193/1 10300000 51:193/1 10330000 70:273/1 10460000 73:273/1 10490000 76:273/1 104C0000 78:273/1 104E0000 89:329/1 10590000 92:329/1 105C0000; low 42, high 0 of 256
 by timer mod 8 (stores/low lost/high lost): 0:23/0/0 1:42/42/0 2:22/0/0 3:46/0/0 4:18/0/0 5:43/0/0 6:25/0/0 7:37/0/0
 by sample phase in 32-cycle slots (stores/low lost): 11/4 10/0 8/4 12/0 12/2 7/0 12/4 12/0 11/4 12/0 8/4 10/0 12/2 9/0 12/4 12/0 11/4 12/0 6/3 11/0 11/3 13/0 12/4 10/0
Done.

followup33/06MSW.txt

===== 06 MSW F33 MDEC SWALLOWED | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
An 8 bit decode of followup19's block, all 32 words in, output unread (SWC state 4), then
words, then the output read out: words read, their CRC, the status after each change.
A. Nothing more: status 2204FFFF; read 16 words, CRC 728FE2ED; status after word 1:2204FFFF 16:8204FFFF
 2000 later 8204FFFF
B. Status 2204FFFF; markers A001-A004, status after each: 2204FFFF 2204FFFF 2204FFFF 2204FFFF
 read 16 words, CRC 728FE2ED; status after word 1:2204FFFF 16:8204FFFF
 2000 later 8204FFFF; markers A005-A008, status after each: 8004A005 8004A006 8004A007 8004A008
C. Status 2204FFFF; a second decode for 32 words and the block's 32 words: 2204FFFF 2204FFFF after the 32
 read 16 words, CRC 728FE2ED; status after word 1:2204FFFF 16:8204FFFF
 5000 later, 0 more words, status 8204FFFF
D. Status 2204FFFF; the decode command alone: 2204FFFF
 read 16 words, CRC 728FE2ED; status after word 1:2204FFFF 16:8204FFFF
 then the block's 32 words: 80840001; read 0 words, CRC 00000000; status after word
E. Status 2204FFFF; marker A001, 8 words read, marker A002: 2204FFFF; 8 read, 2204FFFF; 2204FFFF
 read 8 words, CRC 1D9AF8D5; status after word 1:2204FFFF 8:8204FFFF
 2000 later 8204FFFF
DMA0 of decode pad words FE00FE00h for an 8 bit decode of n (followup19 DTB's kind 3),
cycles from the CHCR write; blocks left@cycles as BCR's count fell; status after.
Pad  16 words, blocks of 16: 211 cycles; blocks left at: 0@87; status 8204FFFF
Pad  32 words, blocks of 16: 185 cycles; blocks left at: 0@95; status 8204FFFF
Pad  48 words, blocks of 16: 434 cycles; blocks left at: 1@95 0@376; status 8204FFFF
Pad  64 words, blocks of 16: 440 cycles; blocks left at: 2@100 0@354; status 8204FFFF
Pad  96 words, blocks of 16: 773 cycles; blocks left at: 4@95 2@352 0@692; status 8204FFFF
Pad 128 words, blocks of 16: 1075 cycles; blocks left at: 6@95 4@350 2@688 0@998; status 8204FFFF
Pad  64 words, blocks of 32: 434 cycles; blocks left at: 1@90 0@342; status 8204FFFF
Pad 128 words, blocks of 32: 1023 cycles; blocks left at: 3@90 2@390 1@710 0@935; status 8204FFFF
Done.

followup33/07SFF.txt

===== 07 SFF F33 SPU READ FFFF | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
DMA read of 128 bytes (2 blocks of 16 words) at 30000h holding D000h, D001h, .. into a
buffer of EEEEh, 1F801014h 200931E1h (bits 24-27 zero) during the read, 220931E1h after;
the CHCR write d cycles after SPUCNT's transfer mode took at a sample tick and bit 10
cleared. Every voice parked (released, reading 28000h) at pitch 1000h unless shown.
d 0, run 1: FFFF at 0 4 32 34; missing D003 D01F D021 D03F
d 0, run 2: FFFF at 0 32; missing D01F D03F
d 0, run 3: FFFF at 0 18 32 46; missing D011 D01F D02D D03F
d 96, run 1: FFFF at 0 32; missing D01F D03F
d 96, run 2: FFFF at 0 32; missing D01F D03F
d 192, run 1: FFFF at 0 18 32 46; missing D011 D01F D02D D03F
d 192, run 2: FFFF at 0 20 32; missing D013 D01F D03F
d 288, run 1: FFFF at 0 8 32; missing D007 D01F D03F
d 288, run 2: FFFF at 0 32; missing D01F D03F
d 384, run 1: FFFF at 0 18 32 46; missing D011 D01F D02D D03F
d 384, run 2: FFFF at 0 32; missing D01F D03F
d 480, run 1: FFFF at 0 20 32 46; missing D013 D01F D02D D03F
d 480, run 2: FFFF at 0 14 32; missing D00D D01F D021 D03F
d 576, run 1: FFFF at 0 32; missing D01F D03F
d 576, run 2: FFFF at 0 32; missing D01F D03F
d 672, run 1: FFFF at 0 32; missing D01F D03F
d 672, run 2: FFFF at 0 32; missing D01F D03F
Every voice pitch 0, d 0, run 1: FFFF at 0 32 50; missing D01F D031 D03F
Every voice pitch 0, d 0, run 2: FFFF at 0 32; missing D01F D03F
Every voice pitch 0, d 0, run 3: FFFF at 0 32; missing D01F D03F
Every voice pitch 3FFFh, d 0, run 1: FFFF at 0 18 32 46; missing D011 D01F D02D D03F
Every voice pitch 3FFFh, d 0, run 2: FFFF at 0 32; missing D01F D03F
Every voice pitch 3FFFh, d 0, run 3: FFFF at 0 32; missing D01F D03F
220931E1h, d 0: FFFF at none; missing none
Done.

References