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Hardware tests

Bus Auto Increment

Measures what bit 13 of the delay and size registers does to 32-bit accesses to 8-bit and 16-bit devices.

Bus Auto Increment
MachineSCPH-5501
Programautoinc (pcsx-redux nugget)

Overview

A 32-bit access to a 16-bit device is two bus transactions, and to an 8-bit device four. Bit 13 of a device's delay and size register decides whether the device address advances between those transactions. The program tests this on the 8-bit BIOS ROM through DEV2 (1F801010h) and on the 16-bit SPU through DEV4 (1F801014h).1

On the ROM it reads words, halfwords and bytes from BFC00000h under the BIOS's own setting and again with bit 13 cleared. On the SPU it seeds the voice 0 ADSR registers at 1F801C08h and 1F801C0Ah with halfword stores under a safe setting. It then issues one SW, LW, LH or SH under the setting being tested and reads the result back under the safe setting.1 The program ran its full set three times and printed the same lines each time.2

Results

BIOS ROM

With bit 13 set, as the BIOS leaves it (DEV2 0013243Fh), a word read returns four consecutive ROM bytes: the first word read 3C080013h. With bit 13 cleared (0013043Fh) the address does not advance, so every byte of a word comes from one address: the first word read 13131313h and the first halfword 1313h. Byte reads are the same under both settings.2

SPU

The SPU results for each setting of DEV4 are as follows. Each pair gives the register at 1F801C0Ah before the register at 1F801C08h.2

Table 1: SPU accesses by DEV4 setting
DEV4 Width and bit 13 SW of AAAA5555h over 2222h:1111h LW of 9ABCh:5678h LH +2
200931EFh 16-bit, set AAAAh:5555h 9ABC5678h 9ABCh
200911EFh 16-bit, clear 2222h:AAAAh 56785678h 9ABCh
200921EFh 8-bit, set FFAAh:FF55h BCBC7878h BCBCh
200901EFh 8-bit, clear 2222h:FFAAh 78787878h BCBCh

With bit 13 clear, both halves of a 32-bit store go to the first register, and the second half overwrites the first: 1F801C08h ended as AAAAh and 1F801C0Ah kept 2222h. A 32-bit load then reads the first register twice. Under an 8-bit setting the SPU receives one byte for each 16-bit register. The upper byte of the register is written as FFh.2

Runs

AUTOINC.txt:

AUTOINC-START dev2=0013243f dev4=200931e1
ROM bios   dev2=0013243f lw 3c080013 3508243f 3c011f80 ac281010 lh 0013 3c08 243f 3508 lb 13 00 08 3c 3f 24 08 35
ROM noinc  dev2=0013043f lw 13131313 3f3f3f3f 80808080 10101010 lh 1313 0808 3f3f 0808 lb 13 00 08 3c 3f 24 08 35
SPU 16inc  dev4=200931ef sw(aaaa5555 over 2222:1111)=aaaa:5555 sh(beef over 4444:3333)=4444:beef lw(9abc:5678)=9abc5678 lh+2=9abc
SPU 16no   dev4=200911ef sw(aaaa5555 over 2222:1111)=2222:aaaa sh(beef over 4444:3333)=4444:beef lw(9abc:5678)=56785678 lh+2=9abc
SPU 8inc   dev4=200921ef sw(aaaa5555 over 2222:1111)=ffaa:ff55 sh(beef over 4444:3333)=4444:ffbe lw(9abc:5678)=bcbc7878 lh+2=bcbc
SPU 8no    dev4=200901ef sw(aaaa5555 over 2222:1111)=2222:ffaa sh(beef over 4444:3333)=4444:ffbe lw(9abc:5678)=78787878 lh+2=bcbc
ROM bios   dev2=0013243f lw 3c080013 3508243f 3c011f80 ac281010 lh 0013 3c08 243f 3508 lb 13 00 08 3c 3f 24 08 35
ROM noinc  dev2=0013043f lw 13131313 3f3f3f3f 80808080 10101010 lh 1313 0808 3f3f 0808 lb 13 00 08 3c 3f 24 08 35
SPU 16inc  dev4=200931ef sw(aaaa5555 over 2222:1111)=aaaa:5555 sh(beef over 4444:3333)=4444:beef lw(9abc:5678)=9abc5678 lh+2=9abc
SPU 16no   dev4=200911ef sw(aaaa5555 over 2222:1111)=2222:aaaa sh(beef over 4444:3333)=4444:beef lw(9abc:5678)=56785678 lh+2=9abc
SPU 8inc   dev4=200921ef sw(aaaa5555 over 2222:1111)=ffaa:ff55 sh(beef over 4444:3333)=4444:ffbe lw(9abc:5678)=bcbc7878 lh+2=bcbc
SPU 8no    dev4=200901ef sw(aaaa5555 over 2222:1111)=2222:ffaa sh(beef over 4444:3333)=4444:ffbe lw(9abc:5678)=78787878 lh+2=bcbc
ROM bios   dev2=0013243f lw 3c080013 3508243f 3c011f80 ac281010 lh 0013 3c08 243f 3508 lb 13 00 08 3c 3f 24 08 35
ROM noinc  dev2=0013043f lw 13131313 3f3f3f3f 80808080 10101010 lh 1313 0808 3f3f 0808 lb 13 00 08 3c 3f 24 08 35
SPU 16inc  dev4=200931ef sw(aaaa5555 over 2222:1111)=aaaa:5555 sh(beef over 4444:3333)=4444:beef lw(9abc:5678)=9abc5678 lh+2=9abc
SPU 16no   dev4=200911ef sw(aaaa5555 over 2222:1111)=2222:aaaa sh(beef over 4444:3333)=4444:beef lw(9abc:5678)=56785678 lh+2=9abc
SPU 8inc   dev4=200921ef sw(aaaa5555 over 2222:1111)=ffaa:ff55 sh(beef over 4444:3333)=4444:ffbe lw(9abc:5678)=bcbc7878 lh+2=bcbc
SPU 8no    dev4=200901ef sw(aaaa5555 over 2222:1111)=2222:ffaa sh(beef over 4444:3333)=4444:ffbe lw(9abc:5678)=78787878 lh+2=bcbc
AUTOINC-DONE
ResetGraph:jtb=801e78b8,env=801e7900

bench.txt:

2336 bytes of TTY text in psx.log

when.txt:

20261022T2232Z

References

  1. ^ a b pcsx-redux nugget, tests/autoinc/autoinc.c, header comment. MIT License. https://github.com/pcsx-redux/nugget

  2. ^ a b c d Hardware test run 20261022T2232Z-5501a-link on the SCPH-5501: AUTOINC.txt.

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