GPU Flat Quad Fill Time

Measures the cycles from the first command word to the GPU idle for flat quads of each size and setting and for the BIOS's shaded quad and triangles.

Overview

The program sends one primitive at a time through the GP0 port and times it with root counter 2, from the first command word until GPUSTAT shows the GPU idle. Each row runs twice, and each row also prints the time at which the FIFO empty bit was first set.¹ The base case is the BIOS's flat quad, GP0(28h) in colour B4B4B4h from 0,0 to 640,480, with GP0(E1h) 20Ah and a draw area of 640x480. Each later row changes one thing against it: the dither bit of E1h, the size, the position, the draw area, or the display.¹

The second group sends the BIOS list's last three primitives alone in the same way: a shaded quad and two shaded triangles. It then puts a flat quad 640 pixels wide in a DMA2 list of one node and prints the cycle at which the list ended, the cycle at which the GPU went idle, and the horizontal blanks counted by root counter 1 in between.¹

See also:

• GPU Command Timing
• GPU Timing at Game Scale
• GPU Bandwidth

Results

Flat Quad Size

The 640x480 quad took 164,170 to 167,858 cycles. Neither the dither bit nor the rest of E1h changed the time, and a quad on the displayed area took as long as one outside it. Turning the display off with GP1(03h) did not change the time either.¹

The time follows the area plus a small cost for each row. A row of 640 pixels takes about 350 cycles (167,800 / 480), and a row of 64 pixels about 39 cycles (18,815 / 480). The difference of about 310 cycles for 576 pixels gives about 0.54 cycles a pixel. About 5 cycles a row remain. The quad of 512x480 fits this: 480 x (5 + 0.54 x 512) is about 135,100 cycles against the 134,650 measured.¹

For most quads the FIFO empty bit was first set at about half of the time to idle. For the 640x480 quad it was set at 83,977 of 167,831 cycles.¹

Draw Area

With a draw area of 1024x512, the 640x480 quad at 0,0 took the same time as with the 640x480 area. The same quad at 384,0 took 125 and 101 cycles. With a draw area of 640x240 the 640x480 quad took 84,396 and 84,370 cycles, the time of the 640x240 quad, but the FIFO empty bit was first set at 62,700 and 62,688 cycles.¹ Root counter 1 counted 78 and 77 horizontal blanks during two more draws of the 640x480 quad, which took 167,858 and 164,170 cycles.¹

BIOS Primitives and a DMA2 List

The shaded quad of node 1020 took 34,753 and 34,651 cycles, and the shaded triangles of nodes 1022 and 1023 took 3,914 to 4,082 cycles. For the triangles the FIFO empty bit was set after 272 to 277 cycles.¹

With the flat quad in a DMA2 list of one node, the list ended 8 cycles after it started at every size, while the GPU went on drawing. The time to the GPU idle grew with the rows of the quad as it did through the port.¹

Runs

5 October 2026

followup21/00RUN.txt

===== 00 RUN | BIOS 19951204 System ROM Version 3.0 11/18/96 A
2 tests
A chain program, linked at 80100000
Saved on the card in slot 2, from image 1
COP0 at start: BPC 00000000 BDA 00000000 TAR BFC02BAC DCIC 00000000 BadVaddr 00000480 BDAM 00000000
BPCM 00000000 SR 40000000 Cause 00000020 EPC 8001EA1C PRId 00000002

followup21/01QDT.txt

===== 01 QDT F21 QUAD DRAW TIME | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
The BIOS's flat quad alone through the GP0 port: cycles from its first word to the GPU
idle (FIFO empty when bit 28 first set). Twice each. B = E1h 20Ah, draw area 640x480.
B 640x480 at 0,0: 167831 (FIFO empty 83977) 167814 (FIFO empty 83948)
dither off (E1h 00Ah) 640x480: 164230 (FIFO empty 82488) 167732 (FIFO empty 83888)
E1h 000h 640x480: 167813 (FIFO empty 83945) 164271 (FIFO empty 83911)
B 640x240 at 0,0 (on screen): 84072 (FIFO empty 42138) 84102 (FIFO empty 42094)
B 640x240 at 0,240 (off screen): 84078 (FIFO empty 42054) 84102 (FIFO empty 42124)
B 320x480 at 0,0: 84516 (FIFO empty 42522) 82650 (FIFO empty 40196)
B 320x480 at 320,0: 84928 (FIFO empty 42498) 84982 (FIFO empty 42544)
B 320x240 at 0,0: 42621 (FIFO empty 21331) 42536 (FIFO empty 21358)
B 640x120 at 0,0: 42226 (FIFO empty 21146) 42158 (FIFO empty 21126)
B 160x480 at 0,0: 42552 (FIFO empty 21718) 41703 (FIFO empty 20303)
B 512x480 at 0,0: 134669 (FIFO empty 67381) 134631 (FIFO empty 67377)
B 64x480 at 0,0: 18820 (FIFO empty 9454) 18810 (FIFO empty 9430)
B 640x480 at 0,0 again: 164711 (FIFO empty 83943) 167786 (FIFO empty 83956)
draw area 1024x512, 640x480 at 0,0: 167834 (FIFO empty 83990) 164178 (FIFO empty 80394)
draw area 1024x512, 640x480 at 384,0: 125 (FIFO empty 125) 101 (FIFO empty 101)
draw area 640x240, 640x480 at 0,0 (half clipped): 84396 (FIFO empty 62700) 84370 (FIFO empty 62688)
display off, B 640x480: 166856 (FIFO empty 83904) 165906 (FIFO empty 82030)
B 640x480: 167858, hblanks 78
B 640x480: 164170, hblanks 77
Done.

followup21/02PRM.txt

===== 02 PRM F21 PRIMS AND HOLDS | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
The BIOS list's last three prims alone through the port (node 1020 shaded quad, 1022
and 1023 shaded triangles), then 640 wide flat quads in a one node DMA2 list.
node 1020: 34753 (FIFO empty 17677) 34651 (FIFO empty 17609)
node 1022: 3914 (FIFO empty 276) 3920 (FIFO empty 272)
node 1023: 4082 (FIFO empty 276) 4020 (FIFO empty 277)
One node list, a 640 wide quad of r rows: list done / GPU idle / hblanks, twice.
r 64: 8/22757 h11 8/21191 h10
r 128: 8/43880 h20 8/45033 h21
r 256: 8/89672 h41 8/89595 h41
r 480: 8/167810 h78 8/164284 h76
Done.

References