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Hardware tests

GPU Drawing Time and Status Bits

Measures GPU drawing times for rectangles, lines, textured primitives, fills and copies, and the GPUSTAT and GPUREAD values around GP1 writes and transfers.

GPU Drawing Time and Status Bits
MachineSCPH-5501
Programfollowup17 and followup17w

Overview

Root counter 2 times each GPU command in system clock cycles. Each timed row counts four times from the first GP0 write until GPUSTAT bit 26 reads set. It also gives the count at which bit 28 was first seen set, and the tables give the second of the four samples. Because the command FIFO holds 16 words, commands of more than 16 words are written paced: each word waits for GPUSTAT bit 25 with the DMA direction set to 1.123

The groups time semi-transparent rectangles, lines and polylines, textured primitives with a cold texture cache, large fills, VRAM copies and bursts of small commands. Other groups read GPUSTAT straight after a GP1 write and during an A0h transfer, read GPUREAD after C0h transfers, and write GP0(03h) with several values. A further group sends A0h data by DMA2 in one block of 1024 words, and another overruns the command FIFO with a polyline and counts the pixels that are drawn.453

See also:

Results

GPUSTAT After a GP1 Write

GPUSTAT bits 24 to 30 were read four times back to back after GP1(04h) set a new DMA direction. With 0 or 1 NOPs after the write, the first read still gave 14h. With 2 NOPs the first read gave the new direction without bit 25 (34h, 54h), and from 4 NOPs on every read gave the final value. The second read after the write already held the final value in every row.4

Table 1: GPUSTAT bits 24 to 30 at the first read after GP1(04h)
NOPs after the write Direction 1 Direction 2 Direction 3
0 14h 14h 14h
1 14h 14h 14h
2 34h 54h 74h
4 36h 56h 74h
8 36h 56h 74h

After 100 words of an A0h transfer, GP1(01h) was written and the same four reads gave 10h, 10h, 10h and 14h, so bit 26 returned on the fourth read. With 8 NOPs first it returned on the third read.4 During an A0h transfer of 128 words written by the CPU, bits 24 to 30 read 10h after each of words 1 to 64 and 14h after word 128, with or without 64 NOPs before each read.6

GPUREAD After a Transfer

C0h transfers were read from a block whose pixels hold known values, and GPUREAD was then loaded three more times. After a transfer of one word (1x1 and 2x1 pixels) the further loads returned 44444444h. After a transfer of two or more words the further loads returned the first word of the transfer, not the last: the 4x2 transfer read 10111010h, 10131012h, 11111110h and 11131112h, and then 10111010h three times. GPUSTAT read 14062518h after every transfer.4

Rectangles and Lines

A semi-transparent rectangle 64 rows high took longer in steps as its width grew. Widths 2 and 3, 4 and 5, and 8 and 9 each took about the same time, and the time rose by 300 to 370 cycles between widths 15 and 16. A flat rectangle of 16 or 17 pixels took about 765 cycles. A semi-transparent one of 7 pixels took about the same time.1

Table 2: Rectangles 64 rows high
Width Semi (62h) Flat (60h)
1 581 407
2 642
4 703
8 822
15 1,003
16 1,377 763
17 1,377 768
32 2,099

A flat line (40h) took about 218 cycles at 64 pixels and about 400 at 256 pixels. At 1023 pixels it took about 1,190. A gouraud line (50h) of 512 pixels took 711 to 716 cycles against 637 to 682 for the flat one. Gouraud polylines took the same time with segments of 8 and of 32 pixels at every segment count, while flat polylines took longer with segments of 32 pixels. The rows of 19 and 35 words are written paced.2

Table 3: Polylines of horizontal segments
Segments Gouraud, 8 pixels Gouraud, 32 pixels Flat, 8 pixels Flat, 32 pixels
2 329 332 163 241
4 500 504 266 330
8 868 875 314 499
16 1,523 1,509 563 923

Back-to-back 1x1 rectangles (68h) took about 125 cycles for one, 146 for two, 194 for four and 290 for eight. Eight of them with every word paced took about 490 cycles. That is about 200 more than the same eight written in one burst.7

Textured Primitives

Each textured row started with the texture cache cold. A 15-bit quad 64 pixels across took about 13,955 cycles with u 0 to 63 and about 22,630 with u 0 to 127, which doubles the texels crossed on each row. Stepping v by 2 as well added nothing. For triangles, the 8-bit texture at u step 1 took the same time as the 4-bit texture at u step 2, and the 15-bit texture at u step 1 the same as the 8-bit at u step 2.8

Table 4: Cold textured triangles 64 pixels across
Depth u 0 to 63 u 0 to 127
4 bit 3,950 4,922
8 bit 4,916 7,157
15 bit 7,214 11,529

Semi-transparency added time to every textured rectangle, and the cost grew with width and depth. A 4-bit rectangle 128 by 64 took 9,490 cycles plain and 11,970 semi-transparent. A 15-bit rectangle of the same size took 23,556 and 27,376.9

Table 5: Cold textured rectangles 64 rows high
Depth Width Plain (64h) Semi (66h)
4 bit 32 2,514 3,424
4 bit 64 4,874 6,280
4 bit 128 9,490 11,970
8 bit 32 3,787 4,821
8 bit 64 7,430 9,187
8 bit 128 14,642 17,914
15 bit 32 6,142 7,244
15 bit 64 11,972 13,974
15 bit 128 23,556 27,376

Fills and Copies

With the display area collapsed, a fill took about 5,560 cycles at 256 by 256, 9,740 at 512 by 256, 17,990 at 1024 by 256 and 35,850 at 1024 by 511. Turning the display on or off made no difference. With a live 640x240 display, the two smaller fills took the same time, and the 1024 by 511 fill took 40,241 to 40,397 cycles. That is about 13% more than with the display collapsed.10

A copy of 120 rows took about 11,270 cycles at 64 pixels wide, 19,630 at 128, 39,460 at 256 and 79,070 at 512. Copies from source X 1 took about 0.5% to 0.8% longer than from X 0. Copies of 1x1 to 16x1 pixels took 146 to 151 cycles in most samples. A copy of 16x2 took about 233 cycles and one of 16x16 about 777. One-row copies of 128 to 1024 pixels from X 0 and X 1 wrote every pixel checked across the 128-pixel boundary and at the end of the row with the value a plain copy gives.11

The later run timed copies of 576 to 1024 pixels by 120 rows to 0,384 in the same way. It also timed one-row copies with root counter 2 read on each side of a loop of one GPUSTAT read, and GP0(00h) alone in the same loop took 61 or 62 cycles after the first sample.12

Table 6: Copies in the later run
Width 120 rows One row
1 114 to 119
16 140 to 153
128 257 to 259
384 582 to 588
512 751 to 756
576 96,884 to 97,167
640 99,024 to 99,275
768 119,207 to 119,348
896 139,052 to 139,198
1024 158,938 to 159,020 1,414 to 1,427

GP0(03h)

The low 4 bits of GP0(03h) changed the drawing times. With 0 the 3x128 rectangle took 707 to 826 cycles and the 256 by 256 fill 5,565 to 6,282. With 8 they took about 1,555 and 6,767, and with Fh about 2,467 and 8,585.13

With bits 4 to 23 also set, the 3x128 and 512x128 rectangles gave bit 26 within 134 to 197 cycles at every value of the low 4 bits. The fill times still followed the low 4 bits and reached 8,585 to 8,599 cycles at Fh. The rectangles stayed at 134 to 143 cycles after GP0(03h) was written 000000h at the end.14

DMA Block and FIFO Overrun

A0h data for 64 by 32 pixels sent by DMA2 in one block of 1024 words ended in 1,215 to 1,225 cycles, and the GPU was idle at 1,328 to 1,338. Read back by C0h, 14 of the 16 runs were correct. One run had 35 wrong words from word 962, and another 27 wrong words from word 210.5

A zigzag polyline written as 34 to 80 GP0 stores with no wait overruns the 16-word command FIFO. Fewer than half of its pixels were drawn at every length, and the count drawn varied from run to run by up to 6 pixels.3

Table 7: Polyline pixels drawn after a FIFO overrun
GP0 stores Pixels in the line Pixels drawn
34 136 64
42 168 64 to 66
50 200 75 to 81
64 256 80 to 81
80 320 105 to 111

Display Paths and Timers

The 640x240 display was set by writing GP1(05h) to GP1(08h) directly and by PutDispEnv(). Both paths gave the same drawing times. A 512 by 256 fill took about 9,750 cycles when started at VSync and about 10,960 when started 100,000 cycles after it, and a 15-bit sprite 256 by 128 took about 98,465 and 103,075. With the display collapsed the same draws took about 9,750 and 93,500 at either point.15

In two of three runs of 600 reads in 640x240, GPUSTAT bit 31 changed once a line, and in the third it stayed 0 over six lines. In the logs after an IRQ0 each change came 80 or 158 to 163 cycles after root counter 1 counted the hblank, and successive changes were about 2,140 cycles apart. In 640x480 interlaced mode the two logs after an IRQ0 held only three and two changes, and the first log's changes came at 49,460, 566,104 and 1,179,566 cycles.16

At 256 pixels wide, root counter 0 paused in hblank counted 255 dot clocks a line. Counting system clock cycles instead, it counted 1,613 a line. At 320 pixels wide with the vertical display range set, root counter 1 in sync mode 0 counted 239 hblanks from IRQ0 to IRQ0 for Y 16 to 256, 159 for 40 to 200 and 9 for 100 to 110. Root counter 1 counted 0 hblanks in a frame of about 565,000 cycles when GP1(08h) was 07h, which sets the vertical resolution bit with interlace off. With interlace on (27h) it counted 263 and 262 in alternate frames, and GPUSTAT bit 13 changed each frame.17

Runs

3 October 2026

00RUN.txt

===== 00 RUN | BIOS 19951204 System ROM Version 3.0 11/18/96 A
17 tests
A chain program, linked at 80100000
Saved on the card in slot 2, from image 1
COP0 at start: BPC 00000000 BDA 00000000 TAR BFC02BAC DCIC 00000000 BadVaddr 00000480 BDAM 00000000
BPCM 00000000 SR 40000000 Cause 00000020 EPC 8001E278 PRId 00000002

01SGR.txt

===== 01 SGR F17 GPUSTAT AND GPUREAD | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
GPUSTAT bits 24-30 read four times back to back after a GP1 write, with k NOPs first
(row 32, G:24-31), cached code, two samples; then GPUREAD after C0h reads (row 33).
GP1(04h) 1, 0 NOPs: 14 36 36 36 / 14 36 36 36
GP1(04h) 1, 1 NOPs: 14 36 36 36 / 14 36 36 36
GP1(04h) 1, 2 NOPs: 34 36 36 36 / 34 36 36 36
GP1(04h) 1, 4 NOPs: 36 36 36 36 / 36 36 36 36
GP1(04h) 1, 8 NOPs: 36 36 36 36 / 36 36 36 36
GP1(04h) 2, 0 NOPs: 14 56 56 56 / 14 56 56 56
GP1(04h) 2, 1 NOPs: 14 56 56 56 / 14 56 56 56
GP1(04h) 2, 2 NOPs: 54 56 56 56 / 54 56 56 56
GP1(04h) 2, 4 NOPs: 56 56 56 56 / 56 56 56 56
GP1(04h) 2, 8 NOPs: 56 56 56 56 / 56 56 56 56
GP1(04h) 3, 0 NOPs: 14 74 74 74 / 14 74 74 74
GP1(04h) 3, 1 NOPs: 14 74 74 74 / 14 74 74 74
GP1(04h) 3, 2 NOPs: 74 74 74 74 / 74 74 74 74
GP1(04h) 3, 4 NOPs: 74 74 74 74 / 74 74 74 74
GP1(04h) 3, 8 NOPs: 74 74 74 74 / 74 74 74 74
GP1(01h) after 100 words of A0h, 0 NOPs: 10 10 10 14 / 10 10 10 14
GP1(01h) after 100 words of A0h, 1 NOPs: 10 10 10 14 / 10 10 10 14
GP1(01h) after 100 words of A0h, 2 NOPs: 10 10 10 14 / 10 10 10 14
GP1(01h) after 100 words of A0h, 4 NOPs: 10 10 10 14 / 10 10 10 14
GP1(01h) after 100 words of A0h, 8 NOPs: 10 10 14 14 / 10 10 14 14
C0h reads of a 32x2 block at 0,300 whose pixel x,y is 1000h+100h*(y-300)+x: the words,
GPUSTAT, then three more GPUREAD loads.
C0h 1x1 at 0,300: 10011000; GPUSTAT 14062518; then 44444444 44444444 44444444
C0h 2x1 at 2,300: 10031002; GPUSTAT 14062518; then 44444444 44444444 44444444
C0h 3x1 at 4,300: 10051004 10071006; GPUSTAT 14062518; then 10051004 10051004 10051004
C0h 4x1 at 8,300: 10091008 100B100A; GPUSTAT 14062518; then 10091008 10091008 10091008
C0h 2x2 at 12,300: 100D100C 110D110C; GPUSTAT 14062518; then 100D100C 100D100C 100D100C
C0h 4x2 at 16,300: 10111010 10131012 11111110 11131112; GPUSTAT 14062518; then 10111010 10111010 10111010
Done.

02SMW.txt

===== 02 SMW F17 SEMI RECT WIDTHS | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
Semi-transparent rects (62h) w 1 to 17 and 32 by 64 rows at 0,256, and flat (60h) 1, 16
and 17 wide (row 34, G:104-111: 7.7 or 7.0 a row). Timer 2 to GPUSTAT bit 26, 4 samples.
Rect 62 1x64: 609 581 582 587, bit 28 at 144
Rect 62 2x64: 670 642 642 638, bit 28 at 134
Rect 62 3x64: 670 642 642 638, bit 28 at 134
Rect 62 4x64: 730 703 703 702, bit 28 at 134
Rect 62 5x64: 740 703 703 702, bit 28 at 134
Rect 62 6x64: 800 772 762 825, bit 28 at 139
Rect 62 7x64: 795 767 772 762, bit 28 at 134
Rect 62 8x64: 854 822 822 823, bit 28 at 134
Rect 62 9x64: 855 828 822 883, bit 28 at 134
Rect 62 10x64: 914 884 952 943, bit 28 at 134
Rect 62 11x64: 910 891 949 942, bit 28 at 134
Rect 62 12x64: 973 948 1019 1002, bit 28 at 134
Rect 62 13x64: 973 948 959 1003, bit 28 at 134
Rect 62 14x64: 1039 1073 1077 1069, bit 28 at 140
Rect 62 15x64: 1033 1003 1016 1011, bit 28 at 134
Rect 62 16x64: 1334 1377 1317 1304, bit 28 at 136
Rect 62 17x64: 1388 1377 1377 1317, bit 28 at 139
Rect 62 32x64: 2071 2099 2105 2102, bit 28 at 134
Rect 60 1x64: 435 407 397 402, bit 28 at 134
Rect 60 16x64: 799 763 757 766, bit 28 at 134
Rect 60 17x64: 790 768 761 778, bit 28 at 144
Done.

03LNS.txt

===== 03 LNS F17 LINES | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
Polylines of 2 to 16 horizontal segments of 8 and 32 pixels at y 300, gouraud (58h)
and flat (48h); rows over 16 words are paced by GPUSTAT.25 in dir 1; lines 40h (row 35).
Gouraud polyline 2 segments of 8, 7 words: 354 329 327 330, bit 28 at 264
Gouraud polyline 4 segments of 8, 11 words: 475 500 499 500, bit 28 at 433
Gouraud polyline 8 segments of 8, 19 words paced: 874 868 868 871, bit 28 at 871
Gouraud polyline 16 segments of 8, 35 words paced: 1479 1523 1519 1505, bit 28 at 1505
Gouraud polyline 2 segments of 32, 7 words: 365 332 332 332, bit 28 at 266
Gouraud polyline 4 segments of 32, 11 words: 479 504 507 500, bit 28 at 434
Gouraud polyline 8 segments of 32, 19 words paced: 924 875 934 874, bit 28 at 874
Gouraud polyline 16 segments of 32, 35 words paced: 1541 1509 1514 1512, bit 28 at 1512
Flat polyline 2 segments of 8, 5 words: 190 163 158 158, bit 28 at 158
Flat polyline 4 segments of 8, 7 words: 219 266 265 270, bit 28 at 182
Flat polyline 8 segments of 8, 11 words: 354 314 315 310, bit 28 at 310
Flat polyline 16 segments of 8, 19 words paced: 635 563 571 567, bit 28 at 567
Flat polyline 2 segments of 32, 5 words: 291 241 242 251, bit 28 at 168
Flat polyline 4 segments of 32, 7 words: 308 330 330 330, bit 28 at 264
Flat polyline 8 segments of 32, 11 words: 478 499 500 507, bit 28 at 441
Flat polyline 16 segments of 32, 19 words paced: 949 923 918 929, bit 28 at 863
Line 40h 64 pixels: 250 218 217 221, bit 28 at 138
Line 40h 128 pixels: 253 277 287 282, bit 28 at 139
Line 40h 256 pixels: 435 400 407 397, bit 28 at 134
Line 40h 512 pixels: 682 649 637 643, bit 28 at 134
Line 40h 1023 pixels: 1161 1193 1199 1182, bit 28 at 134
Line 50h 512 pixels: 711 716 711 716, bit 28 at 224
Done.

04TXM.txt

===== 04 TXM F17 TEXTURE MISSES | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
Textured quads 64 (2Ch) at u step 1 and 2, the 15 bit rect 64x64 (64h), and textured
triangles 64 (24h) at each depth at u step 1 and 2; all cold (row 36, G:136-145).
Rect 15 bit 64x64, cold: 11994 11918 11920 11914, bit 28 at 132
Quad 15 bit 64, u 0..63 v 0..63, cold: 13981 13952 13963 13954, bit 28 at 7225
Quad 15 bit 64, u 0..127 v 0..63, cold: 22614 22641 22629 22635, bit 28 at 11531
Quad 15 bit 64, u 0..127 v 0..127, cold: 22668 22631 22635 22640, bit 28 at 11539
Tri 4 bit 64, u 0..63 v 0..63, cold: 3868 3950 3824 3841, bit 28 at 252
Tri 4 bit 64, u 0..127 v 0..63, cold: 4895 4922 4913 4913, bit 28 at 246
Tri 8 bit 64, u 0..63 v 0..63, cold: 5195 4916 4916 4916, bit 28 at 242
Tri 8 bit 64, u 0..127 v 0..63, cold: 7193 7157 7158 7164, bit 28 at 304
Tri 15 bit 64, u 0..63 v 0..63, cold: 7193 7214 7158 7152, bit 28 at 242
Tri 15 bit 64, u 0..127 v 0..63, cold: 11497 11529 11538 11534, bit 28 at 308
Done.

05TXS.txt

===== 05 TXS F17 TEXTURED SEMI | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
Textured rects 64h and semi 66h 32, 64 and 128 wide by 64 at each depth, cold; then the
15 bit quad 64 plain (2Ch) and semi (2Eh) at u step 1 and 2 (row 37, G:147-152).
Rect 4 bit 32x64, cold: 2594 2514 2522 2513, bit 28 at 127
Semi rect 4 bit 32x64, cold: 3402 3424 3428 3427, bit 28 at 127
Rect 4 bit 64x64, cold: 4851 4874 4877 4875, bit 28 at 127
Semi rect 4 bit 64x64, cold: 6256 6280 6274 6269, bit 28 at 127
Rect 4 bit 128x64, cold: 9459 9490 9482 9488, bit 28 at 127
Semi rect 4 bit 128x64, cold: 11948 11970 11974 11972, bit 28 at 127
Rect 8 bit 32x64, cold: 4067 3787 3789 3849, bit 28 at 127
Semi rect 8 bit 32x64, cold: 4787 4821 4762 4757, bit 28 at 127
Rect 8 bit 64x64, cold: 7641 7430 7424 7426, bit 28 at 132
Semi rect 8 bit 64x64, cold: 9157 9187 9183 9190, bit 28 at 132
Rect 8 bit 128x64, cold: 14621 14642 14639 14639, bit 28 at 127
Semi rect 8 bit 128x64, cold: 17947 17914 17916 17914, bit 28 at 127
Rect 15 bit 32x64, cold: 6124 6142 6154 6092, bit 28 at 127
Semi rect 15 bit 32x64, cold: 7224 7244 7241 7243, bit 28 at 127
Rect 15 bit 64x64, cold: 11949 11972 11967 11972, bit 28 at 127
Semi rect 15 bit 64x64, cold: 13947 13974 13976 13988, bit 28 at 172
Rect 15 bit 128x64, cold: 23584 23556 23557 23551, bit 28 at 127
Semi rect 15 bit 128x64, cold: 27406 27376 27373 27430, bit 28 at 127
Quad 15 bit 64, u 0..63 v 0..63, cold: 13927 13942 13954 13953, bit 28 at 7158
Semi quad 15 bit 64, u 0..63 v 0..63, cold: 15772 15744 15750 15790, bit 28 at 8084
Quad 15 bit 64, u 0..127 v 0..63, cold: 22606 22823 22638 22641, bit 28 at 11534
Semi quad 15 bit 64, u 0..127 v 0..63, cold: 24770 24784 24721 24725, bit 28 at 12529
Done.

06FIL.txt

===== 06 FIL F17 LARGE FILLS | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
Fills 256x256, 512x256, 1024x256 (3F1h, gpu.txt:663-664) and 1024x511 (the most rows,
gpu.txt:665-667), display collapsed on and off, then live 640x240 (row 38, G:154-159).
Collapsed, on, fill 256x256 at 0,256: 5576 5560 5621 5555, bit 28 at 136
Collapsed, on, fill 512x256 at 0,256: 9768 9677 9739 9738, bit 28 at 139
Collapsed, on, fill 1024x256 at 0,256: 18032 17983 17985 17991, bit 28 at 139
Collapsed, on, fill 1024x511 at 0,0: 35847 35869 35812 35807, bit 28 at 139
Collapsed, off, fill 256x256 at 0,256: 5593 5551 5558 5564, bit 28 at 140
Collapsed, off, fill 512x256 at 0,256: 9758 9741 9733 9744, bit 28 at 134
Collapsed, off, fill 1024x256 at 0,256: 18021 17987 17991 17989, bit 28 at 134
Collapsed, off, fill 1024x511 at 0,0: 35854 35872 35872 35807, bit 28 at 139
Live 640x240, fill 256x256 at 0,256: 5596 5614 5552 5557, bit 28 at 140
Live 640x240, fill 512x256 at 0,256: 9715 9737 9739 9738, bit 28 at 139
Live 640x240, fill 1024x256 at 0,256: 18021 18047 18345 20292, bit 28 at 139
Live 640x240, fill 1024x511 at 0,0: 40397 40365 40353 40241, bit 28 at 134
Done.

07CPY.txt

===== 07 CPY F17 COPIES | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
Copies 64 to 512 wide by 120 from source X 0 and 1 (row 39); 1x1 to 16x16 (row 45);
128 to 1024 wide by 1 row, the pixels at 126-131 and at the end read back (row 49).
Copy 64x120 from 0,256 to 512,384: 11292 11269 11213 11209, bit 28 at 151
Copy 64x120 from 1,256 to 512,384: 11364 11331 11327 11329, bit 28 at 151
Copy 128x120 from 0,256 to 512,384: 19664 19630 19630 19632, bit 28 at 151
Copy 128x120 from 1,256 to 512,384: 19788 19817 19757 19750, bit 28 at 146
Copy 192x120 from 0,256 to 512,384: 30999 30969 31096 30984, bit 28 at 187
Copy 192x120 from 1,256 to 512,384: 31256 31214 31211 31210, bit 28 at 146
Copy 256x120 from 0,256 to 512,384: 39490 39457 39461 39457, bit 28 at 146
Copy 256x120 from 1,256 to 512,384: 39803 39891 39767 39772, bit 28 at 190
Copy 320x120 from 0,256 to 512,384: 50770 50729 50729 50793, bit 28 at 150
Copy 320x120 from 1,256 to 512,384: 51140 51167 51157 51156, bit 28 at 146
Copy 384x120 from 0,256 to 512,384: 59314 59351 59278 59278, bit 28 at 146
Copy 384x120 from 1,256 to 512,384: 59740 59771 59771 59646, bit 28 at 147
Copy 448x120 from 0,256 to 512,384: 70620 70601 70457 70519, bit 28 at 147
Copy 448x120 from 1,256 to 512,384: 70912 70943 70938 71061, bit 28 at 151
Copy 512x120 from 0,256 to 512,384: 79097 79070 79065 79009, bit 28 at 146
Copy 512x120 from 1,256 to 512,384: 79590 79673 79509 79499, bit 28 at 156
Copy 1x1 from 0,256 to 256,384: 180 234 148 146, bit 28 at 146
Copy 2x1 from 0,256 to 256,384: 184 151 146 147, bit 28 at 147
Copy 4x1 from 0,256 to 256,384: 184 151 151 146, bit 28 at 146
Copy 8x1 from 0,256 to 256,384: 178 146 150 148, bit 28 at 148
Copy 16x1 from 0,256 to 256,384: 182 151 151 146, bit 28 at 146
Copy 16x2 from 0,256 to 256,384: 266 234 231 233, bit 28 at 150
Copy 16x16 from 0,256 to 256,384: 757 779 777 773, bit 28 at 146
Source row 300: pixel x is (37x+155h) AND 7FFFh. Each copy goes to row 310, cleared first.
Copy 128x1 from 0,300: 284 289 293 291, bit 28 at 148
  126-131 got 138B 13B0 0000 0000 0000 0000 want 138B 13B0 0000 0000 0000 0000; 126-129 got 138B 13B0 0000 0000 want 138B 13B0 0000 0000
Copy 128x1 from 1,300: 318 295 290 293, bit 28 at 150
  126-131 got 13B0 13D5 0000 0000 0000 0000 want 13B0 13D5 0000 0000 0000 0000; 126-129 got 13B0 13D5 0000 0000 want 13B0 13D5 0000 0000
Copy 129x1 from 0,300: 305 293 294 289, bit 28 at 146
  126-131 got 138B 13B0 13D5 0000 0000 0000 want 138B 13B0 13D5 0000 0000 0000; 127-130 got 13B0 13D5 0000 0000 want 13B0 13D5 0000 0000
Copy 129x1 from 1,300: 304 290 299 293, bit 28 at 146
  126-131 got 13B0 13D5 13FA 0000 0000 0000 want 13B0 13D5 13FA 0000 0000 0000; 127-130 got 13D5 13FA 0000 0000 want 13D5 13FA 0000 0000
Copy 192x1 from 0,300: 365 413 413 414, bit 28 at 146
  126-131 got 138B 13B0 13D5 13FA 141F 1444 want 138B 13B0 13D5 13FA 141F 1444; 190-193 got 1CCB 1CF0 0000 0000 want 1CCB 1CF0 0000 0000
Copy 192x1 from 1,300: 364 408 409 359, bit 28 at 146
  126-131 got 13B0 13D5 13FA 141F 1444 1469 want 13B0 13D5 13FA 141F 1444 1469; 190-193 got 1CF0 1D15 0000 0000 want 1CF0 1D15 0000 0000
Copy 256x1 from 0,300: 485 474 530 480, bit 28 at 191
  126-131 got 138B 13B0 13D5 13FA 141F 1444 want 138B 13B0 13D5 13FA 141F 1444; 254-257 got 260B 2630 0000 0000 want 260B 2630 0000 0000
Copy 256x1 from 1,300: 485 475 470 480, bit 28 at 151
  126-131 got 13B0 13D5 13FA 141F 1444 1469 want 13B0 13D5 13FA 141F 1444 1469; 254-257 got 2630 2655 0000 0000 want 2630 2655 0000 0000
Copy 384x1 from 0,300: 605 591 591 656, bit 28 at 146
  126-131 got 138B 13B0 13D5 13FA 141F 1444 want 138B 13B0 13D5 13FA 141F 1444; 382-385 got 388B 38B0 0000 0000 want 388B 38B0 0000 0000
Copy 384x1 from 1,300: 601 600 599 592, bit 28 at 146
  126-131 got 13B0 13D5 13FA 141F 1444 1469 want 13B0 13D5 13FA 141F 1444 1469; 382-385 got 38B0 38D5 0000 0000 want 38B0 38D5 0000 0000
Copy 1024x1 from 0,300: 1459 1441 1438 1447, bit 28 at 156
  126-131 got 138B 13B0 13D5 13FA 141F 1444 want 138B 13B0 13D5 13FA 141F 1444; 1020-1023 got 14C1 14E6 150B 1530 want 14C1 14E6 150B 1530
Done.

08BTB.txt

===== 08 BTB F17 BACK TO BACK | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
Rects 1x1 fixed (68h) and fills 16x1 written in one burst, each at its own X; bursts of
more than 16 words are paced by GPUSTAT.25 in dir 1 (row 40, G:167-171).
1 rects 1x1, 2 words: 181 122 127 127, bit 28 at 127
2 rects 1x1, 4 words: 199 146 146 147, bit 28 at 147
4 rects 1x1, 8 words: 247 199 194 194, bit 28 at 194
8 rects 1x1, 16 words: 347 290 290 295, bit 28 at 295
16 rects 1x1, 32 words paced: 936 860 860 860, bit 28 at 860
1 fills 16x1, 3 words: 178 134 134 135, bit 28 at 135
2 fills 16x1, 6 words: 207 175 175 175, bit 28 at 175
4 fills 16x1, 12 words: 274 242 247 243, bit 28 at 243
5 fills 16x1, 15 words: 320 278 290 287, bit 28 at 287
8 fills 16x1, 24 words paced: 710 676 680 676, bit 28 at 676
8 rects 1x1, 16 words, each paced: 489 499 495 489, bit 28 at 489
Done.

09S03.txt

===== 09 S03 F17 GP0 03H LOW NIBBLE | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
GP0(03h) with the low nibble 0, 1, 2, 4, 8, F, then rect 3x128, rect 512x128 and fill
256x256, two samples each (row 41, G:173-176). Ends with GP0(03h)=00 again.
GP0(03h)=000000: rect 3x128 789 826, bit 28 at 134
 rect 512x128 35693 35631, bit 28 at 134
 fill 256x256 6224 6282, bit 28 at 134
GP0(03h)=000001: rect 3x128 769 712, bit 28 at 139
 rect 512x128 35805 35814, bit 28 at 134
 fill 256x256 6278 6285, bit 28 at 140
GP0(03h)=000002: rect 3x128 766 822, bit 28 at 134
 rect 512x128 35985 35982, bit 28 at 134
 fill 256x256 6270 6283, bit 28 at 134
GP0(03h)=000004: rect 3x128 1011 1064, bit 28 at 138
 rect 512x128 33818 33751, bit 28 at 139
 fill 256x256 5793 5736, bit 28 at 134
GP0(03h)=000008: rect 3x128 1553 1557, bit 28 at 139
 rect 512x128 34294 34296, bit 28 at 139
 fill 256x256 6765 6769, bit 28 at 134
GP0(03h)=00000F: rect 3x128 2472 2462, bit 28 at 134
 rect 512x128 35197 35201, bit 28 at 134
 fill 256x256 8583 8587, bit 28 at 134
GP0(03h)=000000: rect 3x128 707 712, bit 28 at 144
 rect 512x128 33262 33267, bit 28 at 134
 fill 256x256 5798 5565, bit 28 at 175
Done.

10A0W.txt

===== 10 A0W F17 A0H DATA WORDS | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
A0h 16x16 (128 words) by CPU stores, dir 0: GPUSTAT bits 24-30 after words 1 to 128,
back to back, then with 64 cached NOPs before each read; three runs (row 44, G:198-203).
Back to back, run 1, after 1 2 4 8 16 32 64 128: 10 10 10 10 10 10 10 14
Back to back, run 2, after 1 2 4 8 16 32 64 128: 10 10 10 10 10 10 10 14
Back to back, run 3, after 1 2 4 8 16 32 64 128: 10 10 10 10 10 10 10 14
64 NOPs first, run 1, after 1 2 4 8 16 32 64 128: 10 10 10 10 10 10 10 14
64 NOPs first, run 2, after 1 2 4 8 16 32 64 128: 10 10 10 10 10 10 10 14
64 NOPs first, run 3, after 1 2 4 8 16 32 64 128: 10 10 10 10 10 10 10 14
Cycles from the nth word until GPUSTAT bit 28 (and 26) read set, polled:
n 1: 109; 71; 71;
n 8: 103; 71; 71;
n 64: 99; 71; 71;
n 127: 98; 71; 71;
n 128: 99 (26 27); 71 (26 27); 71 (26 27);
Done.

11GED.txt

===== 11 GED F17 GOURAUD EDGES | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
Gouraud triangles as gpuprim GTS draws them (row 47, C:41): every drawn pixel of r 4 a
12; for the larger ones each row's first and last pixel and the centre row whole.
d0 r 4 a 12, box 122,374 13x13, vertices 130,384 131,377 124,380
 y 378: 02C9 0B24 (from x 129)
 y 379: 0592 0DED 1648 1E83 (from x 127)
 y 380: 001F 085B 10B6 1911 216C 29A7 3202 (from x 124)
 y 381: 2435 2C90 34CB 3D26 4582 (from x 126)
 y 382: 3C10 484B 50A6 5901 (from x 127)
 y 383: 6425 6C80 (from x 129)
d0 r 13 a 0, box 113,365 31x31, vertices 141,380 122,391 122,369
 y 370: x 122 003E, x 123 041D
 y 371: x 122 005D, x 125 141A
 y 372: x 122 009B, x 127 2017
 y 373: x 122 00BA, x 128 2815
 y 374: x 122 00F8, x 130 3411
 y 375: x 122 0117, x 132 400E
 y 376: x 122 0155, x 134 500B
 y 377: x 122 0174, x 135 5409
 y 378: x 122 01B2, x 137 6406
 y 379: x 122 01D1, x 139 7003
 y 380: x 122 01F0, x 140 7800
 y 381: x 122 022E, x 139 7060
 y 382: x 122 024D, x 137 64C0
 y 383: x 122 028B, x 135 5520
 y 384: x 122 02AA, x 134 5160
 y 385: x 122 02E8, x 132 41C0
 y 386: x 122 0307, x 130 3620
 y 387: x 122 0345, x 128 2AA0
 y 388: x 122 0364, x 127 22E0
 y 389: x 122 03A2, x 125 1740
 y 390: x 122 03C1, x 123 07A0
 row 380: - - - - - - - - - 01F0 05EF 0DCE 15AD 198C 216B 294A 2D4A 3529 3D08 40E7 48C6 50A5 54A5 5C84 6463 6842 7021 7800 - - -
d0 r 13 a 8, box 113,365 31x31, vertices 137,389 116,384 132,368
 y 369: x 131 005D, x 132 041E
 y 370: x 130 009B, x 132 081C
 y 371: x 129 00D9, x 132 0C3B
 y 372: x 128 0117, x 132 1039
 y 373: x 127 0155, x 133 1C18
 y 374: x 126 0193, x 133 2016
 y 375: x 125 01D1, x 133 2435
 y 376: x 124 020F, x 133 2C33
 y 377: x 123 022E, x 134 3412
 y 378: x 122 026C, x 134 3810
 y 379: x 121 02AA, x 134 3C2F
 y 380: x 120 02E8, x 134 442D
 y 381: x 119 0326, x 135 4C0C
 y 382: x 118 0364, x 135 500A
 y 383: x 117 03A2, x 135 5808
 y 384: x 116 03E0, x 135 5C27
 y 385: x 121 1F00, x 136 6406
 y 386: x 125 3640, x 136 6C04
 y 387: x 129 4D80, x 136 7002
 y 388: x 133 64C0, x 136 7421
 row 380: - - - - - - - 02E8 06C8 0A88 0E69 1229 19E9 1DCA 218A 256B 2D2B 30EB 34CC 388C 3C6D 442D - - - - - - - - -
d0 r 34 a 0, box 92,344 73x73, vertices 162,380 112,410 112,350
 y 351: x 112 001F, x 113 001F
 y 352: x 112 003E, x 115 041D
 y 353: x 112 003E, x 116 081D
 y 354: x 112 005D, x 118 0C1B
 y 355: x 112 005D, x 120 141A
 y 356: x 112 007C, x 121 1419
 y 357: x 112 007C, x 123 1C18
 y 358: x 112 009B, x 125 2017
 y 359: x 112 009B, x 126 2016
 y 360: x 112 00BA, x 128 2815
 y 361: x 112 00BA, x 130 2C14
 y 362: x 112 00D9, x 131 3013
 y 363: x 112 00D9, x 133 3412
 y 364: x 112 00F8, x 135 3811
 y 365: x 112 0117, x 136 3C10
 y 366: x 112 0117, x 138 400F
 y 367: x 112 0136, x 140 440D
 y 368: x 112 0136, x 141 480D
 y 369: x 112 0155, x 143 4C0B
 y 370: x 112 0155, x 145 540A
 y 371: x 112 0174, x 146 5409
 y 372: x 112 0174, x 148 5C08
 y 373: x 112 0193, x 150 6007
 y 374: x 112 0193, x 151 6006
 y 375: x 112 01B2, x 153 6805
 y 376: x 112 01B2, x 155 6C04
 y 377: x 112 01D1, x 156 7003
 y 378: x 112 01D1, x 158 7402
 y 379: x 112 01F0, x 160 7801
 y 380: x 112 0210, x 161 7C00
 y 381: x 112 020F, x 160 7820
 y 382: x 112 022E, x 158 7440
 y 383: x 112 022E, x 156 7060
 y 384: x 112 024D, x 155 6C80
 y 385: x 112 024D, x 153 68A0
 y 386: x 112 026C, x 151 60C0
 y 387: x 112 026C, x 150 60E0
 y 388: x 112 028B, x 148 5D00
 y 389: x 112 028B, x 146 5520
 y 390: x 112 02AA, x 145 5540
 y 391: x 112 02AA, x 143 4D60
 y 392: x 112 02C9, x 141 49A0
 y 393: x 112 02C9, x 140 45A0
 y 394: x 112 02E8, x 138 41E0
 y 395: x 112 02E8, x 136 3E00
 y 396: x 112 0307, x 135 3A20
 y 397: x 112 0326, x 133 3640
 y 398: x 112 0326, x 131 3260
 y 399: x 112 0345, x 130 2E80
 y 400: x 112 0345, x 128 2AA0
 y 401: x 112 0364, x 126 22C0
 y 402: x 112 0364, x 125 22E0
 y 403: x 112 0383, x 123 1F00
 y 404: x 112 0383, x 121 1720
 y 405: x 112 03A2, x 120 1740
 y 406: x 112 03A2, x 118 0F60
 y 407: x 112 03C1, x 116 0BA0
 y 408: x 112 03C1, x 115 07A0
 y 409: x 112 03E0, x 113 03E0
 row 380: - - - - - - - - - - - - - - - - - - - - 0210 01EF 05EF 05EF 09CE 0DCE 0DCE 11AD 15AD 15AD 198C 1D8C 1D8C 216B 216B 256B 294A 294A 2D4A 3129 3129 3529 3908 3908 3D08 3D08 40E7 44E7 44E7 48C6 4CC6 4CC6 50A5 54A5 54A5 5884 5C84 5C84 6063 6063 6463 6842 6842 6C42 7021 7021 7421 7821 7800 7C00 - - -
d1 r 13 a 0, box 113,365 31x31, vertices 141,380 122,391 122,369
 y 370: x 122 003D, x 123 041D
 y 371: x 122 007D, x 125 101A
 y 372: x 122 009B, x 127 2017
 y 373: x 122 00DA, x 128 2835
 y 374: x 122 00D8, x 130 3011
 y 375: x 122 0137, x 132 440F
 y 376: x 122 0135, x 134 4C0B
 y 377: x 122 0194, x 135 5409
 y 378: x 122 0192, x 137 6406
 y 379: x 122 01D1, x 139 7002
 y 380: x 122 01EF, x 140 7400
 y 381: x 122 022E, x 139 7060
 y 382: x 122 024C, x 137 64C0
 y 383: x 122 028B, x 135 5520
 y 384: x 122 02A9, x 134 4D60
 y 385: x 122 02E9, x 132 45E0
 y 386: x 122 0306, x 130 3220
 y 387: x 122 0346, x 128 2AA1
 y 388: x 122 0364, x 127 22E0
 y 389: x 122 03A3, x 125 1340
 y 390: x 122 03A1, x 123 07A0
 row 380: - - - - - - - - - 01EF 05EF 09AD 15AD 198C 216B 254A 2D4A 3508 3D08 40E7 48C6 4CA5 54A5 5C63 6463 6842 7021 7400 - - -
Done.

12DSP.txt

===== 12 DSP F17 DISPLAY LOAD PATHS | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
640x240 set by GP1(05h)-(08h) directly (13HDM's way) and by PutDispEnv (12GDS's way):
the spans each gives, then fill and sprite at VSync + 0 and + 100000 (row 42, G:178-184).
Collapsed, VSync + 0, fill 512x256: 9768 9752 9753 9743
Collapsed, VSync + 0, 15 bit sprite 256x128 cold: 93559 93550 93542 93570
Collapsed, VSync + 100000, fill 512x256: 9753 9750 9745 9743
Collapsed, VSync + 100000, 15 bit sprite 256x128 cold: 93499 93494 93542 93492
GP1 direct: 05000000 06C6C26C 07040010 08000003, GP1(03h) 0
 GPUSTAT 14062518
 T0 system clock counting in hblank only (sync 2): max 532 min 0, 1 of 1296 reads at max
 T1 hblanks counting in vblank only (sync 2): max 122 min 0, 16 of 19168 reads at max
 Frames:
 cycles IRQ0 to IRQ0: 566133 566181 566114
 hblank ticks: 263 263 263
 GPUSTAT at IRQ0: 14062518 14062518 14062518
GP1 direct, VSync + 0, fill 512x256: 9770 9744 9750 9749
GP1 direct, VSync + 0, 15 bit sprite 256x128 cold: 98473 98460 98465 98470
GP1 direct, VSync + 100000, fill 512x256: 10969 10963 10959 10955
GP1 direct, VSync + 100000, 15 bit sprite 256x128 cold: 103068 103075 103078 103082
PutDispEnv: disp 0,0 640x240, screen 0,0 0x0, isinter 0, isrgb24 0
 GPUSTAT 94062518
 T0 system clock counting in hblank only (sync 2): max 534 min 0, 1 of 1296 reads at max
 T1 hblanks counting in vblank only (sync 2): max 23 min 0, 16 of 19132 reads at max
 Frames:
 cycles IRQ0 to IRQ0: 435004 none(4294906312) 495983
 hblank ticks: 263 2 261
 GPUSTAT at IRQ0: 14062518 14062518 14062518
PutDispEnv, VSync + 0, fill 512x256: 9758 9747 9749 9751
PutDispEnv, VSync + 0, 15 bit sprite 256x128 cold: 98468 98467 98471 98459
PutDispEnv, VSync + 100000, fill 512x256: 10972 10959 10963 10961
PutDispEnv, VSync + 100000, 15 bit sprite 256x128 cold: 103066 103080 103090 103073
Done.

13B31.txt

===== 13 B31 F17 GPUSTAT BIT 31 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
GPUSTAT bit 31 against timer 1 counting hblanks (row 48, C:43): 600 pairs read back to
back (index:T1/bit 31 at each change), and its first 24 changes after an IRQ0.
640x240 (GP1(08h) 03h):
 11008 cycles: 0:732/0 114:733/0 231:734/0 349:735/0 467:736/0 584:737/0
 10976 cycles: 0:763/1 5:763/0 115:764/0 123:764/1 233:765/1 241:765/0 351:766/0 359:766/1 469:767/1 476:767/0 586:768/0 594:768/1
 10981 cycles: 0:806/0 5:806/1 115:807/1 123:807/0 233:808/0 241:808/1 351:809/1 358:809/0 468:810/0 476:810/1 586:811/1 594:811/0
 from an IRQ0 (bit 31 0 there), each change as cycles after it/T1/cycles since T1 moved: 51617/1015/80 53777/1016/158 55913/1017/80 58127/1018/158 60265/1019/158 62401/1020/158 64539/1021/158 66675/1022/80 68891/1023/158 71027/1024/158 73165/1025/158 75301/1026/158 77439/1027/80 79653/1028/158 81791/1029/158 83927/1030/158 86065/1031/158 88223/1032/158 90361/1033/80 92499/1034/80 94713/1035/158 96851/1036/158 98992/1037/163 101125/1038/80
 from an IRQ0 (bit 31 0 there), each change as cycles after it/T1/cycles since T1 moved: 51556/1278/80 53709/1279/85 55920/1280/158 58061/1281/163 60194/1282/158 62330/1283/80 64468/1284/80 66682/1285/158 68820/1286/158 70956/1287/158 73094/1288/80 75308/1289/158 77446/1290/158 79582/1291/158 81720/1292/158 83856/1293/80 85994/1294/80 88208/1295/158 90346/1296/158 92482/1297/158 94620/1298/80 96756/1299/80 98972/1300/158 101134/1301/158
640x480 interlaced (GP1(08h) 27h):
 10987 cycles: 0:405/0 115:406/0 232:407/0 350:408/0 468:409/0 586:410/0
 10986 cycles: 0:436/0 115:437/0 233:438/0 350:439/0 468:440/0 586:441/0
 10980 cycles: 0:467/0 115:468/0 233:469/0 351:470/0 468:471/0 586:472/0
 from an IRQ0 (bit 31 0 there), each change as cycles after it/T1/cycles since T1 moved: 49460/684/158 566104/924/184 1179566/1209/158
 from an IRQ0 (bit 31 0 there), each change as cycles after it/T1/cycles since T1 moved: 613434/1734/158 1130066/1974/158
Done.

14TMR.txt

===== 14 TMR F17 TIMERS AND FRAMES | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
T0 paused in hblank over 1 to 16 lines at 256 wide; T1 sync 0-3 at three Y ranges; the
640/vres frame; bit 13 after GP1(08h) 27h at 8 points of a frame (row 50, #135, C:92-97).
256 wide 240 lines, range 590-3150 (03GLN's first mode):
 T0 dotclock paused in hblank, over 1 ticks: 255 254 255
 T0 dotclock paused in hblank, over 2 ticks: 510 510 510
 T0 dotclock paused in hblank, over 4 ticks: 1020 1020 1020
 T0 dotclock paused in hblank, over 8 ticks: 2041 2040 2041
 T0 dotclock paused in hblank, over 16 ticks: 4082 4080 4079
 T0 system clock paused in hblank, over 1 ticks: 1614 1613 1613
 T0 system clock paused in hblank, over 2 ticks: 3228 3228 3227
 T0 system clock paused in hblank, over 4 ticks: 6456 6456 6455
 T0 system clock paused in hblank, over 8 ticks: 12910 12911 12912
 T0 system clock paused in hblank, over 16 ticks: 25821 25820 25820
320 wide, Y1 16 Y2 256:
 T1 hblank sync 0 (paused in vblank), IRQ0 to IRQ0: 239 239 239
 T1 hblank sync 1 (reset at vblank), read at IRQ0: 237 237 237
 T1 hblank sync 2 (reset at vblank, counts in it): max 23 min 0, 17 of 19436 reads at max
 T1 hblank sync 3 set after IRQ0: 20000 on, next IRQ0, one after, mode: 0 238 501 263
320 wide, Y1 40 Y2 200:
 T1 hblank sync 0 (paused in vblank), IRQ0 to IRQ0: 159 159 159
 T1 hblank sync 1 (reset at vblank), read at IRQ0: 157 157 157
 T1 hblank sync 2 (reset at vblank, counts in it): max 95 min 0, 16 of 19240 reads at max
 T1 hblank sync 3 set after IRQ0: 20000 on, next IRQ0, one after, mode: 0 158 421 263
320 wide, Y1 100 Y2 110:
 T1 hblank sync 0 (paused in vblank), IRQ0 to IRQ0: 9 9 9
 T1 hblank sync 1 (reset at vblank), read at IRQ0: 7 7 7
 T1 hblank sync 2 (reset at vblank, counts in it): max 246 min 0, 17 of 18836 reads at max
 T1 hblank sync 3 set after IRQ0: 20000 on, next IRQ0, one after, mode: 0 8 271 263
640 wide, GP1(08h) 03h (reference):
 cycles IRQ0 to IRQ0: 435027 369462 435010 500708 500540 435009
 hblank ticks: 263 263 263 263 263 263
 GPUSTAT at IRQ0: 14062518 14062518 14062518 14062518 14062518 14062518
640 wide, vertical resolution bit set, interlace off, GP1(08h) 07h:
 cycles IRQ0 to IRQ0: 565002 564921 564915 565015 564897 565054
 hblank ticks: 0 0 0 0 0 0
 GPUSTAT at IRQ0: 140E0518 140E0518 140E0518 140E0518 140E0518 140E0518
640 wide, vertical resolution bit set, interlace on, GP1(08h) 27h:
 cycles IRQ0 to IRQ0: 566123 564058 566013 564076 566123 563932
 hblank ticks: 263 262 263 262 263 262
 GPUSTAT at IRQ0: 144E0518 144E2518 144E0518 144E2518 144E0518 144E2518
GP1(08h) 27h written p*70000 cycles after an IRQ0 from 03h: GPUSTAT bit 13 at once, then
at the next four IRQ0s; three runs:
p 0: 0/1010 0/1010 0/1010
p 1: 0/0101 1/1010 0/0101
p 2: 1/1010 0/0101 1/1010
p 3: 0/0101 1/1010 0/0101
p 4: 1/1010 0/0101 1/1010
p 5: 0/0101 1/1010 0/0101
p 6: 1/1010 0/0101 1/1010
p 7: 0/0101 1/1010 0/0101
Done.

15H03.txt

===== 15 H03 F17 GP0 03H HIGH BITS | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
GP0(03h) with bits 4-23 set and the low nibble 0, 1, 2, 4, 8, F (other-commands.txt:
16-20: purpose unknown, so each may hang; saved before each). Ends with GP0(03h)=00.
GP0(03h)=FFFFF0: rect 3x128 192 134, bit 28 at 134
 rect 512x128 134 135, bit 28 at 135
 fill 256x256 5558 5612, bit 28 at 138
GP0(03h)=FFFFF1: rect 3x128 192 139, bit 28 at 139
 rect 512x128 134 135, bit 28 at 135
 fill 256x256 5558 5552, bit 28 at 138
GP0(03h)=FFFFF2: rect 3x128 197 140, bit 28 at 140
 rect 512x128 134 134, bit 28 at 134
 fill 256x256 5619 5616, bit 28 at 134
GP0(03h)=FFFFF4: rect 3x128 188 134, bit 28 at 134
 rect 512x128 134 138, bit 28 at 138
 fill 256x256 5739 5739, bit 28 at 137
GP0(03h)=FFFFF8: rect 3x128 192 139, bit 28 at 139
 rect 512x128 134 135, bit 28 at 135
 fill 256x256 6776 6763, bit 28 at 134
GP0(03h)=FFFFFF: rect 3x128 192 140, bit 28 at 140
 rect 512x128 134 144, bit 28 at 144
 fill 256x256 8599 8585, bit 28 at 134
GP0(03h)=000000: rect 3x128 143 134, bit 28 at 134
 rect 512x128 143 139, bit 28 at 139
 fill 256x256 5615 5555, bit 28 at 136
Done.

16DBK.txt

===== 16 DBK F17 A0H DMA BLOCK 1024 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
A0h 64x32 by DMA2, dir 2, SyncMode 1, one block of 1024 words (gpu.txt:1049: blocks over
10h do not work), 16 times, read back by C0h: wrong words and the first (row 43, G:192-196).
Run  1: channel done 1215, idle 1328, wrong words 0
Run  2: channel done 1219, idle 1331, wrong words 0
Run  3: channel done 1215, idle 1333, wrong words 0
Run  4: channel done 1225, idle 1337, wrong words 35 first 962 got 007A0036 want 004A00E6
Run  5: channel done 1220, idle 1332, wrong words 0
Run  6: channel done 1220, idle 1332, wrong words 0
Run  7: channel done 1220, idle 1332, wrong words 0
Run  8: channel done 1220, idle 1337, wrong words 0
Run  9: channel done 1225, idle 1337, wrong words 0
Run 10: channel done 1215, idle 1328, wrong words 0
Run 11: channel done 1225, idle 1337, wrong words 0
Run 12: channel done 1220, idle 1332, wrong words 0
Run 13: channel done 1220, idle 1332, wrong words 0
Run 14: channel done 1225, idle 1338, wrong words 27 first 210 got 00B400CC want 0084007C
Run 15: channel done 1215, idle 1328, wrong words 0
Run 16: channel done 1225, idle 1337, wrong words 0
Done.

17OVR.txt

===== 17 OVR F17 GP0 FIFO OVERRUN | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
followup.c's zigzag polyline (48h, red, vertices x 0.., y 440/443) of n GP0 stores with
no wait: the FIFO holds 16 (gpu.txt:281). Box nx4 read back, pixels drawn (row 46).
34 stores, run 1: stores took 465, idle 812, 64 of 136 drawn
34 stores, run 2: stores took 476, idle 823, 64 of 136 drawn
34 stores, run 3: stores took 475, idle 891, 64 of 136 drawn
42 stores, run 1: stores took 561, idle none, 65 of 168 drawn
42 stores, run 2: stores took 570, idle none, 66 of 168 drawn
42 stores, run 3: stores took 562, idle none, 64 of 168 drawn
50 stores, run 1: stores took 659, idle none, 80 of 200 drawn
50 stores, run 2: stores took 666, idle none, 75 of 200 drawn
50 stores, run 3: stores took 661, idle none, 81 of 200 drawn
64 stores, run 1: stores took 834, idle none, 81 of 256 drawn
64 stores, run 2: stores took 829, idle none, 81 of 256 drawn
64 stores, run 3: stores took 832, idle none, 80 of 256 drawn
80 stores, run 1: stores took 1035, idle 1257, 105 of 320 drawn
80 stores, run 2: stores took 1029, idle 1253, 111 of 320 drawn
80 stores, run 3: stores took 1028, idle 1251, 111 of 320 drawn
Done.

5 October 2026

00RUN.txt

===== 00 RUN | BIOS 19951204 System ROM Version 3.0 11/18/96 A
1 tests
A chain program, linked at 80010000
Saved on the card in slot 2, from image 1
COP0 at start: BPC 00000000 BDA 00000000 TAR BFC02BAC DCIC 00000000 BadVaddr 00000480 BDAM 00000000
BPCM 00000000 SR 40000000 Cause 00000020 EPC 8010E9D0 PRId 00000002

01CPW.txt

===== 01 CPW F17 WIDE AND ONE-ROW COPIES | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
Copies 576 to 1024 wide by 120 (row 117), timed as CPY times them; then one-row copies
with timer 2 either side of a one-read GPUSTAT loop, GP0(00h) in the same loop first.
Copy 576x120 from 0,256 to 0,384: 97167 96884 97129 96954, bit 28 at 175
Copy 640x120 from 0,256 to 0,384: 99275 99106 99027 99024, bit 28 at 181
Copy 768x120 from 0,256 to 0,384: 119348 119217 119243 119207, bit 28 at 176
Copy 896x120 from 0,256 to 0,384: 139185 139052 139198 139052, bit 28 at 181
Copy 1024x120 from 0,256 to 0,384: 158948 158938 159020 158947, bit 28 at 175
GP0(00h) alone, tight loop: 72 (0) 61 (0) 62 (0) 61 (0)
Copy 1x1 from 0,300 to 0,310, tight loop: 119 (1) 116 (1) 114 (1) 118 (1)
Copy 16x1 from 0,300 to 0,310, tight loop: 140 (3) 140 (3) 144 (3) 153 (4)
Copy 128x1 from 0,300 to 0,310, tight loop: 257 (12) 257 (12) 257 (12) 259 (12)
Copy 384x1 from 0,300 to 0,310, tight loop: 588 (37) 582 (37) 582 (37) 587 (37)
Copy 512x1 from 0,300 to 0,310, tight loop: 751 (50) 751 (50) 755 (50) 756 (50)
Copy 1024x1 from 0,300 to 0,310, tight loop: 1414 (101) 1427 (102) 1414 (101) 1419 (101)
Done.

References

  1. ^ a b SCPH-5501 output: followup17/02SMW.txt

  2. ^ a b SCPH-5501 output: followup17/03LNS.txt

  3. ^ a b c SCPH-5501 output: followup17/17OVR.txt

  4. ^ a b c d SCPH-5501 output: followup17/01SGR.txt

  5. ^ a b SCPH-5501 output: followup17/16DBK.txt

  6. ^ SCPH-5501 output: followup17/10A0W.txt

  7. ^ SCPH-5501 output: followup17/08BTB.txt

  8. ^ SCPH-5501 output: followup17/04TXM.txt

  9. ^ SCPH-5501 output: followup17/05TXS.txt

  10. ^ SCPH-5501 output: followup17/06FIL.txt

  11. ^ SCPH-5501 output: followup17/07CPY.txt

  12. ^ SCPH-5501 output: followup17w/01CPW.txt

  13. ^ SCPH-5501 output: followup17/09S03.txt

  14. ^ SCPH-5501 output: followup17/15H03.txt

  15. ^ SCPH-5501 output: followup17/12DSP.txt

  16. ^ SCPH-5501 output: followup17/13B31.txt

  17. ^ SCPH-5501 output: followup17/14TMR.txt

Categories: Hardware tests