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Graphics Processing Unit (GPU)

Drawing processor and display controller of the PlayStation.

Overview

In the PlayStation there is the GPU (the graphics drawing processor) and the GTE (the geometry transform engine). The GPU is equipped with a CRTC function for screen display and a high-speed polygon and sprite drawing function for the frame buffer, while the GTE carries out high-speed calculation of coordinate data and light source data as the CPU coprocessor.1 The GPU and the GTE connect to the CPU as shown in System Architecture.

The basic principle of the graphics system is that the CPU transfers texture images and color palettes (CLUTs) to the frame buffer and then causes the GPU to draw polygons from the coordinates and colors that the GTE computes.2 The GPU draws by executing strings of instructions (primitives) stored in main memory, and the data structures of the libgpu library correspond closely to the primitives that the GPU hardware recognizes.3

The GPU has the following drawing functions:4

Table 1: GPU drawing capabilities
Name Description
Sprite drawing 1 x 1 to 256 x 256 pixels. 4-bit CLUT (16 colors per sprite), 8-bit CLUT (256 colors per sprite) or 15-bit direct (32,768 colors per sprite).
Polygon drawing Flat shading. Gouraud shading. Texture mapping.
Line drawing Gradation.
Image transfer CPU to frame buffer. Frame buffer to CPU. Frame buffer to frame buffer.
Other Blending (translucency). Dithering. Clipping. Offset specification.

Reference Pages

The GPU is described in detail on the following pages:

Table 2: GPU pages
Page Content
GP0 Drawing Commands Polygon, line and rectangle commands, vertex and color attributes, drawing rules
GP0 Environment Commands GP0(E1h) to GP0(E6h): texture page, texture window, drawing area, offset, mask bit
GP0 Transfer and Other Commands Fill, VRAM copies, cache clear, interrupt request, NOP
GP1 Display Control Commands Reset, display enable, DMA direction, display area and range, display mode
GPUSTAT and GPUREAD Status register bits, ready bits, interlace field
Frame Buffer (VRAM) Pixel format, display and drawing areas, texture pages, CLUTs, transparency
GPU Rendering Shading, modulation, semi-transparency, dithering, ordering tables
Texture Cache and Drawing Speed Cache blocks and entries, access cycles, command FIFO
GPU Video Timing Video clock, dot clock, refresh rates, NTSC and PAL, interlace

I/O Ports

The CPU controls the GPU through two 32-bit ports. GP0 receives drawing commands and VRAM data, and GP1 receives display control commands; reading GP0 returns the results of VRAM reads and register reads, and reading GP1 returns the status register.5

Table 3: GPU I/O ports
Port Name Write Read
0x1F801810 GP0 Drawing commands and VRAM data GPUREAD: VRAM data and GP1(10h) results
0x1F801814 GP1 Display control commands GPUSTAT: status register

psx-spx describes the connection between the CPU and the GPU as a 32-bit data-only bus that it calls the VBUS. Apart from address line 2, which selects between the two ports, no address lines run between the two chips, so the GPU acts as a device that executes 32-bit commands.5

DMA

High-speed DMA transfer may be performed between the frame buffer and main memory.1 Two DMA channels serve the GPU:6

Table 4: GPU DMA channels
Channel Mode Use
DMA2 Linked list Sending drawing commands, GP0(20h) to GP0(7Fh) and GP0(E1h) to GP0(E6h)
DMA2 Continuous VRAM transfers to and from the GPU, GP0(A0h) and GP0(C0h)
DMA6 Initializing an ordering table in main RAM

DMA2 is equivalent to software access to the GP0 port, and the DMA direction must be set with GP1(04h) before it is used. DMA6 only writes main RAM and is not connected to the GPU.6 Libgpu uses DMA6 in ClearOTagR(), which is why a reverse ordering table is initialized faster than a normal one.78

Frame Buffer

The GPU has 1 MB of video memory (VRAM). The frame buffer is dual ported, and may be accessed for drawing while display takes place.1 It is 1024 pixels wide by 512 pixels tall with 16 bits per pixel, and it holds the display area, the drawing area, texture patterns and CLUTs.3 The frame buffer page describes its layout.

The GPU displays the content of rectangular areas of the frame buffer on the CRT display, and these areas are called display areas.1 Drawing coordinates are signed 11-bit values from -1024 to 1023. Since the frame buffer is 1024 x 512, coordinates outside it wrap around. The drawing origin can be placed anywhere in the frame buffer by the coordinate offset, and the GPU clips all drawing to the current drawing area.4

Screen Modes

The GPU supports the following screen modes:9

Table 5: Window resolutions
Mode Standard resolution (NTSC) Remarks
0 256 x 240 Non-interlace
1 320 x 240 Non-interlace
2 512 x 240 Non-interlace
3 640 x 240 Non-interlace
4 256 x 480 Interlace
5 320 x 480 Interlace
6 512 x 480 Interlace
7 640 x 480 Interlace
8 384 x 240 Non-interlace
9 384 x 480 Interlace

Sony gives the width of modes 8 and 9 as 384 in PlayStation Hardware and lists a width of 360 for DISPENV in the Run-Time Library Overview. psx-spx gives this width as 368 pixels and derives it from a dot clock divider of 7.9101112

Display Colors

The GPU supports 2 modes for color display: 15-bit direct (32,768 colors) and 24-bit direct (full color).9

15-bit direct mode can display up to 32,768 colors. The number of colors is limited compared with 24-bit mode, but color computation in the GPU is done in 24 bits; because of this and the dither feature, quasi-full color display is possible.9

24-bit direct mode can display up to 16,777,216 colors. However, it can only display image data transferred to the frame buffer, because the GPU assumes 16 bits per pixel and cannot draw in this mode. Coordinates and display locations stay in 16-bit units, so a 640 x 480 24-bit image is treated as 960 x 480 in the frame buffer. The display start X (DBX) must also be a multiple of 8, which makes the minimum screen size in this mode 8 x 2 pixels.9

Sprites and Texture Pages

The GPU supports sprites of up to 256 x 256 pixels, and width and height can vary up to this value. The image data of a sprite is placed in a non-display area of the frame buffer and must be transferred there before the sprite drawing command is executed.4

Sprite patterns are placed in 256 x 256 pixel areas of the frame buffer called texture pages. The size of a texture page in the frame buffer varies with the texture mode, and the TSB parameter of the drawing command gives its page number. The page number of a page with upper left corner (tx, ty) is tpage = ty/16 + tx/64, although the actual tpage value also contains data such as the CLUT mode and the semi-transparency rate.13

There are three sprite color modes: 4-bit CLUT, 8-bit CLUT and 15-bit direct. A CLUT (color lookup table) is a table of RGB values, with 16 entries for a 4-bit sprite and 256 for an 8-bit sprite, and each pixel of the sprite pattern gives its color by an index into the table. A CLUT can be selected for each sprite, and one entry has the same structure as a 15-bit pixel. The CBA parameter of the drawing command gives the left coordinate of the CLUT in the frame buffer.13

Polygons

The polygons that the GPU handles are triangles and quadrilaterals, and each is drawn from the screen coordinates of its vertices. With Gouraud shading a different color may be specified for each vertex, and the GPU interpolates the colors across the polygon. Texture mapping applies a 2-dimensional image to a polygon; its texture patterns are placed in non-display areas of the frame buffer and handled the same way as sprite patterns.14

Texture Cache

The texture cache (T-cache) is a 2K-byte high-speed buffer memory between the GPU and the frame buffer. Because each texel of a texture pattern is likely to be read more than once while each pixel of the polygon is drawn only once, reading texels through the T-cache speeds up texture mapping. Its size in pixels depends on the pixel mode:1415

Table 6: T-cache size
Pixel Mode Size (width x length)
4 bits/pixel 64 x 64 pixels
8 64 x 32
16 32 x 32

For frame buffer access timing Sony refers to the libgpu overview, which the texture cache page follows.15

GPU Versions

psx-spx distinguishes three GPU versions:16

Table 7: GPU versions
Item v0 v1 v2
GPU chip CXD8514Q (160-pin) CXD8538Q (208-pin prototype) CXD8561Q/BQ/CQ, CXD9500Q (208-pin)
Mainboard EARLY-PU-8 and below Arcade boards only LATE-PU-8 and up
Memory type Dual-ported VRAM Dual-ported VRAM Normal DRAM
GPUSTAT bit 13 with interlace off Always 0 Unknown Always 1
GP1(10h) index 7 Not supported 1 2
Rectangle X and Y flip No No Yes
Shaded textures ((color/8) x texel)/2 Unknown (color x texel)/16

The v1 GPU appears only on some arcade boards and seems to use different drawing commands. Another arcade-only revision, the CXD8654Q (v2b), seems to use the same commands as the v2.16 PSX games should not use the flip feature of the v2 GPU, because older consoles do not have it.17

Library

Libgpu, the Basic Graphics library, is a low-level library for primitives such as triangles, rectangles and sprites. It provides system functions that control the whole graphics system, frame buffer access functions, primitive functions and ordering table functions. Its synchronization functions wait for the vertical blank and for the end of drawing.18 The libgpu primitives and the GPU commands they produce are listed in GP0 Drawing Commands.

References


  1. ^ a b c d Sony Computer Entertainment Inc. PlayStation Hardware. August 1998. Page 3-3.

  2. ^ Sony Computer Entertainment Inc. PlayStation Hardware. August 1998. Page 1-4.

  3. ^ a b Sony Computer Entertainment Inc. Run-Time Library Overview. January 1999. Page 8-4.

  4. ^ a b c Sony Computer Entertainment Inc. PlayStation Hardware. August 1998. Page 3-5, Figure 3-2.

  5. ^ a b psx-spx. Graphics Processing Unit (GPU), GPU I/O Ports (0x1f801810, 0x1f801814). https://psx-spx.consoledev.net/graphicsprocessingunitgpu/#gpu-io-ports-dma-channels-commands-vram

  6. ^ a b psx-spx. Graphics Processing Unit (GPU), GPU-related DMA Channels (DMA2 and DMA6). https://psx-spx.consoledev.net/graphicsprocessingunitgpu/#gpu-io-ports-dma-channels-commands-vram

  7. ^ Sony Computer Entertainment Inc. Run-Time Library Overview. January 1999. Page 8-16.

  8. ^ psx-spx. Graphics Processing Unit (GPU), Initializing an empty OT (via DMA6). https://psx-spx.consoledev.net/graphicsprocessingunitgpu/#gpu-depth-ordering

  9. ^ a b c d e Sony Computer Entertainment Inc. PlayStation Hardware. August 1998. Page 3-4, Table 3-1.

  10. ^ Sony Computer Entertainment Inc. Run-Time Library Overview. January 1999. Page 8-6.

  11. ^ psx-spx. Graphics Processing Unit (GPU), GP1(08h) - Display mode. https://psx-spx.consoledev.net/graphicsprocessingunitgpu/#gpu-display-control-commands-gp1

  12. ^ psx-spx. Graphics Processing Unit (GPU), GPU Timings, Nocash's original GPU Timings notes. https://psx-spx.consoledev.net/graphicsprocessingunitgpu/#gpu-timings

  13. ^ a b Sony Computer Entertainment Inc. PlayStation Hardware. August 1998. Page 3-6, Figure 3-4, Figure 3-5.

  14. ^ a b Sony Computer Entertainment Inc. PlayStation Hardware. August 1998. Page 3-7.

  15. ^ a b Sony Computer Entertainment Inc. PlayStation Hardware. August 1998. Page 3-8, Table 3-2.

  16. ^ a b psx-spx. Graphics Processing Unit (GPU), Summary of GPU Differences. https://psx-spx.consoledev.net/graphicsprocessingunitgpu/#gpu-versions

  17. ^ psx-spx. Graphics Processing Unit (GPU), X/Y-Flip and PSone 2 MB VRAM. https://psx-spx.consoledev.net/graphicsprocessingunitgpu/#gpu-versions

  18. ^ Sony Computer Entertainment Inc. Run-Time Library Overview. January 1999. Page 8-3.

Categories: Hardware · GPU