DMA Interrupt Latency and MDEC Reset
Measures DICR interrupt latency, the upper half of I_MASK, timer 1 resets, GTE register effects, MDEC resets and FIFOs, and SPU DMA cost.
| Machine | SCPH-5501 |
|---|---|
| Program | followup2 |
This is an old revision of this page, as edited by RemmyLee at 05:40, 23 October 2026. Edit this revision | Latest revision
Overview
The program asks what the first follow-up left open, one group per question. Root counter 2 at 33.8688 MHz is the stopwatch, and each group puts the timers and I_MASK back when it ends. SMR, SMF and SDS each hold a step that could stop the console. They run last and save the log before that step.1
| Tag | Group |
|---|---|
| SDI | DICR forced, then I_STAT bit 3 and CAUSE.IP2 polled in a loop and in back-to-back loads |
| SIM | Twelve store-then-load rows on I_MASK, each changing one thing between the store and the load |
| STH | Timer 1 in sync mode 1 sampled every 50 cycles from 47,000 to 54,000 cycles after the vertical blank interrupt |
| SG1 to SG8 | 33 GTE opcodes on 25 single-input cases at sf 1 and sf 0 |
| SMS | MDEC decodes of count 1 and 2 after different earlier decodes |
| SSD | The SPU write FIFO draining to sound RAM after DMA and after manual writes |
| SMR | MDEC reset timing and the enables written after a reset |
| SMF | MDEC input FIFO filled with 34 words |
| SDS | DMA4 to the SPU by block size, and in sync mode 0 |
Results
DMA Interrupt Latency
After DICR was written 00008000h, a loop of one I_STAT load a turn found bit 3 set on its second turn in all three runs. Of eight back-to-back I_STAT loads the first two read 0 and the third read 1.1
CAUSE.IP2 followed later. With I_MASK 00000008h, eight back-to-back MFC0 reads of CAUSE showed IP2 only on the eighth. A loop of one MFC0 a turn found it on the second turn.1
I_MASK Upper Half
The low 11 bits of I_MASK read back as stored. The upper 16 bits changed with what the CPU did between the store and the load.1
Run from uncached code, every row read 03E0h in the upper half. Run from the cache a second time, a row with nothing between the store and the load read 1234h, which is the upper half of the value stored, and a row with a RAM load of 5AA5C33Ch between them read 5AA5h. Rows with a load of the BIOS, GPUSTAT, the scratchpad, I_STAT or timer 2 between them read 27BDh.1
Timer 1 Sync Mode 1
On horizontal blank, timer 1 stepped from 21 to 22 at about 47,100 cycles after the vertical blank interrupt, to 23 at about 49,250 and to 24 at about 51,450. It reset to 0 between 51,921 and 51,977 cycles in all four runs.1 On the 33.8688 MHz clock timer 1 dropped from 49,374 to 13 between 49,374 and 49,425 cycles after the interrupt.1
GTE
Groups SG1 to SG8 print, for each opcode and input case, the registers the command changed at sf 1 and FLAG. They then list the registers where sf 0 gave a different value. Those tables are in the output.1
MDEC Short Decodes
An 8-bit decode with a count of 1 straight after the tables gave 992 output words. After a 32-word decode of pattern A or pattern B it gave 496 words, and the words differed between the two patterns. A count of 2 gave 480 words in all three cases.1
SPU Write FIFO
After a 16-word DMA block, 9 of the 32 halfwords had reached sound RAM when the DMA ended. All 32 were written 750 cycles after the DMA ended.1
After 16 halfwords written by hand and a store of SPUCNT Manual Write, all 32 halfwords were written at once and at every wait from 100 to 900 cycles. A wait of 50 cycles left all 32 halfwords holding other values. SPUSTAT read 0000h until 185 cycles after the store and 0410h from 218 cycles on.1
MDEC Reset
From a 15-bit decode with the input full, a status read straight after the reset gave E60400C0h cold and E6040040h warm. With 10 NOPs or more between the reset and the read, the status was 80040000h.1
Writing 60000000h to MDEC1 at once after a reset did not take: the status read 60000000h, a later MDEC0 command left A004000Fh and DMA0 timed out. With 10 NOPs or more between the reset and the write, the command left B004000Fh and DMA0 moved its 16 words in 84 to 94 cycles.1
MDEC Input FIFO
After the command 38000100h each word written lowered the count in the status by one. The status went from B60400FFh to B60400E0h at the 31st word. The 32nd word set bit 30 and the status read E60400DFh. The 33rd and 34th words left the status the same.1 The 32 words then read out were all zero, about 60 cycles apart, and the status ended at B60100DFh.1
DMA4 Cost
A 256-word DMA4 write in sync mode 1 took 16,293 to 18,095 cycles in blocks of 1 to 16 words and about 8,150 cycles in blocks of 31 or 32 words. Blocks of 24 words took about 10,400 cycles.1
In sync mode 0 the same 256 words took 1,116 to 1,171 cycles. Afterwards MADR was unchanged, BCR still read 00000100h and CHCR read 00000001h.1
Runs
27 September 2026
===== 00 RUN | BIOS 19951204 System ROM Version 3.0 11/18/96 A
16 tests
A chain program, linked at 80100000
Saved on the card in slot 2, from image 1
COP0 at start: BPC 00000000 BDA 00000000 TAR 80016128 DCIC 00000000 BadVaddr 00000480 BDAM 00000000
BPCM 00000000 SR 00000000 Cause 00000020 EPC 80016C84 PRId 00000002
===== 01 SDI F2 DICR POLL | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
DICR written with timer 2 zeroed just before it. Interrupts off (SR IEc 0) throughout.
DICR 0 is the scale: its loop runs all 300 turns, so timer 2 over 300 gives one turn.
I_STAT bit 3, a loop of one I_STAT load a turn (lw, addiu, andi, sltiu, sltu, and, bnez, nop):
DICR 00000000: the bit never set in 300 turns; timer 2 after them 3606
DICR 00008000: the bit was set on turn 2; timer 2 after the loop 24
DICR 00008000: the bit was set on turn 2; timer 2 after the loop 24
DICR 00008000: the bit was set on turn 2; timer 2 after the loop 24
I_STAT bit 3, eight I_STAT loads back to back:
DICR 00000000: I_STAT bit 3 after each of the 8 loads: 0 0 0 0 0 0 0 0; timer 2 after them 42
DICR 00008000: I_STAT bit 3 after each of the 8 loads: 0 0 1 1 1 1 1 1; timer 2 after them 32
DICR 00008000: I_STAT bit 3 after each of the 8 loads: 0 0 1 1 1 1 1 1; timer 2 after them 32
DICR 00008000: I_STAT bit 3 after each of the 8 loads: 0 0 1 1 1 1 1 1; timer 2 after them 32
CAUSE.IP2, a loop of one mfc0 CAUSE a turn (the same loop), I_MASK 00000008:
DICR 00000000: the bit never set in 300 turns; timer 2 after them 2408
DICR 00008000: the bit was set on turn 2; timer 2 after the loop 16
DICR 00008000: the bit was set on turn 2; timer 2 after the loop 16
DICR 00008000: the bit was set on turn 2; timer 2 after the loop 16
CAUSE.IP2, eight mfc0 CAUSE back to back, I_MASK 00000008:
DICR 00000000: CAUSE.IP2 after each of the 8 loads: 0 0 0 0 0 0 0 0; timer 2 after them 17
DICR 00008000: CAUSE.IP2 after each of the 8 loads: 0 0 0 0 0 0 0 1; timer 2 after them 8
DICR 00008000: CAUSE.IP2 after each of the 8 loads: 0 0 0 0 0 0 0 1; timer 2 after them 8
DICR 00008000: CAUSE.IP2 after each of the 8 loads: 0 0 0 0 0 0 0 1; timer 2 after them 8
DICR was 04000000 and is back to 0, then its enables.
Done.
===== 02 SIM F2 IMASK UPPER | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
I_MASK's upper half. Each row stores to I_MASK and loads it back; the value is
12345678h unless the row says otherwise. Interrupts off. The RAM word is 5AA5C33Ch, the
BIOS word at BFC00100h is its date, the scratchpad word is written 7EE71234h first.
a: sw $9,1074h($8) (AD091074h), lw (code at 80106030): cached 00400678 then 12340678, uncached 03E00678
b: sw $10,1074h($8) (AD0A1074h), lw (code at 80106050): cached 35290678 then 12340678, uncached 03E00678
c: sw $9,4($11) (AD690004h), lw (code at 80106074): cached 34090678 then 12340678, uncached 03E00678
d: value 0000FFFFh, sw $9,1074h($8), lw (code at 80106098): cached 3C0907FF then 000007FF, uncached 03E007FF
e: sw, lw of RAM, nop, lw (code at 801060B4): cached 5AA50678 then 5AA50678, uncached 03E00678
f: sw, lw of BIOS BFC00100h, nop, lw (code at 801060E4): cached 00000678 then 27BD0678, uncached 03E00678
g: sw, lw of GPUSTAT, nop, lw (code at 80106110): cached 3C090678 then 27BD0678, uncached 03E00678
h: sw, lw of scratchpad, nop, lw (code at 80106138): cached 00000678 then 27BD0678, uncached 03E00678
i: sw, lw of I_STAT, nop, lw (code at 80106160): cached 3C080678 then 27BD0678, uncached 03E00678
j: lw of RAM, nop, sw, lw (code at 80106188): cached 3C090678 then 12340678, uncached 03E00678
k: sw, 4 nops, lw (code at 801061B8): cached 3C090678 then 27BD0678, uncached 03E00678
l: sw, lw of timer 2's counter, nop, lw (code at 801061E8): cached 00000678 then 27BD0678, uncached 03E00678
GPUSTAT now 5606200F. I_MASK back to 00000009.
Done.
===== 03 STH F2 T1 HBLANK SYNC1 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
Timer1 sync mode 1 (reset at vblank), set at the vblank IRQ (I_STAT bit 0, polled);
timer 2 counts system cycles from then. Each sample is timer 2 then timer 1 (t:v).
Hblank clock (mode 0103h), run 1, every sample (141):
47033:21 47073:21 47124:22 47175:22 47226:22 47277:22 47319:22 47370:22
47421:22 47472:22 47523:22 47574:22 47625:22 47676:22 47727:22 47769:22
47820:22 47871:22 47922:22 47973:22 48024:22 48075:22 48126:22 48177:22
48229:22 48271:22 48322:22 48373:22 48424:22 48485:22 48527:22 48569:22
48620:22 48671:22 48722:22 48769:22 48820:22 48871:22 48922:22 48973:22
49024:22 49075:22 49126:22 49177:22 49219:22 49270:23 49321:23 49372:23
49423:23 49474:23 49525:23 49576:23 49627:23 49669:23 49720:23 49771:23
49822:23 49873:23 49924:23 49975:23 50026:23 50077:23 50119:23 50170:23
50221:23 50274:23 50325:23 50376:23 50427:23 50469:23 50520:23 50571:23
50622:23 50673:23 50724:23 50775:23 50826:23 50877:23 50919:23 50970:23
51021:23 51072:23 51123:23 51174:23 51225:23 51276:23 51327:23 51369:23
51420:23 51471:24 51522:24 51573:24 51624:24 51675:24 51726:24 51777:24
51819:24 51870:24 51921:24 51972:0 52023:0 52074:0 52125:0 52176:0
52227:0 52269:0 52322:0 52373:0 52424:0 52475:0 52526:0 52578:0
52620:0 52671:0 52722:0 52773:0 52824:0 52875:0 52926:0 52977:0
53019:0 53070:0 53121:0 53172:0 53223:0 53274:0 53325:0 53376:0
53427:0 53469:0 53520:0 53571:0 53622:0 53673:0 53724:0 53775:0
53826:0 53877:0 53919:0 53970:0 54021:0
Hblank clock (mode 0103h), run 1, 141 samples; where timer 1 changes: 47073:21->47124:22 49219:22->49270:23 51420:23->51471:24 51921:24->51972:0
Hblank clock (mode 0103h), run 2, 141 samples; where timer 1 changes: 47124:21->47175:22 49276:22->49327:23 51426:23->51477:24 51927:24->51969:0
Hblank clock (mode 0103h), run 3, 141 samples; where timer 1 changes: 47124:21->47175:22 49274:22->49325:23 51425:23->51476:24 51926:24->51977:0
Hblank clock (mode 0103h), run 4, 141 samples; where timer 1 changes: 47076:21->47127:22 49222:22->49273:23 51372:23->51423:24 51924:24->51975:0
System clock (mode 0003h), 141 samples; where timer 1 drops: 49374:49374->49425:13; last sample 54021:4609
Done.
===== 04 SG1 F2 GTE 02 TO 07 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
GTE, one input at a time, lm 0, no other command bits. Cases: zero = every register 0;
unit = RT, LLM, LCM 1000h on the diagonal, the rest 0; V0 (100,200,400), V1 (110,220,440),
V2 (120,240,480), IR0 800, IR1 130, IR2 260, IR3 4C0, RGBC 40302010, SXY0-2 00200010
00400030 00600050, SZ0-3 100 200 300 400, MAC0 12345: each alone with the unit matrices.
TR (100,200,400), BK (110,220,440), FC (120,240,480), OFX A00000 OFY 780000, H 200, DQA
100, DQB 1400000, ZSF3 155, ZSF4 100: each alone, the rest 0. RTxV, LLMxV, LCMxV: that
matrix (800 100 200 / 300 900 400 / 500 600 A00, plus 10h for LLM, 20h for LCM) with V0,
V1, V2 and IR1-3 as above. Each row: sf 1 changes as reg=hex and F=FLAG; after | the
registers where sf 0 differs from sf 1 (63 is FLAG), or = when none.
op 02:
zero: F=80020000 | =
unit: F=80020000 | =
V0: 9=100 10=200 19=100 25=100 26=200 28=82 F=0 | 9=7fff 10=7fff 25=100000 26=200000 28=3ff 63=81800000
V1: F=80020000 | =
V2: F=80020000 | =
IR0: 8=0 F=80020000 | =
IR1: 9=0 28=0 F=80020000 | =
IR2: 10=0 28=0 F=80020000 | =
IR3: F=80020000 | =
RGBC: F=80020000 | =
SXY: 12=400030 13=600050 14=0 F=80020000 | =
SZ: 16=200 17=300 18=400 19=0 F=80020000 | =
MAC0: 24=0 F=80020000 | =
TR: 9=100 10=200 14=3ff01ff 25=100 26=200 28=82 F=80020000 | 9=7fff 10=7fff 14=3ff03ff 25=100000 26=200000 28=3ff 63=81836000
BK: F=80020000 | =
FC: F=80020000 | =
OF: 14=7800a0 F=80020000 | =
H: F=80020000 | =
DQA: 8=1000 24=1ffff00 F=80021000 | =
DQB: 8=1000 24=1400000 F=80021000 | =
ZSF3: F=80020000 | =
ZSF4: F=80020000 | =
RTxV: 9=120 10=250 19=80 25=120 26=250 F=0 | 9=7fff 10=7fff 25=120000 26=250000 28=27ff 63=81800000
LLMxV: 9=0 10=0 28=2400 F=80020000 | =
LCMxV: 9=0 10=0 28=2400 F=80020000 | =
op 03:
zero: F=80020000 | =
unit: F=80020000 | =
V0: 10=200 14=3ff0000 26=200 28=80 F=80020000 | 10=7fff 26=200000 28=3e0 63=80832000
V1: F=80020000 | =
V2: F=80020000 | =
IR0: 8=0 F=80020000 | =
IR1: 14=25f F=80020000 | =
IR2: 10=0 28=0 F=80020000 | =
IR3: F=80020000 | =
RGBC: F=80020000 | =
SXY: 12=400030 13=600050 14=0 F=80020000 | =
SZ: 16=200 17=300 18=400 19=0 F=80020000 | =
MAC0: 24=0 F=80020000 | =
TR: 10=200 14=3ff0000 26=200 28=80 F=80020000 | 10=7fff 26=200000 28=3e0 63=80832000
BK: F=80020000 | =
FC: F=80020000 | =
OF: 14=7800a0 F=80020000 | =
H: F=80020000 | =
DQA: 8=1000 24=1ffff00 F=80021000 | =
DQB: 8=1000 24=1400000 F=80021000 | =
ZSF3: F=80020000 | =
ZSF4: F=80020000 | =
RTxV: 10=250 14=3ff025f 26=250 F=80022000 | 10=7fff 26=250000 28=27e2 63=80832000
LLMxV: 10=0 14=25f 28=2402 F=80020000 | =
LCMxV: 10=0 14=25f 28=2402 F=80020000 | =
op 04:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: 8=0 F=0 | =
IR1: 14=25f F=0 | =
IR2: 14=3ff0000 F=80002000 | =
IR3: F=0 | =
RGBC: F=0 | =
SXY: 12=400030 13=600050 14=0 F=0 | =
SZ: F=0 | =
MAC0: 24=0 F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: 8=1000 24=1ffff00 F=1000 | =
DQB: 8=1000 24=1400000 F=1000 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 14=3ff025f F=80002000 | =
LLMxV: 14=3ff025f F=80002000 | =
LCMxV: 14=3ff025f F=80002000 | =
op 07:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: F=0 | =
IR2: F=0 | =
IR3: F=0 | =
RGBC: F=0 | =
SXY: 24=fffff600 F=0 | =
SZ: F=0 | =
MAC0: 24=0 F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | 24=120
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: F=0 | =
LLMxV: F=0 | =
LCMxV: F=0 | =
Done.
===== 05 SG2 F2 GTE 08 TO 17 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
GTE, one input at a time, lm 0, no other command bits. Cases: zero = every register 0;
unit = RT, LLM, LCM 1000h on the diagonal, the rest 0; V0 (100,200,400), V1 (110,220,440),
V2 (120,240,480), IR0 800, IR1 130, IR2 260, IR3 4C0, RGBC 40302010, SXY0-2 00200010
00400030 00600050, SZ0-3 100 200 300 400, MAC0 12345: each alone with the unit matrices.
TR (100,200,400), BK (110,220,440), FC (120,240,480), OFX A00000 OFY 780000, H 200, DQA
100, DQB 1400000, ZSF3 155, ZSF4 100: each alone, the rest 0. RTxV, LLMxV, LCMxV: that
matrix (800 100 200 / 300 900 400 / 500 600 A00, plus 10h for LLM, 20h for LCM) with V0,
V1, V2 and IR1-3 as above. Each row: sf 1 changes as reg=hex and F=FLAG; after | the
registers where sf 0 differs from sf 1 (63 is FLAG), or = when none.
op 08:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: F=0 | =
IR2: F=0 | =
IR3: F=0 | =
RGBC: F=0 | =
SXY: 24=fffff200 F=0 | =
SZ: F=0 | =
MAC0: 24=0 F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: 24=120 F=0 | 24=0
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: F=0 | =
LLMxV: F=0 | =
LCMxV: F=0 | =
op 09:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: F=0 | =
IR2: F=0 | =
IR3: F=0 | =
RGBC: F=0 | =
SXY: 24=ffffe000 F=0 | =
SZ: F=0 | =
MAC0: 24=0 F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: 24=120 F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: F=0 | =
LLMxV: F=0 | =
LCMxV: F=0 | =
op 0A:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: F=0 | =
IR2: F=0 | =
IR3: F=0 | =
RGBC: F=0 | =
SXY: 24=ffffe000 F=0 | =
SZ: F=0 | =
MAC0: 24=0 F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: 24=120 F=0 | 24=0
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: F=0 | =
LLMxV: F=0 | =
LCMxV: F=0 | =
op 0D:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=0 10=130 11=fffffed0 26=130 27=fffffed0 28=40 F=0 | 10=7fff 11=ffff8000 26=130000 27=ffed0000 28=3e0 63=80c00000
IR2: 9=fffffda0 10=0 11=260 25=fffffda0 27=260 28=1000 F=0 | 9=ffff8000 11=7fff 25=ffda0000 27=260000 28=7c00 63=81400000
IR3: 10=fffffb40 11=0 26=fffffb40 28=0 F=0 | 10=ffff8000 26=ffb40000 63=80800000
RGBC: F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | 9=120 25=120 28=2
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=fffffe84 10=fffffe5e 11=85 25=fffffe84 26=fffffe5e 27=85 28=400 F=0 | 9=ffff8000 10=ffff8000 11=7fff 25=ffe84000 26=ffe5e000 27=85000 28=7c00 63=81c00000
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=0 10=0 11=0 28=0 F=0 | =
op 0E:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 10=260 11=fffffed0 26=260 27=fffffed0 28=82 F=0 | 10=7fff 11=ffff8000 26=8130000 27=ffed0000 28=3e2 63=80c00000
IR2: 10=0 28=0 F=0 | =
IR3: 10=fffff680 11=0 26=fffff680 28=0 F=0 | 10=ffff8000 26=ff680000 63=80800000
RGBC: F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | 11=120 27=120 28=800
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 10=fffffc53 11=ffffff55 26=fffffc53 27=ffffff55 28=2 F=0 | 10=7fff 11=ffff8000 26=3bfe000 27=fff55000 28=3e2 63=80c00000
LLMxV: 10=0 11=0 28=2 F=0 | =
LCMxV: 10=0 11=0 28=2 F=0 | =
op 15:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=0 28=0 F=0 | =
IR2: 10=0 28=0 F=0 | =
IR3: 11=0 28=0 F=0 | =
RGBC: 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | 63=81c00000
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=0 10=0 11=0 28=0 F=0 | =
op 17:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=0 28=0 F=0 | 63=81000000
IR2: 10=0 28=0 F=0 | 63=80800000
IR3: 11=0 28=0 F=0 | 63=400000
RGBC: 20=40000000 21=40000000 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: F=0 | 63=81c00000
FC: F=0 | 63=81c00000
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=0 10=0 11=0 28=0 F=0 | 63=81c00000
Done.
===== 06 SG3 F2 GTE 18 TO 1F | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
GTE, one input at a time, lm 0, no other command bits. Cases: zero = every register 0;
unit = RT, LLM, LCM 1000h on the diagonal, the rest 0; V0 (100,200,400), V1 (110,220,440),
V2 (120,240,480), IR0 800, IR1 130, IR2 260, IR3 4C0, RGBC 40302010, SXY0-2 00200010
00400030 00600050, SZ0-3 100 200 300 400, MAC0 12345: each alone with the unit matrices.
TR (100,200,400), BK (110,220,440), FC (120,240,480), OFX A00000 OFY 780000, H 200, DQA
100, DQB 1400000, ZSF3 155, ZSF4 100: each alone, the rest 0. RTxV, LLMxV, LCMxV: that
matrix (800 100 200 / 300 900 400 / 500 600 A00, plus 10h for LLM, 20h for LCM) with V0,
V1, V2 and IR1-3 as above. Each row: sf 1 changes as reg=hex and F=FLAG; after | the
registers where sf 0 differs from sf 1 (63 is FLAG), or = when none.
op 18:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=0 28=0 F=0 | =
IR2: 10=0 28=0 F=0 | =
IR3: 11=0 28=0 F=0 | =
RGBC: 20=40000000 21=40000000 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | 63=81c00000
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=0 10=0 11=0 28=0 F=0 | =
op 19:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=0 28=0 F=0 | =
IR2: 10=0 28=0 F=0 | =
IR3: 11=0 28=0 F=0 | =
RGBC: 21=40000000 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | 63=81c00000
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=0 10=0 11=0 28=0 F=0 | =
op 1D:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=0 28=0 F=0 | =
IR2: 10=0 28=0 F=0 | =
IR3: 11=0 28=0 F=0 | =
RGBC: 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=0 10=0 11=0 28=0 F=0 | =
op 1F:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=0 28=0 F=0 | =
IR2: 10=0 28=0 F=0 | =
IR3: 11=0 28=0 F=0 | =
RGBC: 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: 9=110 10=220 11=440 22=442211 25=110 26=220 27=440 28=2082 F=0 | 9=7fff 10=7fff 11=7fff 22=ffffff 25=110000 26=220000 27=440000 28=7fff 63=81f80000
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=0 10=0 11=0 28=0 F=0 | =
Done.
===== 07 SG4 F2 GTE 21 TO 23 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
GTE, one input at a time, lm 0, no other command bits. Cases: zero = every register 0;
unit = RT, LLM, LCM 1000h on the diagonal, the rest 0; V0 (100,200,400), V1 (110,220,440),
V2 (120,240,480), IR0 800, IR1 130, IR2 260, IR3 4C0, RGBC 40302010, SXY0-2 00200010
00400030 00600050, SZ0-3 100 200 300 400, MAC0 12345: each alone with the unit matrices.
TR (100,200,400), BK (110,220,440), FC (120,240,480), OFX A00000 OFY 780000, H 200, DQA
100, DQB 1400000, ZSF3 155, ZSF4 100: each alone, the rest 0. RTxV, LLMxV, LCMxV: that
matrix (800 100 200 / 300 900 400 / 500 600 A00, plus 10h for LLM, 20h for LCM) with V0,
V1, V2 and IR1-3 as above. Each row: sf 1 changes as reg=hex and F=FLAG; after | the
registers where sf 0 differs from sf 1 (63 is FLAG), or = when none.
op 21:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 22=13 25=130 F=0 | 9=7fff 22=ff 25=130000 28=1f 63=81200000
IR2: 22=2600 26=260 F=0 | 10=7fff 22=ff00 26=260000 28=3e0 63=80900000
IR3: 22=4c0000 27=4c0 F=0 | 11=7fff 22=ff0000 27=4c0000 28=7c00 63=480000
RGBC: 20=40000000 21=40000000 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: 9=110 10=220 11=440 20=442211 21=442211 22=442211 25=110 26=220 27=440 28=2082 F=0 | 9=7fff 10=7fff 11=7fff 20=ffffff 21=ffffff 22=ffffff 25=110000 26=220000 27=440000 28=7fff 63=81f80000
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=166 10=2cf 11=44b 22=442c16 25=166 26=2cf 27=44b 28=20a2 F=0 | 9=7fff 10=7fff 11=7fff 22=ffffff 25=166a00 26=2cfa00 27=44ba00 28=7fff 63=81f80000
op 22:
zero: 20=ff F=0 | 20=0
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 22=13 25=130 F=0 | 9=7fff 20=13 22=ff 25=130000 28=1f 63=81200000
IR2: 20=ff 22=2600 26=260 F=0 | 10=7fff 20=0 22=ff00 26=260000 28=3e0 63=80900000
IR3: 22=4c0000 27=4c0 F=0 | 11=7fff 22=ff0000 27=4c0000 28=7c00 63=480000
RGBC: 20=40000000 21=40000000 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: 9=110 10=220 11=440 20=442200 21=442211 22=442211 25=110 26=220 27=440 28=2082 F=0 | 9=7fff 10=7fff 11=7fff 20=ffff11 21=ffffff 22=ffffff 25=110000 26=220000 27=440000 28=7fff 63=81f80000
FC: 20=ff F=0 | 20=0
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=166 10=2cf 11=44b 22=442c16 25=166 26=2cf 27=44b 28=20a2 F=0 | 9=7fff 10=7fff 11=7fff 20=16 22=ffffff 25=166a00 26=2cfa00 27=44ba00 28=7fff 63=81f80000
op 23:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 22=13 25=130 F=0 | 9=7fff 22=ff 25=130000 28=1f 63=81200000
IR2: 22=2600 26=260 F=0 | 10=7fff 22=ff00 26=260000 28=3e0 63=80900000
IR3: 22=4c0000 27=4c0 F=0 | 11=7fff 22=ff0000 27=4c0000 28=7c00 63=480000
RGBC: 20=40000000 21=40000000 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: 9=110 10=220 11=440 20=440000 21=442211 22=442211 25=110 26=220 27=440 28=2082 F=0 | 9=7fff 10=7fff 11=7fff 20=ff0000 21=ffffff 22=ffffff 25=110000 26=220000 27=440000 28=7fff 63=81f80000
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=166 10=2cf 11=44b 22=442c16 25=166 26=2cf 27=44b 28=20a2 F=0 | 9=7fff 10=7fff 11=7fff 22=ffffff 25=166a00 26=2cfa00 27=44ba00 28=7fff 63=81f80000
Done.
===== 08 SG5 F2 GTE 24 TO 27 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
GTE, one input at a time, lm 0, no other command bits. Cases: zero = every register 0;
unit = RT, LLM, LCM 1000h on the diagonal, the rest 0; V0 (100,200,400), V1 (110,220,440),
V2 (120,240,480), IR0 800, IR1 130, IR2 260, IR3 4C0, RGBC 40302010, SXY0-2 00200010
00400030 00600050, SZ0-3 100 200 300 400, MAC0 12345: each alone with the unit matrices.
TR (100,200,400), BK (110,220,440), FC (120,240,480), OFX A00000 OFY 780000, H 200, DQA
100, DQB 1400000, ZSF3 155, ZSF4 100: each alone, the rest 0. RTxV, LLMxV, LCMxV: that
matrix (800 100 200 / 300 900 400 / 500 600 A00, plus 10h for LLM, 20h for LCM) with V0,
V1, V2 and IR1-3 as above. Each row: sf 1 changes as reg=hex and F=FLAG; after | the
registers where sf 0 differs from sf 1 (63 is FLAG), or = when none.
op 24:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 22=13 25=130 F=0 | 9=7fff 22=ff 25=130000 28=1f 63=81200000
IR2: 22=2600 26=260 F=0 | 10=7fff 22=ff00 26=260000 28=3e0 63=80900000
IR3: 22=4c0000 27=4c0 F=0 | 11=7fff 22=ff0000 27=4c0000 28=7c00 63=480000
RGBC: 21=40000000 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: 9=110 10=220 11=440 21=442211 22=442211 25=110 26=220 27=440 28=2082 F=0 | 9=7fff 10=7fff 11=7fff 21=ffffff 22=ffffff 25=110000 26=220000 27=440000 28=7fff 63=81f80000
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=166 10=2cf 11=44b 22=442c16 25=166 26=2cf 27=44b 28=20a2 F=0 | 9=7fff 10=7fff 11=7fff 22=ffffff 25=166a00 26=2cfa00 27=44ba00 28=7fff 63=81f80000
op 25:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 22=13 25=130 F=0 | 9=7fff 22=ff 25=130000 28=1f 63=81200000
IR2: 22=2600 26=260 F=0 | 10=7fff 22=ff00 26=260000 28=3e0 63=80900000
IR3: 22=4c0000 27=4c0 F=0 | 11=7fff 22=ff0000 27=4c0000 28=7c00 63=480000
RGBC: 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: 9=110 10=220 11=440 22=442211 25=110 26=220 27=440 28=2082 F=0 | 9=7fff 10=7fff 11=7fff 22=ffffff 25=110000 26=220000 27=440000 28=7fff 63=81f80000
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=166 10=2cf 11=44b 22=442c16 25=166 26=2cf 27=44b 28=20a2 F=0 | 9=7fff 10=7fff 11=7fff 22=ffffff 25=166a00 26=2cfa00 27=44ba00 28=7fff 63=81f80000
op 26:
zero: 22=ff F=0 | =
unit: 22=ff F=0 | =
V0: 22=ff F=0 | =
V1: 22=ff F=0 | =
V2: 22=ff F=0 | =
IR0: 22=ff F=0 | =
IR1: 22=ff F=0 | =
IR2: 22=26ff 26=260 F=0 | 10=7fff 22=ffff 26=260000 28=3e0 63=80900000
IR3: 22=4c00ff 27=4c0 F=0 | 11=7fff 22=ff00ff 27=4c0000 28=7c00 63=480000
RGBC: 22=400000ff F=0 | =
SXY: 22=ff F=0 | =
SZ: 22=ff F=0 | =
MAC0: 22=ff F=0 | =
TR: 22=ff F=0 | =
BK: 10=220 11=440 22=4422ff 26=220 27=440 28=2080 F=0 | 10=7fff 11=7fff 22=ffffff 26=220000 27=440000 28=7fe0 63=80d80000
FC: 22=ff F=0 | =
OF: 22=ff F=0 | =
H: 22=ff F=0 | =
DQA: 22=ff F=0 | =
DQB: 22=ff F=0 | =
ZSF3: 22=ff F=0 | =
ZSF4: 22=ff F=0 | =
RTxV: 10=0 11=0 22=ff 28=2 F=0 | =
LLMxV: 10=0 11=0 22=ff 28=2 F=0 | =
LCMxV: 10=2cf 11=44b 22=442cff 26=2cf 27=44b 28=20a2 F=0 | 10=7fff 11=7fff 22=ffffff 26=2cfa00 27=44ba00 28=7fe2 63=80d80000
op 27:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: F=0 | =
IR2: F=0 | =
IR3: 22=4c0000 27=4c0 F=0 | 11=7fff 22=ff0000 27=4c0000 28=7c00 63=480000
RGBC: 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: 11=440 22=440000 27=440 28=2000 F=0 | 11=7fff 22=ff0000 27=440000 28=7c00 63=480000
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 11=0 28=82 F=0 | =
LLMxV: 11=0 28=82 F=0 | =
LCMxV: 11=44b 22=440000 27=44b 28=2082 F=0 | 11=7fff 22=ff0000 27=44ba00 28=7c82 63=480000
Done.
===== 09 SG6 F2 GTE 2B TO 34 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
GTE, one input at a time, lm 0, no other command bits. Cases: zero = every register 0;
unit = RT, LLM, LCM 1000h on the diagonal, the rest 0; V0 (100,200,400), V1 (110,220,440),
V2 (120,240,480), IR0 800, IR1 130, IR2 260, IR3 4C0, RGBC 40302010, SXY0-2 00200010
00400030 00600050, SZ0-3 100 200 300 400, MAC0 12345: each alone with the unit matrices.
TR (100,200,400), BK (110,220,440), FC (120,240,480), OFX A00000 OFY 780000, H 200, DQA
100, DQB 1400000, ZSF3 155, ZSF4 100: each alone, the rest 0. RTxV, LLMxV, LCMxV: that
matrix (800 100 200 / 300 900 400 / 500 600 A00, plus 10h for LLM, 20h for LCM) with V0,
V1, V2 and IR1-3 as above. Each row: sf 1 changes as reg=hex and F=FLAG; after | the
registers where sf 0 differs from sf 1 (63 is FLAG), or = when none.
op 2B:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=0 28=0 F=0 | =
IR2: 10=0 28=0 F=0 | =
IR3: 11=0 28=0 F=0 | =
RGBC: 20=40000000 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | 63=81c00000
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=0 10=0 11=0 28=0 F=0 | =
op 2C:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: F=0 | =
IR2: F=0 | =
IR3: F=0 | =
RGBC: 20=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | 63=81c00000
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: F=0 | =
LLMxV: F=0 | =
LCMxV: F=0 | =
op 2F:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=7fff 22=ff 25=130000 28=1f F=81200000 | =
IR2: 10=7fff 22=ff00 26=260000 28=3e0 F=80900000 | =
IR3: 11=7fff 22=ff0000 27=4c0000 28=7c00 F=480000 | =
RGBC: 20=40000000 21=40000000 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: 24=0 F=0 | =
TR: F=0 | =
BK: 9=7fff 10=7fff 11=7fff 20=ffffff 21=ffffff 22=ffffff 25=110000 26=220000 27=440000 28=7fff F=81f80000 | =
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=7fff 10=7fff 11=7fff 22=ffffff 25=166a00 26=2cfa00 27=44ba00 28=7fff F=81f80000 | =
op 34:
zero: F=80020000 | =
unit: F=80020000 | =
V0: F=80020000 | =
V1: 13=3ff021f F=80022000 | 13=3ff03ff 63=81836000
V2: 9=120 10=240 11=480 19=480 25=120 26=240 27=480 28=2482 F=80020000 | 9=7fff 10=7fff 11=7fff 25=120000 26=240000 27=480000 28=7fff 63=81820000
IR0: 8=0 F=80020000 | =
IR1: 9=0 28=0 F=80020000 | =
IR2: 10=0 28=0 F=80020000 | =
IR3: 11=0 28=0 F=80020000 | =
RGBC: F=80020000 | =
SXY: 12=0 13=0 14=0 F=80020000 | =
SZ: 16=300 17=400 18=0 19=0 F=80020000 | =
MAC0: 24=0 F=80020000 | =
TR: 9=100 10=200 11=400 13=3ff01ff 19=400 25=100 26=200 27=400 28=2082 F=80020000 | 9=7fff 10=7fff 11=7fff 13=3ff03ff 25=100000 26=200000 27=400000 28=7fff 63=81836000
BK: F=80020000 | =
FC: F=80020000 | =
OF: 12=7800a0 13=7800a0 14=7800a0 F=80020000 | =
H: F=80020000 | =
DQA: 8=1000 24=1ffff00 F=80021000 | =
DQB: 8=1000 24=1400000 F=80021000 | =
ZSF3: F=80020000 | =
ZSF4: F=80020000 | =
RTxV: 9=144 10=29a 11=402 13=3ff0263 19=402 25=144 26=29a 27=402 28=20a2 F=80022000 | 9=7fff 10=7fff 11=7fff 13=3ff03ff 25=144000 26=29a000 27=402000 28=7fff 63=81836000
LLMxV: 9=0 10=0 11=0 28=0 F=80020000 | =
LCMxV: 9=0 10=0 11=0 28=0 F=80020000 | =
Done.
===== 10 SG7 F2 GTE 35 TO 37 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
GTE, one input at a time, lm 0, no other command bits. Cases: zero = every register 0;
unit = RT, LLM, LCM 1000h on the diagonal, the rest 0; V0 (100,200,400), V1 (110,220,440),
V2 (120,240,480), IR0 800, IR1 130, IR2 260, IR3 4C0, RGBC 40302010, SXY0-2 00200010
00400030 00600050, SZ0-3 100 200 300 400, MAC0 12345: each alone with the unit matrices.
TR (100,200,400), BK (110,220,440), FC (120,240,480), OFX A00000 OFY 780000, H 200, DQA
100, DQB 1400000, ZSF3 155, ZSF4 100: each alone, the rest 0. RTxV, LLMxV, LCMxV: that
matrix (800 100 200 / 300 900 400 / 500 600 A00, plus 10h for LLM, 20h for LCM) with V0,
V1, V2 and IR1-3 as above. Each row: sf 1 changes as reg=hex and F=FLAG; after | the
registers where sf 0 differs from sf 1 (63 is FLAG), or = when none.
op 35:
zero: F=80020000 | =
unit: F=80020000 | =
V0: F=80020000 | =
V1: 13=3ff021f 19=220 F=80022000 | 13=3ff03ff 63=81836000
V2: 9=120 10=240 14=3ff023f 25=120 26=240 28=82 F=80022000 | 9=7fff 10=7fff 14=3ff03ff 25=120000 26=240000 28=3ff 63=81836000
IR0: 8=0 F=80020000 | =
IR1: 9=0 28=0 F=80020000 | =
IR2: 10=0 28=0 F=80020000 | =
IR3: F=80020000 | =
RGBC: F=80020000 | =
SXY: 12=0 13=0 14=0 F=80020000 | =
SZ: 16=300 17=400 18=0 19=0 F=80020000 | =
MAC0: 24=0 F=80020000 | =
TR: 9=100 10=200 13=3ff01ff 14=3ff01ff 25=100 26=200 28=82 F=80020000 | 9=7fff 10=7fff 13=3ff03ff 14=3ff03ff 25=100000 26=200000 28=3ff 63=81836000
BK: F=80020000 | =
FC: F=80020000 | =
OF: 12=7800a0 13=7800a0 14=7800a0 F=80020000 | =
H: F=80020000 | =
DQA: 8=1000 24=1ffff00 F=80021000 | =
DQB: 8=1000 24=1400000 F=80021000 | =
ZSF3: F=80020000 | =
ZSF4: F=80020000 | =
RTxV: 9=144 10=29a 13=3ff0263 19=110 25=144 26=29a 28=24a2 F=80022000 | 9=7fff 10=7fff 13=3ff03ff 25=144000 26=29a000 28=27ff 63=81836000
LLMxV: 9=0 10=0 28=2400 F=80020000 | =
LCMxV: 9=0 10=0 28=2400 F=80020000 | =
op 36:
zero: F=80020000 | =
unit: F=80020000 | =
V0: F=80020000 | =
V1: 13=3ff0000 F=80022000 | 63=80832000
V2: 9=120 10=240 14=3ff023f 25=120 26=240 28=82 F=80022000 | 9=7fff 10=7fff 14=3ff03ff 25=120000 26=240000 28=3ff 63=81836000
IR0: 8=0 F=80020000 | =
IR1: 9=0 28=0 F=80020000 | =
IR2: 10=0 28=0 F=80020000 | =
IR3: F=80020000 | =
RGBC: F=80020000 | =
SXY: 12=0 13=0 14=0 F=80020000 | =
SZ: 16=200 17=300 18=400 19=0 F=80020000 | =
MAC0: 24=0 F=80020000 | =
TR: 9=100 10=200 13=3ff0000 14=3ff01ff 25=100 26=200 28=82 F=80020000 | 9=7fff 10=7fff 14=3ff03ff 25=100000 26=200000 28=3ff 63=81836000
BK: F=80020000 | =
FC: F=80020000 | =
OF: 12=7800a0 13=7800a0 14=7800a0 F=80020000 | =
H: F=80020000 | =
DQA: 8=1000 24=1ffff00 F=80021000 | =
DQB: 8=1000 24=1400000 F=80021000 | =
ZSF3: F=80020000 | =
ZSF4: F=80020000 | =
RTxV: 9=144 10=29a 13=3ff0000 14=3ff0287 25=144 26=29a 28=24a2 F=80022000 | 9=7fff 10=7fff 14=3ff03ff 25=144000 26=29a000 28=27ff 63=81836000
LLMxV: 9=0 10=0 28=2400 F=80020000 | =
LCMxV: 9=0 10=0 28=2400 F=80020000 | =
op 37:
zero: F=80020000 | =
unit: F=80020000 | =
V0: F=80020000 | =
V1: 13=3ff0000 F=80022000 | 63=80832000
V2: 10=240 14=3ff0000 26=240 28=80 F=80022000 | 10=7fff 26=240000 28=3e0 63=80832000
IR0: 8=0 F=80020000 | =
IR1: 14=25f F=80020000 | =
IR2: 10=0 28=0 F=80020000 | =
IR3: F=80020000 | =
RGBC: F=80020000 | =
SXY: 12=0 13=0 14=0 F=80020000 | =
SZ: 16=200 17=300 18=400 19=0 F=80020000 | =
MAC0: 24=0 F=80020000 | =
TR: 10=200 13=3ff0000 14=3ff0000 26=200 28=80 F=80020000 | 10=7fff 26=200000 28=3e0 63=80832000
BK: F=80020000 | =
FC: F=80020000 | =
OF: 12=7800a0 13=7800a0 14=7800a0 F=80020000 | =
H: F=80020000 | =
DQA: 8=1000 24=1ffff00 F=80021000 | =
DQB: 8=1000 24=1400000 F=80021000 | =
ZSF3: F=80020000 | =
ZSF4: F=80020000 | =
RTxV: 10=29a 13=3ff0000 14=3ff025f 26=29a 28=24a2 F=80022000 | 10=7fff 26=29a000 28=27e2 63=80832000
LLMxV: 10=0 14=25f 28=2402 F=80020000 | =
LCMxV: 10=0 14=25f 28=2402 F=80020000 | =
Done.
===== 11 SG8 F2 GTE 38 TO 3B | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
GTE, one input at a time, lm 0, no other command bits. Cases: zero = every register 0;
unit = RT, LLM, LCM 1000h on the diagonal, the rest 0; V0 (100,200,400), V1 (110,220,440),
V2 (120,240,480), IR0 800, IR1 130, IR2 260, IR3 4C0, RGBC 40302010, SXY0-2 00200010
00400030 00600050, SZ0-3 100 200 300 400, MAC0 12345: each alone with the unit matrices.
TR (100,200,400), BK (110,220,440), FC (120,240,480), OFX A00000 OFY 780000, H 200, DQA
100, DQB 1400000, ZSF3 155, ZSF4 100: each alone, the rest 0. RTxV, LLMxV, LCMxV: that
matrix (800 100 200 / 300 900 400 / 500 600 A00, plus 10h for LLM, 20h for LCM) with V0,
V1, V2 and IR1-3 as above. Each row: sf 1 changes as reg=hex and F=FLAG; after | the
registers where sf 0 differs from sf 1 (63 is FLAG), or = when none.
op 38:
zero: F=80020000 | =
unit: F=80020000 | =
V0: F=80020000 | =
V1: F=80020000 | =
V2: 10=240 14=3ff0000 26=240 28=80 F=80022000 | 10=7fff 26=240000 28=3e0 63=80832000
IR0: 8=0 F=80020000 | =
IR1: 14=25f F=80020000 | =
IR2: 10=0 28=0 F=80020000 | =
IR3: F=80020000 | =
RGBC: F=80020000 | =
SXY: 12=0 13=0 14=0 F=80020000 | =
SZ: 16=200 17=300 18=400 19=0 F=80020000 | =
MAC0: 24=0 F=80020000 | =
TR: 10=200 14=3ff0000 26=200 28=80 F=80020000 | 10=7fff 26=200000 28=3e0 63=80832000
BK: F=80020000 | =
FC: F=80020000 | =
OF: 12=7800a0 13=7800a0 14=7800a0 F=80020000 | =
H: F=80020000 | =
DQA: 8=1000 24=1ffff00 F=80021000 | =
DQB: 8=1000 24=1400000 F=80021000 | =
ZSF3: F=80020000 | =
ZSF4: F=80020000 | =
RTxV: 10=29a 14=3ff025f 26=29a 28=24a2 F=80022000 | 10=7fff 26=29a000 28=27e2 63=80832000
LLMxV: 10=0 14=25f 28=2402 F=80020000 | =
LCMxV: 10=0 14=25f 28=2402 F=80020000 | =
op 39:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: 8=0 F=0 | =
IR1: 14=25f F=0 | =
IR2: 14=3ff0000 F=80002000 | =
IR3: F=0 | =
RGBC: F=0 | =
SXY: 12=0 13=0 14=0 F=0 | =
SZ: 16=200 17=300 18=400 19=0 F=0 | =
MAC0: 24=0 F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: 8=1000 24=1ffff00 F=1000 | =
DQB: 8=1000 24=1400000 F=1000 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 14=3ff025f F=80002000 | =
LLMxV: 14=3ff025f F=80002000 | =
LCMxV: 14=3ff025f F=80002000 | =
op 3A:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: 8=0 F=0 | =
IR1: 14=25f F=0 | =
IR2: 14=3ff0000 F=80002000 | =
IR3: F=0 | =
RGBC: F=0 | =
SXY: 12=600050 13=0 14=0 F=0 | =
SZ: 16=200 17=300 18=400 19=0 F=0 | =
MAC0: 24=0 F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: 8=1000 24=1ffff00 F=1000 | =
DQB: 8=1000 24=1400000 F=1000 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 14=3ff025f F=80002000 | =
LLMxV: 14=3ff025f F=80002000 | =
LCMxV: 14=3ff025f F=80002000 | =
op 3B:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: 8=0 F=0 | =
IR1: 14=25f F=0 | =
IR2: 14=3ff0000 F=80002000 | =
IR3: F=0 | =
RGBC: F=0 | =
SXY: 12=400030 13=600050 14=0 F=0 | =
SZ: F=0 | =
MAC0: 24=0 F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: 8=1000 24=1ffff00 F=1000 | =
DQB: 8=1000 24=1400000 F=1000 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 14=3ff025f F=80002000 | =
LLMxV: 14=3ff025f F=80002000 | =
LCMxV: 14=3ff025f F=80002000 | =
Done.
===== 12 SMS F2 MDEC SHORT | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
Short decodes by CPU at 8 bit (depth 1), unsigned, the 4bit/8bit block's tables
(kBlkQuant, kBlkScale). Pattern words: FE00h end code over a DC halfword, q_scale 1;
A has DC 16*i-256 in word i (i = 0 to 31), B has DC 240-16*i. At most 256 words shown.
No pattern (the tables were the last words in), then count 1, 1 words written: 992 words out, CRC CE4D9FAA, status 8204FFFF
8F9EA9AF 5F65717F 8F9EA9AF 5F65717F 8F9EA9AF 5F65717F 8F9EA9AF 5F65717F
8F9EA9AF 5F65717F 8F9EA9AF 5F65717F 8F9EA9AF 5F65717F 8F9EA9AF 5F65717F
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
Pattern A first (count 32: 512 words out, CRC CF32359C), then count 1, 1 words written: 496 words out, CRC 3410B6D8, status 8204FFFF
32414C52 02081422 69788389 393F4A59 B6C5D0D6 868C97A6 ECFBFFFF BCC2CEDC
ECFBFFFF BCC2CEDC B6C5D0D6 868C97A6 69788389 393F4A59 32414C52 02081422
48484848 48484848 48484848 48484848 48484848 48484848 48484848 48484848
48484848 48484848 48484848 48484848 48484848 48484848 48484848 48484848
4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C
4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C
50505050 50505050 50505050 50505050 50505050 50505050 50505050 50505050
50505050 50505050 50505050 50505050 50505050 50505050 50505050 50505050
54545454 54545454 54545454 54545454 54545454 54545454 54545454 54545454
54545454 54545454 54545454 54545454 54545454 54545454 54545454 54545454
58585858 58585858 58585858 58585858 58585858 58585858 58585858 58585858
58585858 58585858 58585858 58585858 58585858 58585858 58585858 58585858
5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C
5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C
60606060 60606060 60606060 60606060 60606060 60606060 60606060 60606060
60606060 60606060 60606060 60606060 60606060 60606060 60606060 60606060
64646464 64646464 64646464 64646464 64646464 64646464 64646464 64646464
64646464 64646464 64646464 64646464 64646464 64646464 64646464 64646464
68686868 68686868 68686868 68686868 68686868 68686868 68686868 68686868
68686868 68686868 68686868 68686868 68686868 68686868 68686868 68686868
6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C
6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C
70707070 70707070 70707070 70707070 70707070 70707070 70707070 70707070
70707070 70707070 70707070 70707070 70707070 70707070 70707070 70707070
74747474 74747474 74747474 74747474 74747474 74747474 74747474 74747474
74747474 74747474 74747474 74747474 74747474 74747474 74747474 74747474
78787878 78787878 78787878 78787878 78787878 78787878 78787878 78787878
78787878 78787878 78787878 78787878 78787878 78787878 78787878 78787878
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
Pattern B first (count 32: 512 words out, CRC BF7813E8), then count 1, 1 words written: 496 words out, CRC A468B6F1, status 8204FFFF
E6F5FFFF B6BCC7D6 B3C2CDD3 838995A3 6B7A858C 3B414D5B 39475359 080F1A29
39475359 080F1A29 6B7A858C 3B414D5B B3C2CDD3 838995A3 E6F5FFFF B6BCC7D6
B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4
B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4
B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0
B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0
ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC
ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC
A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8
A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8
A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4
A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C
9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C
98989898 98989898 98989898 98989898 98989898 98989898 98989898 98989898
98989898 98989898 98989898 98989898 98989898 98989898 98989898 98989898
94949494 94949494 94949494 94949494 94949494 94949494 94949494 94949494
94949494 94949494 94949494 94949494 94949494 94949494 94949494 94949494
90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090
90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090
8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C
8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C
88888888 88888888 88888888 88888888 88888888 88888888 88888888 88888888
88888888 88888888 88888888 88888888 88888888 88888888 88888888 88888888
84848484 84848484 84848484 84848484 84848484 84848484 84848484 84848484
84848484 84848484 84848484 84848484 84848484 84848484 84848484 84848484
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
No pattern (the tables were the last words in), then count 2, 2 words written: 480 words out, CRC CA80C555, status 8204FFFF
5694E2FF C79E6746 65A3F1FF D6AD7555 75B3FFFF E6BD8665 76B4FFFF E7BE8766
5C9AE8FF CDA46C4C 2B69B7EC 9C733C1B 003482B7 673E0600 00115F94 441B0000
B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0
B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0
ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC
ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC
A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8
A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8
A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4
A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C
9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C
98989898 98989898 98989898 98989898 98989898 98989898 98989898 98989898
98989898 98989898 98989898 98989898 98989898 98989898 98989898 98989898
94949494 94949494 94949494 94949494 94949494 94949494 94949494 94949494
94949494 94949494 94949494 94949494 94949494 94949494 94949494 94949494
90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090
90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090
8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C
8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C
88888888 88888888 88888888 88888888 88888888 88888888 88888888 88888888
88888888 88888888 88888888 88888888 88888888 88888888 88888888 88888888
84848484 84848484 84848484 84848484 84848484 84848484 84848484 84848484
84848484 84848484 84848484 84848484 84848484 84848484 84848484 84848484
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
78787878 78787878 78787878 78787878 78787878 78787878 78787878 78787878
78787878 78787878 78787878 78787878 78787878 78787878 78787878 78787878
Pattern A first (count 32: 512 words out, CRC CF32359C), then count 2, 2 words written: 480 words out, CRC 5D6A404E, status 8204FFFF
FDD99D70 2059ACEE FFE8AB7F 2E67BBFC FFF9BC8F 3F78CBFF FFF9BD90 4079CCFF
FFDFA376 265FB2F3 D3AF7245 002E81C3 9D793C10 00004C8D 7B561A00 0000296B
4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C
4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C
50505050 50505050 50505050 50505050 50505050 50505050 50505050 50505050
50505050 50505050 50505050 50505050 50505050 50505050 50505050 50505050
54545454 54545454 54545454 54545454 54545454 54545454 54545454 54545454
54545454 54545454 54545454 54545454 54545454 54545454 54545454 54545454
58585858 58585858 58585858 58585858 58585858 58585858 58585858 58585858
58585858 58585858 58585858 58585858 58585858 58585858 58585858 58585858
5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C
5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C
60606060 60606060 60606060 60606060 60606060 60606060 60606060 60606060
60606060 60606060 60606060 60606060 60606060 60606060 60606060 60606060
64646464 64646464 64646464 64646464 64646464 64646464 64646464 64646464
64646464 64646464 64646464 64646464 64646464 64646464 64646464 64646464
68686868 68686868 68686868 68686868 68686868 68686868 68686868 68686868
68686868 68686868 68686868 68686868 68686868 68686868 68686868 68686868
6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C
6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C
70707070 70707070 70707070 70707070 70707070 70707070 70707070 70707070
70707070 70707070 70707070 70707070 70707070 70707070 70707070 70707070
74747474 74747474 74747474 74747474 74747474 74747474 74747474 74747474
74747474 74747474 74747474 74747474 74747474 74747474 74747474 74747474
78787878 78787878 78787878 78787878 78787878 78787878 78787878 78787878
78787878 78787878 78787878 78787878 78787878 78787878 78787878 78787878
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
84848484 84848484 84848484 84848484 84848484 84848484 84848484 84848484
84848484 84848484 84848484 84848484 84848484 84848484 84848484 84848484
Pattern B first (count 32: 512 words out, CRC BF7813E8), then count 2, 2 words written: 480 words out, CRC CA80C555, status 8204FFFF
5694E2FF C79E6746 65A3F1FF D6AD7555 75B3FFFF E6BD8665 76B4FFFF E7BE8766
5C9AE8FF CDA46C4C 2B69B7EC 9C733C1B 003482B7 673E0600 00115F94 441B0000
B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0
B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0
ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC
ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC
A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8
A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8
A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4
A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C
9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C
98989898 98989898 98989898 98989898 98989898 98989898 98989898 98989898
98989898 98989898 98989898 98989898 98989898 98989898 98989898 98989898
94949494 94949494 94949494 94949494 94949494 94949494 94949494 94949494
94949494 94949494 94949494 94949494 94949494 94949494 94949494 94949494
90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090
90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090
8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C
8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C
88888888 88888888 88888888 88888888 88888888 88888888 88888888 88888888
88888888 88888888 88888888 88888888 88888888 88888888 88888888 88888888
84848484 84848484 84848484 84848484 84848484 84848484 84848484 84848484
84848484 84848484 84848484 84848484 84848484 84848484 84848484 84848484
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
78787878 78787878 78787878 78787878 78787878 78787878 78787878 78787878
78787878 78787878 78787878 78787878 78787878 78787878 78787878 78787878
Done.
===== 13 SSD F2 SPU DRAIN | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
SPU write FIFO drain to scratch at 30000h (32 halfwords filled EEEEh first), SPUCNT
transfer mode Stop after the wait, then all 32 read back by DMA. Pattern B000h + i.
By DMA, 16 words in one block; the wait counted from the DMA's end:
DMA, wait 0: 9 written, 0 EEEEh, 12 5555h, 11 other (first AAAA) wwwwwwwww?55??55??55??55??55??55
DMA, wait 50: 10 written, 0 EEEEh, 12 5555h, 10 other (first AAAA) wwwwwwwwww55??55??55??55??55??55
DMA, wait 100: 10 written, 0 EEEEh, 12 5555h, 10 other (first AAAA) wwwwwwwwww55??55??55??55??55??55
DMA, wait 150: 11 written, 0 EEEEh, 11 5555h, 10 other (first AAAA) wwwwwwwwwww5??55??55??55??55??55
DMA, wait 200: 11 written, 0 EEEEh, 11 5555h, 10 other (first AAAA) wwwwwwwwwww5??55??55??55??55??55
DMA, wait 250: 11 written, 0 EEEEh, 11 5555h, 10 other (first AAAA) wwwwwwwwwww5??55??55??55??55??55
DMA, wait 300: 14 written, 0 EEEEh, 10 5555h, 8 other (first AAAA) wwwwwwwwwwwwww55??55??55??55??55
DMA, wait 350: 15 written, 0 EEEEh, 9 5555h, 8 other (first AAAA) wwwwwwwwwwwwwww5??55??55??55??55
DMA, wait 400: 19 written, 0 EEEEh, 7 5555h, 6 other (first AAAA) wwwwwwwwwwwwwwwwwww5??55??55??55
DMA, wait 450: 19 written, 0 EEEEh, 7 5555h, 6 other (first AAAA) wwwwwwwwwwwwwwwwwww5??55??55??55
DMA, wait 500: 23 written, 0 EEEEh, 5 5555h, 4 other (first AAAA) wwwwwwwwwwwwwwwwwwwwwww5??55??55
DMA, wait 550: 25 written, 0 EEEEh, 4 5555h, 3 other (first AAAA) wwwwwwwwwwwwwwwwwwwwwwwww?55??55
DMA, wait 600: 27 written, 0 EEEEh, 3 5555h, 2 other (first AAAA) wwwwwwwwwwwwwwwwwwwwwwwwwww5??55
DMA, wait 650: 28 written, 0 EEEEh, 2 5555h, 2 other (first AAAA) wwwwwwwwwwwwwwwwwwwwwwwwwwww??55
DMA, wait 700: 31 written, 0 EEEEh, 1 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwww5
DMA, wait 750: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
DMA, wait 800: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
DMA, wait 850: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
DMA, wait 900: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
By hand, 16 halfwords (B000h-B00Fh) to the FIFO, then Manual Write; the wait counted
from the SPUCNT store:
manual, wait 0: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 50: 0 written, 0 EEEEh, 0 5555h, 32 other (first B002) ????????????????????????????????
manual, wait 100: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 150: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 200: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 250: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 300: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 350: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 400: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 450: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 500: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 550: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 600: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 650: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 700: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 750: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 800: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 850: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 900: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
SPUSTAT after the Manual Write store, status@timer 2:
0000@53 0000@86 0000@119 0000@152 0000@185 0410@218 0410@257 0410@290
0410@323 0410@356 0410@389 0410@422 0410@455 0410@488 0410@521 0410@554
0410@587 0410@620 0410@653 0410@686 0410@719 0410@752 0410@785 0410@818
manual, wait 3000: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
Done.
===== 14 SMR F2 MDEC RESET | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
MDEC reset. Each row starts from a 15 bit decode with the input full (status read just
before, shown once), writes timer 2's mode, MDEC1 80000000h, then N nops, then reads
MDEC1 and timer 2. Run twice from the same state: cold, then warm. status@timer 2.
Status before the reset: E60400DF
0 nops: cold E60400C0@13, warm E6040040@6
10 nops: cold 80040000@29, warm 80040000@14
20 nops: cold 80040000@56, warm 80040000@24
30 nops: cold 80040000@74, warm 80040000@34
40 nops: cold 80040000@107, warm 80040000@44
50 nops: cold 80040000@123, warm 80040000@54
60 nops: cold 80040000@149, warm 80040000@64
70 nops: cold 80040000@168, warm 80040000@74
80 nops: cold 80040000@195, warm 80040000@84
90 nops: cold 80040000@213, warm 80040000@154
100 nops: cold 80040000@241, warm 80040000@104
110 nops: cold 80040000@258, warm 80040000@178
120 nops: cold 80040000@285, warm 80040000@134
130 nops: cold 80040000@303, warm 80040000@134
140 nops: cold 80040000@330, warm 80040000@144
150 nops: cold 80040000@348, warm 80040000@154
160 nops: cold 80040000@377, warm 80040000@200
170 nops: cold 80040000@393, warm 80040000@204
180 nops: cold 80040000@424, warm 80040000@235
190 nops: cold 80040000@442, warm 80040000@194
200 nops: cold 80040000@469, warm 80040000@204
Enables after a reset. From idle (a reset 2000 cycles before): MDEC1 80000000h, N nops,
MDEC1 60000000h, then MDEC1 and timer 2 read at once (status@timer 2); the status again
2000 cycles on; MDEC0 40000000h (luminance quant table) and the status; its 16 words by
DMA0 (cycles, or timeout after 200000 polls) and the status after. Run cold, then warm.
Enables rows, each with a DMA0 that times out if the enables were lost:
Control, 60000000h 2000 cycles after the reset: 80040000, later 80040000, after the command B004000F, DMA0 90, then 8004FFFF
Control, 00000000h (enables off) 2000 cycles after the reset: 80040000, later 80040000, after the command A004000F, DMA0 timeout, then A004000F
0 nops, cold: 60000000@15, later 80040000, after the command A004000F, DMA0 timeout, then A004000F
0 nops, warm: 60000000@8, later 80040000, after the command A004000F, DMA0 timeout, then A004000F
10 nops, cold: 80040000@31, later 80040000, after the command B004000F, DMA0 84, then 8004FFFF
10 nops, warm: 80040000@16, later 80040000, after the command B004000F, DMA0 94, then 8004FFFF
20 nops, cold: 80040000@58, later 80040000, after the command B004000F, DMA0 89, then 8004FFFF
20 nops, warm: 80040000@42, later 80040000, after the command B004000F, DMA0 94, then 8004FFFF
40 nops, cold: 80040000@101, later 80040000, after the command B004000F, DMA0 84, then 8004FFFF
40 nops, warm: 80040000@46, later 80040000, after the command B004000F, DMA0 84, then 8004FFFF
80 nops, cold: 80040000@196, later 80040000, after the command B004000F, DMA0 88, then 8004FFFF
80 nops, warm: 80040000@198, later 80040000, after the command B004000F, DMA0 84, then 8004FFFF
Done.
===== 15 SMF F2 MDEC FIFO | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
MDEC input FIFO: the step stream's tables, MDEC1 60000000h, timer 2 zeroed, MDEC0
38000100h (15 bit, count 256), then words 1 to 34 with no reads, each followed by an
MDEC1 load and a timer 2 load (status@timer 2). Words 33 and 34 go to a full FIFO.
The 34 words, then the reads:
After the command: B60400FF@6
w1 B60400FE@63, w2 B60400FD@94, w3 B60400FC@125, w4 B60400FB@156
w5 B60400FA@187, w6 B60400F9@218, w7 B60400F8@249, w8 B60400F7@280
w9 B60400F6@311, w10 B60400F5@342, w11 B60400F4@373, w12 B60400F3@404
w13 B60400F2@441, w14 B60400F1@472, w15 B60400F0@503, w16 B60400EF@534
w17 B60400EE@565, w18 B60400ED@596, w19 B60400EC@627, w20 B60400EB@658
w21 B60400EA@689, w22 B60400E9@722, w23 B60400E8@753, w24 B60400E7@784
w25 B60400E6@815, w26 B60400E5@846, w27 B60400E4@877, w28 B60400E3@908
w29 B60400E2@939, w30 B60400E1@975, w31 B60400E0@1006, w32 E60400DF@1037
w33 E60400DF@1068, w34 E60400DF@1099
32 words read out (value, status after the read @ cycles from the first read); status at the end B60100DF:
00000000 360000DF@1478, 00000000 360000DF@1561, 00000000 360000DF@1621, 00000000 360000DF@1681
00000000 360000DF@1741, 00000000 3E0100DF@1801, 00000000 360100DF@1864, 00000000 360100DF@1924
00000000 360100DF@1984, 00000000 360100DF@2044, 00000000 360100DF@2104, 00000000 360100DF@2164
00000000 360100DF@2224, 00000000 360100DF@2284, 00000000 360100DF@2344, 00000000 360100DF@2408
00000000 360100DF@2468, 00000000 360100DF@2528, 00000000 360100DF@2588, 00000000 360100DF@2648
00000000 360100DF@2708, 00000000 360100DF@2768, 00000000 360100DF@2828, 00000000 360100DF@2889
00000000 360100DF@2949, 00000000 360100DF@3009, 00000000 360100DF@3069, 00000000 360100DF@3129
00000000 360100DF@3189, 00000000 360100DF@3249, 00000000 360100DF@3309, 00000000 B60100DF@3369
Done.
===== 16 SDS F2 DMA SPU COST | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
DMA4 SPU write, SyncMode 1, to 30000h, delay register 1F801014h = 200931E1h (it was
200931E1). Cycles from the CHCR write until bit 24 clears, three times each.
Blocks of 1 words x 256 (256 words): 16341 16337 16333
Blocks of 2 words x 128 (256 words): 16297 16296 16293
Blocks of 3 words x 85 (255 words): 16918 16910 16910
Blocks of 4 words x 64 (256 words): 18093 18056 18095
Blocks of 5 words x 51 (255 words): 17594 17598 17598
Blocks of 6 words x 42 (252 words): 17012 16999 16999
Blocks of 8 words x 32 (256 words): 17104 17053 17091
Blocks of 12 words x 21 (252 words): 15806 15819 15819
Blocks of 16 words x 16 (256 words): 16859 16872 16904
Blocks of 24 words x 10 (240 words): 10376 10411 10371
Blocks of 31 words x 8 (248 words): 8175 8174 8174
Blocks of 32 words x 8 (256 words): 8149 8178 8178
SyncMode 0, which the CPU cannot poll during:
SyncMode 0, 256 words (BCR 00000100h, CHCR 01000001h): 1171 1116 1116; MADR then start+0, BCR 00000100, CHCR 00000001
Done.
27 September 2026 run 2
===== 14 SMR F2 MDEC RESET | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
MDEC reset. Each row starts from a 15 bit decode with the input full (status read just
before, shown once), writes timer 2's mode, MDEC1 80000000h, then N nops, then reads
MDEC1 and timer 2. Run twice from the same state: cold, then warm. status@timer 2.
Status before the reset: E60400DF
0 nops: cold E60400C0@13, warm E6040040@6
10 nops: cold 80040000@29, warm 80040000@14
20 nops: cold 80040000@56, warm 80040000@24
30 nops: cold 80040000@74, warm 80040000@34
40 nops: cold 80040000@107, warm 80040000@44
50 nops: cold 80040000@123, warm 80040000@54
60 nops: cold 80040000@149, warm 80040000@64
70 nops: cold 80040000@168, warm 80040000@74
80 nops: cold 80040000@195, warm 80040000@84
90 nops: cold 80040000@213, warm 80040000@154
100 nops: cold 80040000@241, warm 80040000@104
110 nops: cold 80040000@258, warm 80040000@178
120 nops: cold 80040000@285, warm 80040000@134
130 nops: cold 80040000@303, warm 80040000@134
140 nops: cold 80040000@330, warm 80040000@144
150 nops: cold 80040000@348, warm 80040000@154
160 nops: cold 80040000@377, warm 80040000@200
170 nops: cold 80040000@393, warm 80040000@204
180 nops: cold 80040000@424, warm 80040000@235
190 nops: cold 80040000@442, warm 80040000@194
200 nops: cold 80040000@469, warm 80040000@204
Enables after a reset. From idle (a reset 2000 cycles before): MDEC1 80000000h, N nops,
MDEC1 60000000h, then MDEC1 and timer 2 read at once (status@timer 2); the status again
2000 cycles on; MDEC0 40000000h (luminance quant table) and the status; its 16 words by
DMA0 (cycles, or timeout after 200000 polls) and the status after. Run cold, then warm.
Enables rows, each with a DMA0 that times out if the enables were lost:
Control, 60000000h 2000 cycles after the reset: 80040000, later 80040000, after the command B004000F, DMA0 90, then 8004FFFF
Control, 00000000h (enables off) 2000 cycles after the reset: 80040000, later 80040000, after the command A004000F, DMA0 timeout, then A004000F
0 nops, cold: 60000000@15, later 80040000, after the command A004000F, DMA0 timeout, then A004000F
0 nops, warm: 60000000@8, later 80040000, after the command A004000F, DMA0 timeout, then A004000F
10 nops, cold: 80040000@31, later 80040000, after the command B004000F, DMA0 84, then 8004FFFF
10 nops, warm: 80040000@16, later 80040000, after the command B004000F, DMA0 94, then 8004FFFF
20 nops, cold: 80040000@58, later 80040000, after the command B004000F, DMA0 89, then 8004FFFF
20 nops, warm: 80040000@42, later 80040000, after the command B004000F, DMA0 94, then 8004FFFF
40 nops, cold: 80040000@101, later 80040000, after the command B004000F, DMA0 84, then 8004FFFF
40 nops, warm: 80040000@46, later 80040000, after the command B004000F, DMA0 84, then 8004FFFF
80 nops, cold: 80040000@196, later 80040000, after the command B004000F, DMA0 88, then 8004FFFF
80 nops, warm: 80040000@198, later 80040000, after the command B004000F, DMA0 84, then 8004FFFF
Done.
===== 15 SMF F2 MDEC FIFO | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
MDEC input FIFO: the step stream's tables, MDEC1 60000000h, timer 2 zeroed, MDEC0
38000100h (15 bit, count 256), then words 1 to 34 with no reads, each followed by an
MDEC1 load and a timer 2 load (status@timer 2). Words 33 and 34 go to a full FIFO.
The 34 words, then the reads:
After the command: B60400FF@6
w1 B60400FE@63, w2 B60400FD@94, w3 B60400FC@125, w4 B60400FB@156
w5 B60400FA@187, w6 B60400F9@218, w7 B60400F8@249, w8 B60400F7@280
w9 B60400F6@311, w10 B60400F5@342, w11 B60400F4@373, w12 B60400F3@404
w13 B60400F2@441, w14 B60400F1@472, w15 B60400F0@503, w16 B60400EF@534
w17 B60400EE@565, w18 B60400ED@596, w19 B60400EC@627, w20 B60400EB@658
w21 B60400EA@689, w22 B60400E9@722, w23 B60400E8@753, w24 B60400E7@784
w25 B60400E6@815, w26 B60400E5@846, w27 B60400E4@877, w28 B60400E3@908
w29 B60400E2@939, w30 B60400E1@975, w31 B60400E0@1006, w32 E60400DF@1037
w33 E60400DF@1068, w34 E60400DF@1099
32 words read out (value, status after the read @ cycles from the first read); status at the end B60100DF:
00000000 360000DF@1478, 00000000 360000DF@1561, 00000000 360000DF@1621, 00000000 360000DF@1681
00000000 360000DF@1741, 00000000 3E0100DF@1801, 00000000 360100DF@1864, 00000000 360100DF@1924
00000000 360100DF@1984, 00000000 360100DF@2044, 00000000 360100DF@2104, 00000000 360100DF@2164
00000000 360100DF@2224, 00000000 360100DF@2284, 00000000 360100DF@2344, 00000000 360100DF@2408
00000000 360100DF@2468, 00000000 360100DF@2528, 00000000 360100DF@2588, 00000000 360100DF@2648
00000000 360100DF@2708, 00000000 360100DF@2768, 00000000 360100DF@2828, 00000000 360100DF@2889
00000000 360100DF@2949, 00000000 360100DF@3009, 00000000 360100DF@3069, 00000000 360100DF@3129
00000000 360100DF@3189, 00000000 360100DF@3249, 00000000 360100DF@3309, 00000000 B60100DF@3369
Done.
===== 16 SDS F2 DMA SPU COST | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
DMA4 SPU write, SyncMode 1, to 30000h, delay register 1F801014h = 200931E1h (it was
200931E1). Cycles from the CHCR write until bit 24 clears, three times each.
Blocks of 1 words x 256 (256 words): 16341 16337 16333
Blocks of 2 words x 128 (256 words): 16297 16296 16293
Blocks of 3 words x 85 (255 words): 16918 16910 16910
Blocks of 4 words x 64 (256 words): 18093 18056 18095
Blocks of 5 words x 51 (255 words): 17594 17598 17598
Blocks of 6 words x 42 (252 words): 17012 16999 16999
Blocks of 8 words x 32 (256 words): 17104 17053 17091
Blocks of 12 words x 21 (252 words): 15806 15819 15819
Blocks of 16 words x 16 (256 words): 16859 16872 16904
Blocks of 24 words x 10 (240 words): 10376 10411 10371
Blocks of 31 words x 8 (248 words): 8175 8174 8174
Blocks of 32 words x 8 (256 words): 8149 8178 8178
SyncMode 0, which the CPU cannot poll during:
SyncMode 0, 256 words (BCR 00000100h, CHCR 01000001h): 1171 1116 1116; MADR then start+0, BCR 00000100, CHCR 00000001
Done.
27 September 2026 run 3
===== 00 RUN | BIOS 19951204 System ROM Version 3.0 11/18/96 A
16 tests
A chain program, linked at 80100000
Saved on the card in slot 2, from image 1
COP0 at start: BPC 00000000 BDA 00000000 TAR 80016128 DCIC 00000000 BadVaddr 00000480 BDAM 00000000
BPCM 00000000 SR 00000000 Cause 00000020 EPC 80016C84 PRId 00000002
===== 01 SDI F2 DICR POLL | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
DICR written with timer 2 zeroed just before it. Interrupts off (SR IEc 0) throughout.
DICR 0 is the scale: its loop runs all 300 turns, so timer 2 over 300 gives one turn.
I_STAT bit 3, a loop of one I_STAT load a turn (lw, addiu, andi, sltiu, sltu, and, bnez, nop):
DICR 00000000: the bit never set in 300 turns; timer 2 after them 3606
DICR 00008000: the bit was set on turn 2; timer 2 after the loop 24
DICR 00008000: the bit was set on turn 2; timer 2 after the loop 24
DICR 00008000: the bit was set on turn 2; timer 2 after the loop 24
I_STAT bit 3, eight I_STAT loads back to back:
DICR 00000000: I_STAT bit 3 after each of the 8 loads: 0 0 0 0 0 0 0 0; timer 2 after them 42
DICR 00008000: I_STAT bit 3 after each of the 8 loads: 0 0 1 1 1 1 1 1; timer 2 after them 32
DICR 00008000: I_STAT bit 3 after each of the 8 loads: 0 0 1 1 1 1 1 1; timer 2 after them 32
DICR 00008000: I_STAT bit 3 after each of the 8 loads: 0 0 1 1 1 1 1 1; timer 2 after them 32
CAUSE.IP2, a loop of one mfc0 CAUSE a turn (the same loop), I_MASK 00000008:
DICR 00000000: the bit never set in 300 turns; timer 2 after them 2408
DICR 00008000: the bit was set on turn 2; timer 2 after the loop 16
DICR 00008000: the bit was set on turn 2; timer 2 after the loop 16
DICR 00008000: the bit was set on turn 2; timer 2 after the loop 16
CAUSE.IP2, eight mfc0 CAUSE back to back, I_MASK 00000008:
DICR 00000000: CAUSE.IP2 after each of the 8 loads: 0 0 0 0 0 0 0 0; timer 2 after them 17
DICR 00008000: CAUSE.IP2 after each of the 8 loads: 0 0 0 0 0 0 0 1; timer 2 after them 8
DICR 00008000: CAUSE.IP2 after each of the 8 loads: 0 0 0 0 0 0 0 1; timer 2 after them 8
DICR 00008000: CAUSE.IP2 after each of the 8 loads: 0 0 0 0 0 0 0 1; timer 2 after them 8
DICR was 04000000 and is back to 0, then its enables.
Done.
===== 02 SIM F2 IMASK UPPER | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
I_MASK's upper half. Each row stores to I_MASK and loads it back; the value is
12345678h unless the row says otherwise. Interrupts off. The RAM word is 5AA5C33Ch, the
BIOS word at BFC00100h is its date, the scratchpad word is written 7EE71234h first.
a: sw $9,1074h($8) (AD091074h), lw (code at 80106030): cached 00400678 then 12340678, uncached 03E00678
b: sw $10,1074h($8) (AD0A1074h), lw (code at 80106050): cached 35290678 then 12340678, uncached 03E00678
c: sw $9,4($11) (AD690004h), lw (code at 80106074): cached 34090678 then 12340678, uncached 03E00678
d: value 0000FFFFh, sw $9,1074h($8), lw (code at 80106098): cached 3C0907FF then 000007FF, uncached 03E007FF
e: sw, lw of RAM, nop, lw (code at 801060B4): cached 5AA50678 then 5AA50678, uncached 03E00678
f: sw, lw of BIOS BFC00100h, nop, lw (code at 801060E4): cached 00000678 then 27BD0678, uncached 03E00678
g: sw, lw of GPUSTAT, nop, lw (code at 80106110): cached 3C090678 then 27BD0678, uncached 03E00678
h: sw, lw of scratchpad, nop, lw (code at 80106138): cached 00000678 then 27BD0678, uncached 03E00678
i: sw, lw of I_STAT, nop, lw (code at 80106160): cached 3C080678 then 27BD0678, uncached 03E00678
j: lw of RAM, nop, sw, lw (code at 80106188): cached 3C090678 then 12340678, uncached 03E00678
k: sw, 4 nops, lw (code at 801061B8): cached 3C090678 then 27BD0678, uncached 03E00678
l: sw, lw of timer 2's counter, nop, lw (code at 801061E8): cached 00000678 then 27BD0678, uncached 03E00678
GPUSTAT now 5606200F. I_MASK back to 00000009.
Done.
===== 03 STH F2 T1 HBLANK SYNC1 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
Timer1 sync mode 1 (reset at vblank), set at the vblank IRQ (I_STAT bit 0, polled);
timer 2 counts system cycles from then. Each sample is timer 2 then timer 1 (t:v).
Hblank clock (mode 0103h), run 1, every sample (141):
47033:21 47073:21 47124:22 47175:22 47226:22 47277:22 47319:22 47370:22
47421:22 47472:22 47523:22 47574:22 47625:22 47676:22 47727:22 47769:22
47820:22 47871:22 47922:22 47973:22 48024:22 48075:22 48126:22 48177:22
48229:22 48271:22 48322:22 48373:22 48424:22 48485:22 48527:22 48569:22
48620:22 48671:22 48722:22 48769:22 48820:22 48871:22 48922:22 48973:22
49024:22 49075:22 49126:22 49177:22 49219:22 49270:23 49321:23 49372:23
49423:23 49474:23 49525:23 49576:23 49627:23 49669:23 49720:23 49771:23
49822:23 49873:23 49924:23 49975:23 50026:23 50077:23 50119:23 50170:23
50221:23 50274:23 50325:23 50376:23 50427:23 50469:23 50520:23 50571:23
50622:23 50673:23 50724:23 50775:23 50826:23 50877:23 50919:23 50970:23
51021:23 51072:23 51123:23 51174:23 51225:23 51276:23 51327:23 51369:23
51420:23 51471:24 51522:24 51573:24 51624:24 51675:24 51726:24 51777:24
51819:24 51870:24 51921:24 51972:0 52023:0 52074:0 52125:0 52176:0
52227:0 52269:0 52322:0 52373:0 52424:0 52475:0 52526:0 52578:0
52620:0 52671:0 52722:0 52773:0 52824:0 52875:0 52926:0 52977:0
53019:0 53070:0 53121:0 53172:0 53223:0 53274:0 53325:0 53376:0
53427:0 53469:0 53520:0 53571:0 53622:0 53673:0 53724:0 53775:0
53826:0 53877:0 53919:0 53970:0 54021:0
Hblank clock (mode 0103h), run 1, 141 samples; where timer 1 changes: 47073:21->47124:22 49219:22->49270:23 51420:23->51471:24 51921:24->51972:0
Hblank clock (mode 0103h), run 2, 141 samples; where timer 1 changes: 47124:21->47175:22 49276:22->49327:23 51426:23->51477:24 51927:24->51969:0
Hblank clock (mode 0103h), run 3, 141 samples; where timer 1 changes: 47124:21->47175:22 49274:22->49325:23 51425:23->51476:24 51926:24->51977:0
Hblank clock (mode 0103h), run 4, 141 samples; where timer 1 changes: 47076:21->47127:22 49222:22->49273:23 51372:23->51423:24 51924:24->51975:0
System clock (mode 0003h), 141 samples; where timer 1 drops: 49374:49374->49425:13; last sample 54021:4609
Done.
===== 04 SG1 F2 GTE 02 TO 07 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
GTE, one input at a time, lm 0, no other command bits. Cases: zero = every register 0;
unit = RT, LLM, LCM 1000h on the diagonal, the rest 0; V0 (100,200,400), V1 (110,220,440),
V2 (120,240,480), IR0 800, IR1 130, IR2 260, IR3 4C0, RGBC 40302010, SXY0-2 00200010
00400030 00600050, SZ0-3 100 200 300 400, MAC0 12345: each alone with the unit matrices.
TR (100,200,400), BK (110,220,440), FC (120,240,480), OFX A00000 OFY 780000, H 200, DQA
100, DQB 1400000, ZSF3 155, ZSF4 100: each alone, the rest 0. RTxV, LLMxV, LCMxV: that
matrix (800 100 200 / 300 900 400 / 500 600 A00, plus 10h for LLM, 20h for LCM) with V0,
V1, V2 and IR1-3 as above. Each row: sf 1 changes as reg=hex and F=FLAG; after | the
registers where sf 0 differs from sf 1 (63 is FLAG), or = when none.
op 02:
zero: F=80020000 | =
unit: F=80020000 | =
V0: 9=100 10=200 19=100 25=100 26=200 28=82 F=0 | 9=7fff 10=7fff 25=100000 26=200000 28=3ff 63=81800000
V1: F=80020000 | =
V2: F=80020000 | =
IR0: 8=0 F=80020000 | =
IR1: 9=0 28=0 F=80020000 | =
IR2: 10=0 28=0 F=80020000 | =
IR3: F=80020000 | =
RGBC: F=80020000 | =
SXY: 12=400030 13=600050 14=0 F=80020000 | =
SZ: 16=200 17=300 18=400 19=0 F=80020000 | =
MAC0: 24=0 F=80020000 | =
TR: 9=100 10=200 14=3ff01ff 25=100 26=200 28=82 F=80020000 | 9=7fff 10=7fff 14=3ff03ff 25=100000 26=200000 28=3ff 63=81836000
BK: F=80020000 | =
FC: F=80020000 | =
OF: 14=7800a0 F=80020000 | =
H: F=80020000 | =
DQA: 8=1000 24=1ffff00 F=80021000 | =
DQB: 8=1000 24=1400000 F=80021000 | =
ZSF3: F=80020000 | =
ZSF4: F=80020000 | =
RTxV: 9=120 10=250 19=80 25=120 26=250 F=0 | 9=7fff 10=7fff 25=120000 26=250000 28=27ff 63=81800000
LLMxV: 9=0 10=0 28=2400 F=80020000 | =
LCMxV: 9=0 10=0 28=2400 F=80020000 | =
op 03:
zero: F=80020000 | =
unit: F=80020000 | =
V0: 10=200 14=3ff0000 26=200 28=80 F=80020000 | 10=7fff 26=200000 28=3e0 63=80832000
V1: F=80020000 | =
V2: F=80020000 | =
IR0: 8=0 F=80020000 | =
IR1: 14=25f F=80020000 | =
IR2: 10=0 28=0 F=80020000 | =
IR3: F=80020000 | =
RGBC: F=80020000 | =
SXY: 12=400030 13=600050 14=0 F=80020000 | =
SZ: 16=200 17=300 18=400 19=0 F=80020000 | =
MAC0: 24=0 F=80020000 | =
TR: 10=200 14=3ff0000 26=200 28=80 F=80020000 | 10=7fff 26=200000 28=3e0 63=80832000
BK: F=80020000 | =
FC: F=80020000 | =
OF: 14=7800a0 F=80020000 | =
H: F=80020000 | =
DQA: 8=1000 24=1ffff00 F=80021000 | =
DQB: 8=1000 24=1400000 F=80021000 | =
ZSF3: F=80020000 | =
ZSF4: F=80020000 | =
RTxV: 10=250 14=3ff025f 26=250 F=80022000 | 10=7fff 26=250000 28=27e2 63=80832000
LLMxV: 10=0 14=25f 28=2402 F=80020000 | =
LCMxV: 10=0 14=25f 28=2402 F=80020000 | =
op 04:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: 8=0 F=0 | =
IR1: 14=25f F=0 | =
IR2: 14=3ff0000 F=80002000 | =
IR3: F=0 | =
RGBC: F=0 | =
SXY: 12=400030 13=600050 14=0 F=0 | =
SZ: F=0 | =
MAC0: 24=0 F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: 8=1000 24=1ffff00 F=1000 | =
DQB: 8=1000 24=1400000 F=1000 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 14=3ff025f F=80002000 | =
LLMxV: 14=3ff025f F=80002000 | =
LCMxV: 14=3ff025f F=80002000 | =
op 07:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: F=0 | =
IR2: F=0 | =
IR3: F=0 | =
RGBC: F=0 | =
SXY: 24=fffff600 F=0 | =
SZ: F=0 | =
MAC0: 24=0 F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | 24=120
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: F=0 | =
LLMxV: F=0 | =
LCMxV: F=0 | =
Done.
===== 05 SG2 F2 GTE 08 TO 17 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
GTE, one input at a time, lm 0, no other command bits. Cases: zero = every register 0;
unit = RT, LLM, LCM 1000h on the diagonal, the rest 0; V0 (100,200,400), V1 (110,220,440),
V2 (120,240,480), IR0 800, IR1 130, IR2 260, IR3 4C0, RGBC 40302010, SXY0-2 00200010
00400030 00600050, SZ0-3 100 200 300 400, MAC0 12345: each alone with the unit matrices.
TR (100,200,400), BK (110,220,440), FC (120,240,480), OFX A00000 OFY 780000, H 200, DQA
100, DQB 1400000, ZSF3 155, ZSF4 100: each alone, the rest 0. RTxV, LLMxV, LCMxV: that
matrix (800 100 200 / 300 900 400 / 500 600 A00, plus 10h for LLM, 20h for LCM) with V0,
V1, V2 and IR1-3 as above. Each row: sf 1 changes as reg=hex and F=FLAG; after | the
registers where sf 0 differs from sf 1 (63 is FLAG), or = when none.
op 08:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: F=0 | =
IR2: F=0 | =
IR3: F=0 | =
RGBC: F=0 | =
SXY: 24=fffff200 F=0 | =
SZ: F=0 | =
MAC0: 24=0 F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: 24=120 F=0 | 24=0
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: F=0 | =
LLMxV: F=0 | =
LCMxV: F=0 | =
op 09:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: F=0 | =
IR2: F=0 | =
IR3: F=0 | =
RGBC: F=0 | =
SXY: 24=ffffe000 F=0 | =
SZ: F=0 | =
MAC0: 24=0 F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: 24=120 F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: F=0 | =
LLMxV: F=0 | =
LCMxV: F=0 | =
op 0A:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: F=0 | =
IR2: F=0 | =
IR3: F=0 | =
RGBC: F=0 | =
SXY: 24=ffffe000 F=0 | =
SZ: F=0 | =
MAC0: 24=0 F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: 24=120 F=0 | 24=0
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: F=0 | =
LLMxV: F=0 | =
LCMxV: F=0 | =
op 0D:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=0 10=130 11=fffffed0 26=130 27=fffffed0 28=40 F=0 | 10=7fff 11=ffff8000 26=130000 27=ffed0000 28=3e0 63=80c00000
IR2: 9=fffffda0 10=0 11=260 25=fffffda0 27=260 28=1000 F=0 | 9=ffff8000 11=7fff 25=ffda0000 27=260000 28=7c00 63=81400000
IR3: 10=fffffb40 11=0 26=fffffb40 28=0 F=0 | 10=ffff8000 26=ffb40000 63=80800000
RGBC: F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | 9=120 25=120 28=2
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=fffffe84 10=fffffe5e 11=85 25=fffffe84 26=fffffe5e 27=85 28=400 F=0 | 9=ffff8000 10=ffff8000 11=7fff 25=ffe84000 26=ffe5e000 27=85000 28=7c00 63=81c00000
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=0 10=0 11=0 28=0 F=0 | =
op 0E:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 10=260 11=fffffed0 26=260 27=fffffed0 28=82 F=0 | 10=7fff 11=ffff8000 26=8130000 27=ffed0000 28=3e2 63=80c00000
IR2: 10=0 28=0 F=0 | =
IR3: 10=fffff680 11=0 26=fffff680 28=0 F=0 | 10=ffff8000 26=ff680000 63=80800000
RGBC: F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | 11=120 27=120 28=800
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 10=fffffc53 11=ffffff55 26=fffffc53 27=ffffff55 28=2 F=0 | 10=7fff 11=ffff8000 26=3bfe000 27=fff55000 28=3e2 63=80c00000
LLMxV: 10=0 11=0 28=2 F=0 | =
LCMxV: 10=0 11=0 28=2 F=0 | =
op 15:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=0 28=0 F=0 | =
IR2: 10=0 28=0 F=0 | =
IR3: 11=0 28=0 F=0 | =
RGBC: 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | 63=81c00000
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=0 10=0 11=0 28=0 F=0 | =
op 17:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=0 28=0 F=0 | 63=81000000
IR2: 10=0 28=0 F=0 | 63=80800000
IR3: 11=0 28=0 F=0 | 63=400000
RGBC: 20=40000000 21=40000000 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: F=0 | 63=81c00000
FC: F=0 | 63=81c00000
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=0 10=0 11=0 28=0 F=0 | 63=81c00000
Done.
===== 06 SG3 F2 GTE 18 TO 1F | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
GTE, one input at a time, lm 0, no other command bits. Cases: zero = every register 0;
unit = RT, LLM, LCM 1000h on the diagonal, the rest 0; V0 (100,200,400), V1 (110,220,440),
V2 (120,240,480), IR0 800, IR1 130, IR2 260, IR3 4C0, RGBC 40302010, SXY0-2 00200010
00400030 00600050, SZ0-3 100 200 300 400, MAC0 12345: each alone with the unit matrices.
TR (100,200,400), BK (110,220,440), FC (120,240,480), OFX A00000 OFY 780000, H 200, DQA
100, DQB 1400000, ZSF3 155, ZSF4 100: each alone, the rest 0. RTxV, LLMxV, LCMxV: that
matrix (800 100 200 / 300 900 400 / 500 600 A00, plus 10h for LLM, 20h for LCM) with V0,
V1, V2 and IR1-3 as above. Each row: sf 1 changes as reg=hex and F=FLAG; after | the
registers where sf 0 differs from sf 1 (63 is FLAG), or = when none.
op 18:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=0 28=0 F=0 | =
IR2: 10=0 28=0 F=0 | =
IR3: 11=0 28=0 F=0 | =
RGBC: 20=40000000 21=40000000 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | 63=81c00000
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=0 10=0 11=0 28=0 F=0 | =
op 19:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=0 28=0 F=0 | =
IR2: 10=0 28=0 F=0 | =
IR3: 11=0 28=0 F=0 | =
RGBC: 21=40000000 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | 63=81c00000
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=0 10=0 11=0 28=0 F=0 | =
op 1D:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=0 28=0 F=0 | =
IR2: 10=0 28=0 F=0 | =
IR3: 11=0 28=0 F=0 | =
RGBC: 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=0 10=0 11=0 28=0 F=0 | =
op 1F:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=0 28=0 F=0 | =
IR2: 10=0 28=0 F=0 | =
IR3: 11=0 28=0 F=0 | =
RGBC: 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: 9=110 10=220 11=440 22=442211 25=110 26=220 27=440 28=2082 F=0 | 9=7fff 10=7fff 11=7fff 22=ffffff 25=110000 26=220000 27=440000 28=7fff 63=81f80000
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=0 10=0 11=0 28=0 F=0 | =
Done.
===== 07 SG4 F2 GTE 21 TO 23 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
GTE, one input at a time, lm 0, no other command bits. Cases: zero = every register 0;
unit = RT, LLM, LCM 1000h on the diagonal, the rest 0; V0 (100,200,400), V1 (110,220,440),
V2 (120,240,480), IR0 800, IR1 130, IR2 260, IR3 4C0, RGBC 40302010, SXY0-2 00200010
00400030 00600050, SZ0-3 100 200 300 400, MAC0 12345: each alone with the unit matrices.
TR (100,200,400), BK (110,220,440), FC (120,240,480), OFX A00000 OFY 780000, H 200, DQA
100, DQB 1400000, ZSF3 155, ZSF4 100: each alone, the rest 0. RTxV, LLMxV, LCMxV: that
matrix (800 100 200 / 300 900 400 / 500 600 A00, plus 10h for LLM, 20h for LCM) with V0,
V1, V2 and IR1-3 as above. Each row: sf 1 changes as reg=hex and F=FLAG; after | the
registers where sf 0 differs from sf 1 (63 is FLAG), or = when none.
op 21:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 22=13 25=130 F=0 | 9=7fff 22=ff 25=130000 28=1f 63=81200000
IR2: 22=2600 26=260 F=0 | 10=7fff 22=ff00 26=260000 28=3e0 63=80900000
IR3: 22=4c0000 27=4c0 F=0 | 11=7fff 22=ff0000 27=4c0000 28=7c00 63=480000
RGBC: 20=40000000 21=40000000 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: 9=110 10=220 11=440 20=442211 21=442211 22=442211 25=110 26=220 27=440 28=2082 F=0 | 9=7fff 10=7fff 11=7fff 20=ffffff 21=ffffff 22=ffffff 25=110000 26=220000 27=440000 28=7fff 63=81f80000
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=166 10=2cf 11=44b 22=442c16 25=166 26=2cf 27=44b 28=20a2 F=0 | 9=7fff 10=7fff 11=7fff 22=ffffff 25=166a00 26=2cfa00 27=44ba00 28=7fff 63=81f80000
op 22:
zero: 20=ff F=0 | 20=0
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 22=13 25=130 F=0 | 9=7fff 20=13 22=ff 25=130000 28=1f 63=81200000
IR2: 20=ff 22=2600 26=260 F=0 | 10=7fff 20=0 22=ff00 26=260000 28=3e0 63=80900000
IR3: 22=4c0000 27=4c0 F=0 | 11=7fff 22=ff0000 27=4c0000 28=7c00 63=480000
RGBC: 20=40000000 21=40000000 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: 9=110 10=220 11=440 20=442200 21=442211 22=442211 25=110 26=220 27=440 28=2082 F=0 | 9=7fff 10=7fff 11=7fff 20=ffff11 21=ffffff 22=ffffff 25=110000 26=220000 27=440000 28=7fff 63=81f80000
FC: 20=ff F=0 | 20=0
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=166 10=2cf 11=44b 22=442c16 25=166 26=2cf 27=44b 28=20a2 F=0 | 9=7fff 10=7fff 11=7fff 20=16 22=ffffff 25=166a00 26=2cfa00 27=44ba00 28=7fff 63=81f80000
op 23:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 22=13 25=130 F=0 | 9=7fff 22=ff 25=130000 28=1f 63=81200000
IR2: 22=2600 26=260 F=0 | 10=7fff 22=ff00 26=260000 28=3e0 63=80900000
IR3: 22=4c0000 27=4c0 F=0 | 11=7fff 22=ff0000 27=4c0000 28=7c00 63=480000
RGBC: 20=40000000 21=40000000 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: 9=110 10=220 11=440 20=440000 21=442211 22=442211 25=110 26=220 27=440 28=2082 F=0 | 9=7fff 10=7fff 11=7fff 20=ff0000 21=ffffff 22=ffffff 25=110000 26=220000 27=440000 28=7fff 63=81f80000
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=166 10=2cf 11=44b 22=442c16 25=166 26=2cf 27=44b 28=20a2 F=0 | 9=7fff 10=7fff 11=7fff 22=ffffff 25=166a00 26=2cfa00 27=44ba00 28=7fff 63=81f80000
Done.
===== 08 SG5 F2 GTE 24 TO 27 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
GTE, one input at a time, lm 0, no other command bits. Cases: zero = every register 0;
unit = RT, LLM, LCM 1000h on the diagonal, the rest 0; V0 (100,200,400), V1 (110,220,440),
V2 (120,240,480), IR0 800, IR1 130, IR2 260, IR3 4C0, RGBC 40302010, SXY0-2 00200010
00400030 00600050, SZ0-3 100 200 300 400, MAC0 12345: each alone with the unit matrices.
TR (100,200,400), BK (110,220,440), FC (120,240,480), OFX A00000 OFY 780000, H 200, DQA
100, DQB 1400000, ZSF3 155, ZSF4 100: each alone, the rest 0. RTxV, LLMxV, LCMxV: that
matrix (800 100 200 / 300 900 400 / 500 600 A00, plus 10h for LLM, 20h for LCM) with V0,
V1, V2 and IR1-3 as above. Each row: sf 1 changes as reg=hex and F=FLAG; after | the
registers where sf 0 differs from sf 1 (63 is FLAG), or = when none.
op 24:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 22=13 25=130 F=0 | 9=7fff 22=ff 25=130000 28=1f 63=81200000
IR2: 22=2600 26=260 F=0 | 10=7fff 22=ff00 26=260000 28=3e0 63=80900000
IR3: 22=4c0000 27=4c0 F=0 | 11=7fff 22=ff0000 27=4c0000 28=7c00 63=480000
RGBC: 21=40000000 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: 9=110 10=220 11=440 21=442211 22=442211 25=110 26=220 27=440 28=2082 F=0 | 9=7fff 10=7fff 11=7fff 21=ffffff 22=ffffff 25=110000 26=220000 27=440000 28=7fff 63=81f80000
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=166 10=2cf 11=44b 22=442c16 25=166 26=2cf 27=44b 28=20a2 F=0 | 9=7fff 10=7fff 11=7fff 22=ffffff 25=166a00 26=2cfa00 27=44ba00 28=7fff 63=81f80000
op 25:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 22=13 25=130 F=0 | 9=7fff 22=ff 25=130000 28=1f 63=81200000
IR2: 22=2600 26=260 F=0 | 10=7fff 22=ff00 26=260000 28=3e0 63=80900000
IR3: 22=4c0000 27=4c0 F=0 | 11=7fff 22=ff0000 27=4c0000 28=7c00 63=480000
RGBC: 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: 9=110 10=220 11=440 22=442211 25=110 26=220 27=440 28=2082 F=0 | 9=7fff 10=7fff 11=7fff 22=ffffff 25=110000 26=220000 27=440000 28=7fff 63=81f80000
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=166 10=2cf 11=44b 22=442c16 25=166 26=2cf 27=44b 28=20a2 F=0 | 9=7fff 10=7fff 11=7fff 22=ffffff 25=166a00 26=2cfa00 27=44ba00 28=7fff 63=81f80000
op 26:
zero: 22=ff F=0 | =
unit: 22=ff F=0 | =
V0: 22=ff F=0 | =
V1: 22=ff F=0 | =
V2: 22=ff F=0 | =
IR0: 22=ff F=0 | =
IR1: 22=ff F=0 | =
IR2: 22=26ff 26=260 F=0 | 10=7fff 22=ffff 26=260000 28=3e0 63=80900000
IR3: 22=4c00ff 27=4c0 F=0 | 11=7fff 22=ff00ff 27=4c0000 28=7c00 63=480000
RGBC: 22=400000ff F=0 | =
SXY: 22=ff F=0 | =
SZ: 22=ff F=0 | =
MAC0: 22=ff F=0 | =
TR: 22=ff F=0 | =
BK: 10=220 11=440 22=4422ff 26=220 27=440 28=2080 F=0 | 10=7fff 11=7fff 22=ffffff 26=220000 27=440000 28=7fe0 63=80d80000
FC: 22=ff F=0 | =
OF: 22=ff F=0 | =
H: 22=ff F=0 | =
DQA: 22=ff F=0 | =
DQB: 22=ff F=0 | =
ZSF3: 22=ff F=0 | =
ZSF4: 22=ff F=0 | =
RTxV: 10=0 11=0 22=ff 28=2 F=0 | =
LLMxV: 10=0 11=0 22=ff 28=2 F=0 | =
LCMxV: 10=2cf 11=44b 22=442cff 26=2cf 27=44b 28=20a2 F=0 | 10=7fff 11=7fff 22=ffffff 26=2cfa00 27=44ba00 28=7fe2 63=80d80000
op 27:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: F=0 | =
IR2: F=0 | =
IR3: 22=4c0000 27=4c0 F=0 | 11=7fff 22=ff0000 27=4c0000 28=7c00 63=480000
RGBC: 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: 11=440 22=440000 27=440 28=2000 F=0 | 11=7fff 22=ff0000 27=440000 28=7c00 63=480000
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 11=0 28=82 F=0 | =
LLMxV: 11=0 28=82 F=0 | =
LCMxV: 11=44b 22=440000 27=44b 28=2082 F=0 | 11=7fff 22=ff0000 27=44ba00 28=7c82 63=480000
Done.
===== 09 SG6 F2 GTE 2B TO 34 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
GTE, one input at a time, lm 0, no other command bits. Cases: zero = every register 0;
unit = RT, LLM, LCM 1000h on the diagonal, the rest 0; V0 (100,200,400), V1 (110,220,440),
V2 (120,240,480), IR0 800, IR1 130, IR2 260, IR3 4C0, RGBC 40302010, SXY0-2 00200010
00400030 00600050, SZ0-3 100 200 300 400, MAC0 12345: each alone with the unit matrices.
TR (100,200,400), BK (110,220,440), FC (120,240,480), OFX A00000 OFY 780000, H 200, DQA
100, DQB 1400000, ZSF3 155, ZSF4 100: each alone, the rest 0. RTxV, LLMxV, LCMxV: that
matrix (800 100 200 / 300 900 400 / 500 600 A00, plus 10h for LLM, 20h for LCM) with V0,
V1, V2 and IR1-3 as above. Each row: sf 1 changes as reg=hex and F=FLAG; after | the
registers where sf 0 differs from sf 1 (63 is FLAG), or = when none.
op 2B:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=0 28=0 F=0 | =
IR2: 10=0 28=0 F=0 | =
IR3: 11=0 28=0 F=0 | =
RGBC: 20=40000000 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | 63=81c00000
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=0 10=0 11=0 28=0 F=0 | =
op 2C:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: F=0 | =
IR2: F=0 | =
IR3: F=0 | =
RGBC: 20=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | 63=81c00000
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: F=0 | =
LLMxV: F=0 | =
LCMxV: F=0 | =
op 2F:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=7fff 22=ff 25=130000 28=1f F=81200000 | =
IR2: 10=7fff 22=ff00 26=260000 28=3e0 F=80900000 | =
IR3: 11=7fff 22=ff0000 27=4c0000 28=7c00 F=480000 | =
RGBC: 20=40000000 21=40000000 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: 24=0 F=0 | =
TR: F=0 | =
BK: 9=7fff 10=7fff 11=7fff 20=ffffff 21=ffffff 22=ffffff 25=110000 26=220000 27=440000 28=7fff F=81f80000 | =
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=7fff 10=7fff 11=7fff 22=ffffff 25=166a00 26=2cfa00 27=44ba00 28=7fff F=81f80000 | =
op 34:
zero: F=80020000 | =
unit: F=80020000 | =
V0: F=80020000 | =
V1: 13=3ff021f F=80022000 | 13=3ff03ff 63=81836000
V2: 9=120 10=240 11=480 19=480 25=120 26=240 27=480 28=2482 F=80020000 | 9=7fff 10=7fff 11=7fff 25=120000 26=240000 27=480000 28=7fff 63=81820000
IR0: 8=0 F=80020000 | =
IR1: 9=0 28=0 F=80020000 | =
IR2: 10=0 28=0 F=80020000 | =
IR3: 11=0 28=0 F=80020000 | =
RGBC: F=80020000 | =
SXY: 12=0 13=0 14=0 F=80020000 | =
SZ: 16=300 17=400 18=0 19=0 F=80020000 | =
MAC0: 24=0 F=80020000 | =
TR: 9=100 10=200 11=400 13=3ff01ff 19=400 25=100 26=200 27=400 28=2082 F=80020000 | 9=7fff 10=7fff 11=7fff 13=3ff03ff 25=100000 26=200000 27=400000 28=7fff 63=81836000
BK: F=80020000 | =
FC: F=80020000 | =
OF: 12=7800a0 13=7800a0 14=7800a0 F=80020000 | =
H: F=80020000 | =
DQA: 8=1000 24=1ffff00 F=80021000 | =
DQB: 8=1000 24=1400000 F=80021000 | =
ZSF3: F=80020000 | =
ZSF4: F=80020000 | =
RTxV: 9=144 10=29a 11=402 13=3ff0263 19=402 25=144 26=29a 27=402 28=20a2 F=80022000 | 9=7fff 10=7fff 11=7fff 13=3ff03ff 25=144000 26=29a000 27=402000 28=7fff 63=81836000
LLMxV: 9=0 10=0 11=0 28=0 F=80020000 | =
LCMxV: 9=0 10=0 11=0 28=0 F=80020000 | =
Done.
===== 10 SG7 F2 GTE 35 TO 37 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
GTE, one input at a time, lm 0, no other command bits. Cases: zero = every register 0;
unit = RT, LLM, LCM 1000h on the diagonal, the rest 0; V0 (100,200,400), V1 (110,220,440),
V2 (120,240,480), IR0 800, IR1 130, IR2 260, IR3 4C0, RGBC 40302010, SXY0-2 00200010
00400030 00600050, SZ0-3 100 200 300 400, MAC0 12345: each alone with the unit matrices.
TR (100,200,400), BK (110,220,440), FC (120,240,480), OFX A00000 OFY 780000, H 200, DQA
100, DQB 1400000, ZSF3 155, ZSF4 100: each alone, the rest 0. RTxV, LLMxV, LCMxV: that
matrix (800 100 200 / 300 900 400 / 500 600 A00, plus 10h for LLM, 20h for LCM) with V0,
V1, V2 and IR1-3 as above. Each row: sf 1 changes as reg=hex and F=FLAG; after | the
registers where sf 0 differs from sf 1 (63 is FLAG), or = when none.
op 35:
zero: F=80020000 | =
unit: F=80020000 | =
V0: F=80020000 | =
V1: 13=3ff021f 19=220 F=80022000 | 13=3ff03ff 63=81836000
V2: 9=120 10=240 14=3ff023f 25=120 26=240 28=82 F=80022000 | 9=7fff 10=7fff 14=3ff03ff 25=120000 26=240000 28=3ff 63=81836000
IR0: 8=0 F=80020000 | =
IR1: 9=0 28=0 F=80020000 | =
IR2: 10=0 28=0 F=80020000 | =
IR3: F=80020000 | =
RGBC: F=80020000 | =
SXY: 12=0 13=0 14=0 F=80020000 | =
SZ: 16=300 17=400 18=0 19=0 F=80020000 | =
MAC0: 24=0 F=80020000 | =
TR: 9=100 10=200 13=3ff01ff 14=3ff01ff 25=100 26=200 28=82 F=80020000 | 9=7fff 10=7fff 13=3ff03ff 14=3ff03ff 25=100000 26=200000 28=3ff 63=81836000
BK: F=80020000 | =
FC: F=80020000 | =
OF: 12=7800a0 13=7800a0 14=7800a0 F=80020000 | =
H: F=80020000 | =
DQA: 8=1000 24=1ffff00 F=80021000 | =
DQB: 8=1000 24=1400000 F=80021000 | =
ZSF3: F=80020000 | =
ZSF4: F=80020000 | =
RTxV: 9=144 10=29a 13=3ff0263 19=110 25=144 26=29a 28=24a2 F=80022000 | 9=7fff 10=7fff 13=3ff03ff 25=144000 26=29a000 28=27ff 63=81836000
LLMxV: 9=0 10=0 28=2400 F=80020000 | =
LCMxV: 9=0 10=0 28=2400 F=80020000 | =
op 36:
zero: F=80020000 | =
unit: F=80020000 | =
V0: F=80020000 | =
V1: 13=3ff0000 F=80022000 | 63=80832000
V2: 9=120 10=240 14=3ff023f 25=120 26=240 28=82 F=80022000 | 9=7fff 10=7fff 14=3ff03ff 25=120000 26=240000 28=3ff 63=81836000
IR0: 8=0 F=80020000 | =
IR1: 9=0 28=0 F=80020000 | =
IR2: 10=0 28=0 F=80020000 | =
IR3: F=80020000 | =
RGBC: F=80020000 | =
SXY: 12=0 13=0 14=0 F=80020000 | =
SZ: 16=200 17=300 18=400 19=0 F=80020000 | =
MAC0: 24=0 F=80020000 | =
TR: 9=100 10=200 13=3ff0000 14=3ff01ff 25=100 26=200 28=82 F=80020000 | 9=7fff 10=7fff 14=3ff03ff 25=100000 26=200000 28=3ff 63=81836000
BK: F=80020000 | =
FC: F=80020000 | =
OF: 12=7800a0 13=7800a0 14=7800a0 F=80020000 | =
H: F=80020000 | =
DQA: 8=1000 24=1ffff00 F=80021000 | =
DQB: 8=1000 24=1400000 F=80021000 | =
ZSF3: F=80020000 | =
ZSF4: F=80020000 | =
RTxV: 9=144 10=29a 13=3ff0000 14=3ff0287 25=144 26=29a 28=24a2 F=80022000 | 9=7fff 10=7fff 14=3ff03ff 25=144000 26=29a000 28=27ff 63=81836000
LLMxV: 9=0 10=0 28=2400 F=80020000 | =
LCMxV: 9=0 10=0 28=2400 F=80020000 | =
op 37:
zero: F=80020000 | =
unit: F=80020000 | =
V0: F=80020000 | =
V1: 13=3ff0000 F=80022000 | 63=80832000
V2: 10=240 14=3ff0000 26=240 28=80 F=80022000 | 10=7fff 26=240000 28=3e0 63=80832000
IR0: 8=0 F=80020000 | =
IR1: 14=25f F=80020000 | =
IR2: 10=0 28=0 F=80020000 | =
IR3: F=80020000 | =
RGBC: F=80020000 | =
SXY: 12=0 13=0 14=0 F=80020000 | =
SZ: 16=200 17=300 18=400 19=0 F=80020000 | =
MAC0: 24=0 F=80020000 | =
TR: 10=200 13=3ff0000 14=3ff0000 26=200 28=80 F=80020000 | 10=7fff 26=200000 28=3e0 63=80832000
BK: F=80020000 | =
FC: F=80020000 | =
OF: 12=7800a0 13=7800a0 14=7800a0 F=80020000 | =
H: F=80020000 | =
DQA: 8=1000 24=1ffff00 F=80021000 | =
DQB: 8=1000 24=1400000 F=80021000 | =
ZSF3: F=80020000 | =
ZSF4: F=80020000 | =
RTxV: 10=29a 13=3ff0000 14=3ff025f 26=29a 28=24a2 F=80022000 | 10=7fff 26=29a000 28=27e2 63=80832000
LLMxV: 10=0 14=25f 28=2402 F=80020000 | =
LCMxV: 10=0 14=25f 28=2402 F=80020000 | =
Done.
===== 11 SG8 F2 GTE 38 TO 3B | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
GTE, one input at a time, lm 0, no other command bits. Cases: zero = every register 0;
unit = RT, LLM, LCM 1000h on the diagonal, the rest 0; V0 (100,200,400), V1 (110,220,440),
V2 (120,240,480), IR0 800, IR1 130, IR2 260, IR3 4C0, RGBC 40302010, SXY0-2 00200010
00400030 00600050, SZ0-3 100 200 300 400, MAC0 12345: each alone with the unit matrices.
TR (100,200,400), BK (110,220,440), FC (120,240,480), OFX A00000 OFY 780000, H 200, DQA
100, DQB 1400000, ZSF3 155, ZSF4 100: each alone, the rest 0. RTxV, LLMxV, LCMxV: that
matrix (800 100 200 / 300 900 400 / 500 600 A00, plus 10h for LLM, 20h for LCM) with V0,
V1, V2 and IR1-3 as above. Each row: sf 1 changes as reg=hex and F=FLAG; after | the
registers where sf 0 differs from sf 1 (63 is FLAG), or = when none.
op 38:
zero: F=80020000 | =
unit: F=80020000 | =
V0: F=80020000 | =
V1: F=80020000 | =
V2: 10=240 14=3ff0000 26=240 28=80 F=80022000 | 10=7fff 26=240000 28=3e0 63=80832000
IR0: 8=0 F=80020000 | =
IR1: 14=25f F=80020000 | =
IR2: 10=0 28=0 F=80020000 | =
IR3: F=80020000 | =
RGBC: F=80020000 | =
SXY: 12=0 13=0 14=0 F=80020000 | =
SZ: 16=200 17=300 18=400 19=0 F=80020000 | =
MAC0: 24=0 F=80020000 | =
TR: 10=200 14=3ff0000 26=200 28=80 F=80020000 | 10=7fff 26=200000 28=3e0 63=80832000
BK: F=80020000 | =
FC: F=80020000 | =
OF: 12=7800a0 13=7800a0 14=7800a0 F=80020000 | =
H: F=80020000 | =
DQA: 8=1000 24=1ffff00 F=80021000 | =
DQB: 8=1000 24=1400000 F=80021000 | =
ZSF3: F=80020000 | =
ZSF4: F=80020000 | =
RTxV: 10=29a 14=3ff025f 26=29a 28=24a2 F=80022000 | 10=7fff 26=29a000 28=27e2 63=80832000
LLMxV: 10=0 14=25f 28=2402 F=80020000 | =
LCMxV: 10=0 14=25f 28=2402 F=80020000 | =
op 39:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: 8=0 F=0 | =
IR1: 14=25f F=0 | =
IR2: 14=3ff0000 F=80002000 | =
IR3: F=0 | =
RGBC: F=0 | =
SXY: 12=0 13=0 14=0 F=0 | =
SZ: 16=200 17=300 18=400 19=0 F=0 | =
MAC0: 24=0 F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: 8=1000 24=1ffff00 F=1000 | =
DQB: 8=1000 24=1400000 F=1000 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 14=3ff025f F=80002000 | =
LLMxV: 14=3ff025f F=80002000 | =
LCMxV: 14=3ff025f F=80002000 | =
op 3A:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: 8=0 F=0 | =
IR1: 14=25f F=0 | =
IR2: 14=3ff0000 F=80002000 | =
IR3: F=0 | =
RGBC: F=0 | =
SXY: 12=600050 13=0 14=0 F=0 | =
SZ: 16=200 17=300 18=400 19=0 F=0 | =
MAC0: 24=0 F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: 8=1000 24=1ffff00 F=1000 | =
DQB: 8=1000 24=1400000 F=1000 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 14=3ff025f F=80002000 | =
LLMxV: 14=3ff025f F=80002000 | =
LCMxV: 14=3ff025f F=80002000 | =
op 3B:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: 8=0 F=0 | =
IR1: 14=25f F=0 | =
IR2: 14=3ff0000 F=80002000 | =
IR3: F=0 | =
RGBC: F=0 | =
SXY: 12=400030 13=600050 14=0 F=0 | =
SZ: F=0 | =
MAC0: 24=0 F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: 8=1000 24=1ffff00 F=1000 | =
DQB: 8=1000 24=1400000 F=1000 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 14=3ff025f F=80002000 | =
LLMxV: 14=3ff025f F=80002000 | =
LCMxV: 14=3ff025f F=80002000 | =
Done.
===== 12 SMS F2 MDEC SHORT | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
Short decodes by CPU at 8 bit (depth 1), unsigned, the 4bit/8bit block's tables
(kBlkQuant, kBlkScale). Pattern words: FE00h end code over a DC halfword, q_scale 1;
A has DC 16*i-256 in word i (i = 0 to 31), B has DC 240-16*i. At most 256 words shown.
No pattern (the tables were the last words in), then count 1, 1 words written: 992 words out, CRC CE4D9FAA, status 8204FFFF
8F9EA9AF 5F65717F 8F9EA9AF 5F65717F 8F9EA9AF 5F65717F 8F9EA9AF 5F65717F
8F9EA9AF 5F65717F 8F9EA9AF 5F65717F 8F9EA9AF 5F65717F 8F9EA9AF 5F65717F
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
Pattern A first (count 32: 512 words out, CRC CF32359C), then count 1, 1 words written: 496 words out, CRC 3410B6D8, status 8204FFFF
32414C52 02081422 69788389 393F4A59 B6C5D0D6 868C97A6 ECFBFFFF BCC2CEDC
ECFBFFFF BCC2CEDC B6C5D0D6 868C97A6 69788389 393F4A59 32414C52 02081422
48484848 48484848 48484848 48484848 48484848 48484848 48484848 48484848
48484848 48484848 48484848 48484848 48484848 48484848 48484848 48484848
4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C
4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C
50505050 50505050 50505050 50505050 50505050 50505050 50505050 50505050
50505050 50505050 50505050 50505050 50505050 50505050 50505050 50505050
54545454 54545454 54545454 54545454 54545454 54545454 54545454 54545454
54545454 54545454 54545454 54545454 54545454 54545454 54545454 54545454
58585858 58585858 58585858 58585858 58585858 58585858 58585858 58585858
58585858 58585858 58585858 58585858 58585858 58585858 58585858 58585858
5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C
5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C
60606060 60606060 60606060 60606060 60606060 60606060 60606060 60606060
60606060 60606060 60606060 60606060 60606060 60606060 60606060 60606060
64646464 64646464 64646464 64646464 64646464 64646464 64646464 64646464
64646464 64646464 64646464 64646464 64646464 64646464 64646464 64646464
68686868 68686868 68686868 68686868 68686868 68686868 68686868 68686868
68686868 68686868 68686868 68686868 68686868 68686868 68686868 68686868
6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C
6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C
70707070 70707070 70707070 70707070 70707070 70707070 70707070 70707070
70707070 70707070 70707070 70707070 70707070 70707070 70707070 70707070
74747474 74747474 74747474 74747474 74747474 74747474 74747474 74747474
74747474 74747474 74747474 74747474 74747474 74747474 74747474 74747474
78787878 78787878 78787878 78787878 78787878 78787878 78787878 78787878
78787878 78787878 78787878 78787878 78787878 78787878 78787878 78787878
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
Pattern B first (count 32: 512 words out, CRC BF7813E8), then count 1, 1 words written: 496 words out, CRC A468B6F1, status 8204FFFF
E6F5FFFF B6BCC7D6 B3C2CDD3 838995A3 6B7A858C 3B414D5B 39475359 080F1A29
39475359 080F1A29 6B7A858C 3B414D5B B3C2CDD3 838995A3 E6F5FFFF B6BCC7D6
B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4
B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4
B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0
B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0
ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC
ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC
A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8
A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8
A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4
A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C
9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C
98989898 98989898 98989898 98989898 98989898 98989898 98989898 98989898
98989898 98989898 98989898 98989898 98989898 98989898 98989898 98989898
94949494 94949494 94949494 94949494 94949494 94949494 94949494 94949494
94949494 94949494 94949494 94949494 94949494 94949494 94949494 94949494
90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090
90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090
8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C
8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C
88888888 88888888 88888888 88888888 88888888 88888888 88888888 88888888
88888888 88888888 88888888 88888888 88888888 88888888 88888888 88888888
84848484 84848484 84848484 84848484 84848484 84848484 84848484 84848484
84848484 84848484 84848484 84848484 84848484 84848484 84848484 84848484
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
No pattern (the tables were the last words in), then count 2, 2 words written: 480 words out, CRC CA80C555, status 8204FFFF
5694E2FF C79E6746 65A3F1FF D6AD7555 75B3FFFF E6BD8665 76B4FFFF E7BE8766
5C9AE8FF CDA46C4C 2B69B7EC 9C733C1B 003482B7 673E0600 00115F94 441B0000
B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0
B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0
ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC
ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC
A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8
A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8
A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4
A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C
9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C
98989898 98989898 98989898 98989898 98989898 98989898 98989898 98989898
98989898 98989898 98989898 98989898 98989898 98989898 98989898 98989898
94949494 94949494 94949494 94949494 94949494 94949494 94949494 94949494
94949494 94949494 94949494 94949494 94949494 94949494 94949494 94949494
90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090
90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090
8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C
8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C
88888888 88888888 88888888 88888888 88888888 88888888 88888888 88888888
88888888 88888888 88888888 88888888 88888888 88888888 88888888 88888888
84848484 84848484 84848484 84848484 84848484 84848484 84848484 84848484
84848484 84848484 84848484 84848484 84848484 84848484 84848484 84848484
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
78787878 78787878 78787878 78787878 78787878 78787878 78787878 78787878
78787878 78787878 78787878 78787878 78787878 78787878 78787878 78787878
Pattern A first (count 32: 512 words out, CRC CF32359C), then count 2, 2 words written: 480 words out, CRC 5D6A404E, status 8204FFFF
FDD99D70 2059ACEE FFE8AB7F 2E67BBFC FFF9BC8F 3F78CBFF FFF9BD90 4079CCFF
FFDFA376 265FB2F3 D3AF7245 002E81C3 9D793C10 00004C8D 7B561A00 0000296B
4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C
4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C
50505050 50505050 50505050 50505050 50505050 50505050 50505050 50505050
50505050 50505050 50505050 50505050 50505050 50505050 50505050 50505050
54545454 54545454 54545454 54545454 54545454 54545454 54545454 54545454
54545454 54545454 54545454 54545454 54545454 54545454 54545454 54545454
58585858 58585858 58585858 58585858 58585858 58585858 58585858 58585858
58585858 58585858 58585858 58585858 58585858 58585858 58585858 58585858
5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C
5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C
60606060 60606060 60606060 60606060 60606060 60606060 60606060 60606060
60606060 60606060 60606060 60606060 60606060 60606060 60606060 60606060
64646464 64646464 64646464 64646464 64646464 64646464 64646464 64646464
64646464 64646464 64646464 64646464 64646464 64646464 64646464 64646464
68686868 68686868 68686868 68686868 68686868 68686868 68686868 68686868
68686868 68686868 68686868 68686868 68686868 68686868 68686868 68686868
6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C
6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C
70707070 70707070 70707070 70707070 70707070 70707070 70707070 70707070
70707070 70707070 70707070 70707070 70707070 70707070 70707070 70707070
74747474 74747474 74747474 74747474 74747474 74747474 74747474 74747474
74747474 74747474 74747474 74747474 74747474 74747474 74747474 74747474
78787878 78787878 78787878 78787878 78787878 78787878 78787878 78787878
78787878 78787878 78787878 78787878 78787878 78787878 78787878 78787878
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
84848484 84848484 84848484 84848484 84848484 84848484 84848484 84848484
84848484 84848484 84848484 84848484 84848484 84848484 84848484 84848484
Pattern B first (count 32: 512 words out, CRC BF7813E8), then count 2, 2 words written: 480 words out, CRC CA80C555, status 8204FFFF
5694E2FF C79E6746 65A3F1FF D6AD7555 75B3FFFF E6BD8665 76B4FFFF E7BE8766
5C9AE8FF CDA46C4C 2B69B7EC 9C733C1B 003482B7 673E0600 00115F94 441B0000
B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0
B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0
ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC
ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC
A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8
A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8
A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4
A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C
9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C
98989898 98989898 98989898 98989898 98989898 98989898 98989898 98989898
98989898 98989898 98989898 98989898 98989898 98989898 98989898 98989898
94949494 94949494 94949494 94949494 94949494 94949494 94949494 94949494
94949494 94949494 94949494 94949494 94949494 94949494 94949494 94949494
90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090
90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090
8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C
8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C
88888888 88888888 88888888 88888888 88888888 88888888 88888888 88888888
88888888 88888888 88888888 88888888 88888888 88888888 88888888 88888888
84848484 84848484 84848484 84848484 84848484 84848484 84848484 84848484
84848484 84848484 84848484 84848484 84848484 84848484 84848484 84848484
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
78787878 78787878 78787878 78787878 78787878 78787878 78787878 78787878
78787878 78787878 78787878 78787878 78787878 78787878 78787878 78787878
Done.
===== 13 SSD F2 SPU DRAIN | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000480
SPU write FIFO drain to scratch at 30000h (32 halfwords filled EEEEh first), SPUCNT
transfer mode Stop after the wait, then all 32 read back by DMA. Pattern B000h + i.
By DMA, 16 words in one block; the wait counted from the DMA's end:
DMA, wait 0: 9 written, 0 EEEEh, 12 5555h, 11 other (first AAAA) wwwwwwwww?55??55??55??55??55??55
DMA, wait 50: 10 written, 0 EEEEh, 12 5555h, 10 other (first AAAA) wwwwwwwwww55??55??55??55??55??55
DMA, wait 100: 10 written, 0 EEEEh, 12 5555h, 10 other (first AAAA) wwwwwwwwww55??55??55??55??55??55
DMA, wait 150: 11 written, 0 EEEEh, 11 5555h, 10 other (first AAAA) wwwwwwwwwww5??55??55??55??55??55
DMA, wait 200: 11 written, 0 EEEEh, 11 5555h, 10 other (first AAAA) wwwwwwwwwww5??55??55??55??55??55
DMA, wait 250: 11 written, 0 EEEEh, 11 5555h, 10 other (first AAAA) wwwwwwwwwww5??55??55??55??55??55
DMA, wait 300: 14 written, 0 EEEEh, 10 5555h, 8 other (first AAAA) wwwwwwwwwwwwww55??55??55??55??55
DMA, wait 350: 15 written, 0 EEEEh, 9 5555h, 8 other (first AAAA) wwwwwwwwwwwwwww5??55??55??55??55
DMA, wait 400: 19 written, 0 EEEEh, 7 5555h, 6 other (first AAAA) wwwwwwwwwwwwwwwwwww5??55??55??55
DMA, wait 450: 19 written, 0 EEEEh, 7 5555h, 6 other (first AAAA) wwwwwwwwwwwwwwwwwww5??55??55??55
DMA, wait 500: 23 written, 0 EEEEh, 5 5555h, 4 other (first AAAA) wwwwwwwwwwwwwwwwwwwwwww5??55??55
DMA, wait 550: 25 written, 0 EEEEh, 4 5555h, 3 other (first AAAA) wwwwwwwwwwwwwwwwwwwwwwwww?55??55
DMA, wait 600: 27 written, 0 EEEEh, 3 5555h, 2 other (first AAAA) wwwwwwwwwwwwwwwwwwwwwwwwwww5??55
DMA, wait 650: 28 written, 0 EEEEh, 2 5555h, 2 other (first AAAA) wwwwwwwwwwwwwwwwwwwwwwwwwwww??55
DMA, wait 700: 31 written, 0 EEEEh, 1 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwww5
DMA, wait 750: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
DMA, wait 800: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
DMA, wait 850: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
DMA, wait 900: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
By hand, 16 halfwords (B000h-B00Fh) to the FIFO, then Manual Write; the wait counted
from the SPUCNT store:
manual, wait 0: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 50: 0 written, 0 EEEEh, 0 5555h, 32 other (first B002) ????????????????????????????????
manual, wait 100: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 150: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 200: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 250: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 300: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 350: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 400: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 450: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 500: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 550: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 600: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 650: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 700: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 750: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 800: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 850: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 900: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
SPUSTAT after the Manual Write store, status@timer 2:
0000@53 0000@86 0000@119 0000@152 0000@185 0410@218 0410@257 0410@290
0410@323 0410@356 0410@389 0410@422 0410@455 0410@488 0410@521 0410@554
0410@587 0410@620 0410@653 0410@686 0410@719 0410@752 0410@785 0410@818
manual, wait 3000: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
Done.
27 September 2026 run 4
===== 00 RUN | BIOS 19951204 System ROM Version 3.0 11/18/96 A
15 tests
A chain program, linked at 80010000
Saved on the card in slot 2, from image 1
COP0 at start: BPC 00000000 BDA 00000000 TAR BFC02BAC DCIC 00000000 BadVaddr 00000400 BDAM 00000000
BPCM 00000000 SR 00000000 Cause 00000020 EPC 801132F8 PRId 00000002
===== 01 SDI F2 DICR POLL | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000400
DICR written with timer 2 zeroed just before it. Interrupts off (SR IEc 0) throughout.
DICR 0 is the scale: its loop runs all 300 turns, so timer 2 over 300 gives one turn.
I_STAT bit 3, a loop of one I_STAT load a turn (lw, addiu, andi, sltiu, sltu, and, bnez, nop):
DICR 00000000: the bit never set in 300 turns; timer 2 after them 3622
DICR 00008000: the bit was set on turn 2; timer 2 after the loop 24
DICR 00008000: the bit was set on turn 2; timer 2 after the loop 24
DICR 00008000: the bit was set on turn 2; timer 2 after the loop 24
I_STAT bit 3, eight I_STAT loads back to back:
DICR 00000000: I_STAT bit 3 after each of the 8 loads: 0 0 0 0 0 0 0 0; timer 2 after them 53
DICR 00008000: I_STAT bit 3 after each of the 8 loads: 0 0 1 1 1 1 1 1; timer 2 after them 32
DICR 00008000: I_STAT bit 3 after each of the 8 loads: 0 0 1 1 1 1 1 1; timer 2 after them 32
DICR 00008000: I_STAT bit 3 after each of the 8 loads: 0 0 1 1 1 1 1 1; timer 2 after them 32
CAUSE.IP2, a loop of one mfc0 CAUSE a turn (the same loop), I_MASK 00000008:
DICR 00000000: the bit never set in 300 turns; timer 2 after them 2420
DICR 00008000: the bit was set on turn 2; timer 2 after the loop 16
DICR 00008000: the bit was set on turn 2; timer 2 after the loop 16
DICR 00008000: the bit was set on turn 2; timer 2 after the loop 16
CAUSE.IP2, eight mfc0 CAUSE back to back, I_MASK 00000008:
DICR 00000000: CAUSE.IP2 after each of the 8 loads: 0 0 0 0 0 0 0 0; timer 2 after them 25
DICR 00008000: CAUSE.IP2 after each of the 8 loads: 0 0 0 0 0 0 0 1; timer 2 after them 8
DICR 00008000: CAUSE.IP2 after each of the 8 loads: 0 0 0 0 0 0 0 1; timer 2 after them 8
DICR 00008000: CAUSE.IP2 after each of the 8 loads: 0 0 0 0 0 0 0 1; timer 2 after them 8
DICR was 00000000 and is back to 0, then its enables.
Done.
===== 02 SIM F2 IMASK UPPER | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000400
I_MASK's upper half. Each row stores to I_MASK and loads it back; the value is
12345678h unless the row says otherwise. Interrupts off. The RAM word is 5AA5C33Ch, the
BIOS word at BFC00100h is its date, the scratchpad word is written 7EE71234h first.
a: sw $9,1074h($8) (AD091074h), lw (code at 80016048): cached 3C090678 then 12340678, uncached 03E00678
b: sw $10,1074h($8) (AD0A1074h), lw (code at 80016068): cached 12340678 then 12340678, uncached 03E00678
c: sw $9,4($11) (AD690004h), lw (code at 8001608C): cached 12340678 then 12340678, uncached 03E00678
d: value 0000FFFFh, sw $9,1074h($8), lw (code at 800160B0): cached 000007FF then 000007FF, uncached 03E007FF
e: sw, lw of RAM, nop, lw (code at 800160CC): cached 5AA50678 then 5AA50678, uncached 03E00678
f: sw, lw of BIOS BFC00100h, nop, lw (code at 800160FC): cached 3C090678 then 27BD0678, uncached 03E00678
g: sw, lw of GPUSTAT, nop, lw (code at 80016128): cached 00000678 then 27BD0678, uncached 03E00678
h: sw, lw of scratchpad, nop, lw (code at 80016150): cached 3C090678 then 27BD0678, uncached 03E00678
i: sw, lw of I_STAT, nop, lw (code at 80016178): cached 00000678 then 27BD0678, uncached 03E00678
j: lw of RAM, nop, sw, lw (code at 800161A0): cached 12340678 then 12340678, uncached 03E00678
k: sw, 4 nops, lw (code at 800161D0): cached 00000678 then 27BD0678, uncached 03E00678
l: sw, lw of timer 2's counter, nop, lw (code at 80016200): cached AFB00678 then 27BD0678, uncached 03E00678
GPUSTAT now 5606200F. I_MASK back to 24840009.
Done.
===== 03 STH F2 T1 HBLANK SYNC1 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000400
Timer1 sync mode 1 (reset at vblank), set at the vblank IRQ (I_STAT bit 0, polled);
timer 2 counts system cycles from then. Each sample is timer 2 then timer 1 (t:v).
Hblank clock (mode 0103h), run 1, every sample (141):
47033:21 47082:21 47124:22 47175:22 47226:22 47277:22 47319:22 47370:22
47421:22 47472:22 47523:22 47574:22 47625:22 47676:22 47727:22 47769:22
47820:22 47871:22 47922:22 47973:22 48024:22 48075:22 48126:22 48177:22
48219:22 48270:22 48321:22 48372:22 48423:22 48474:22 48525:22 48576:22
48627:22 48669:22 48724:22 48775:22 48826:22 48877:22 48919:22 48970:22
49021:22 49072:22 49123:22 49174:22 49225:22 49276:22 49327:23 49369:23
49420:23 49471:23 49522:23 49573:23 49624:23 49675:23 49726:23 49777:23
49819:23 49870:23 49921:23 49972:23 50023:23 50074:23 50125:23 50176:23
50227:23 50269:23 50320:23 50371:23 50422:23 50473:23 50524:23 50575:23
50626:23 50677:23 50719:23 50772:23 50823:23 50874:23 50925:23 50976:23
51028:23 51070:23 51121:23 51172:23 51223:23 51274:23 51325:23 51376:23
51427:23 51469:24 51520:24 51571:24 51622:24 51673:24 51724:24 51775:24
51826:24 51877:24 51919:24 51970:0 52021:0 52072:0 52123:0 52174:0
52225:0 52276:0 52327:0 52369:0 52420:0 52471:0 52522:0 52573:0
52624:0 52675:0 52726:0 52777:0 52820:0 52871:0 52922:0 52973:0
53024:0 53076:0 53127:0 53169:0 53220:0 53271:0 53322:0 53373:0
53424:0 53475:0 53526:0 53577:0 53619:0 53670:0 53721:0 53772:0
53823:0 53874:0 53925:0 53976:0 54027:0
Hblank clock (mode 0103h), run 1, 141 samples; where timer 1 changes: 47082:21->47124:22 49276:22->49327:23 51427:23->51469:24 51919:24->51970:0
Hblank clock (mode 0103h), run 2, 141 samples; where timer 1 changes: 47124:21->47175:22 49272:22->49323:23 51422:23->51473:24 51974:24->52025:0
Hblank clock (mode 0103h), run 3, 141 samples; where timer 1 changes: 47124:21->47175:22 49272:22->49323:23 51422:23->51473:24 51974:24->52025:0
Hblank clock (mode 0103h), run 4, 141 samples; where timer 1 changes: 47124:21->47175:22 49272:22->49323:23 51421:23->51472:24 51973:24->52024:0
System clock (mode 0003h), 141 samples; where timer 1 drops: 49374:49374->49425:1; last sample 54023:4599
Done.
===== 04 SG1 F2 GTE 02 TO 07 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000400
GTE, one input at a time, lm 0, no other command bits. Cases: zero = every register 0;
unit = RT, LLM, LCM 1000h on the diagonal, the rest 0; V0 (100,200,400), V1 (110,220,440),
V2 (120,240,480), IR0 800, IR1 130, IR2 260, IR3 4C0, RGBC 40302010, SXY0-2 00200010
00400030 00600050, SZ0-3 100 200 300 400, MAC0 12345: each alone with the unit matrices.
TR (100,200,400), BK (110,220,440), FC (120,240,480), OFX A00000 OFY 780000, H 200, DQA
100, DQB 1400000, ZSF3 155, ZSF4 100: each alone, the rest 0. RTxV, LLMxV, LCMxV: that
matrix (800 100 200 / 300 900 400 / 500 600 A00, plus 10h for LLM, 20h for LCM) with V0,
V1, V2 and IR1-3 as above. Each row: sf 1 changes as reg=hex and F=FLAG; after | the
registers where sf 0 differs from sf 1 (63 is FLAG), or = when none.
op 02:
zero: F=80020000 | =
unit: F=80020000 | =
V0: 9=100 10=200 19=100 25=100 26=200 28=82 F=0 | 9=7fff 10=7fff 25=100000 26=200000 28=3ff 63=81800000
V1: F=80020000 | =
V2: F=80020000 | =
IR0: 8=0 F=80020000 | =
IR1: 9=0 28=0 F=80020000 | =
IR2: 10=0 28=0 F=80020000 | =
IR3: F=80020000 | =
RGBC: F=80020000 | =
SXY: 12=400030 13=600050 14=0 F=80020000 | =
SZ: 16=200 17=300 18=400 19=0 F=80020000 | =
MAC0: 24=0 F=80020000 | =
TR: 9=100 10=200 14=3ff01ff 25=100 26=200 28=82 F=80020000 | 9=7fff 10=7fff 14=3ff03ff 25=100000 26=200000 28=3ff 63=81836000
BK: F=80020000 | =
FC: F=80020000 | =
OF: 14=7800a0 F=80020000 | =
H: F=80020000 | =
DQA: 8=1000 24=1ffff00 F=80021000 | =
DQB: 8=1000 24=1400000 F=80021000 | =
ZSF3: F=80020000 | =
ZSF4: F=80020000 | =
RTxV: 9=120 10=250 19=80 25=120 26=250 F=0 | 9=7fff 10=7fff 25=120000 26=250000 28=27ff 63=81800000
LLMxV: 9=0 10=0 28=2400 F=80020000 | =
LCMxV: 9=0 10=0 28=2400 F=80020000 | =
op 03:
zero: F=80020000 | =
unit: F=80020000 | =
V0: 10=200 14=3ff0000 26=200 28=80 F=80020000 | 10=7fff 26=200000 28=3e0 63=80832000
V1: F=80020000 | =
V2: F=80020000 | =
IR0: 8=0 F=80020000 | =
IR1: 14=25f F=80020000 | =
IR2: 10=0 28=0 F=80020000 | =
IR3: F=80020000 | =
RGBC: F=80020000 | =
SXY: 12=400030 13=600050 14=0 F=80020000 | =
SZ: 16=200 17=300 18=400 19=0 F=80020000 | =
MAC0: 24=0 F=80020000 | =
TR: 10=200 14=3ff0000 26=200 28=80 F=80020000 | 10=7fff 26=200000 28=3e0 63=80832000
BK: F=80020000 | =
FC: F=80020000 | =
OF: 14=7800a0 F=80020000 | =
H: F=80020000 | =
DQA: 8=1000 24=1ffff00 F=80021000 | =
DQB: 8=1000 24=1400000 F=80021000 | =
ZSF3: F=80020000 | =
ZSF4: F=80020000 | =
RTxV: 10=250 14=3ff025f 26=250 F=80022000 | 10=7fff 26=250000 28=27e2 63=80832000
LLMxV: 10=0 14=25f 28=2402 F=80020000 | =
LCMxV: 10=0 14=25f 28=2402 F=80020000 | =
op 04:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: 8=0 F=0 | =
IR1: 14=25f F=0 | =
IR2: 14=3ff0000 F=80002000 | =
IR3: F=0 | =
RGBC: F=0 | =
SXY: 12=400030 13=600050 14=0 F=0 | =
SZ: F=0 | =
MAC0: 24=0 F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: 8=1000 24=1ffff00 F=1000 | =
DQB: 8=1000 24=1400000 F=1000 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 14=3ff025f F=80002000 | =
LLMxV: 14=3ff025f F=80002000 | =
LCMxV: 14=3ff025f F=80002000 | =
op 07:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: F=0 | =
IR2: F=0 | =
IR3: F=0 | =
RGBC: F=0 | =
SXY: 24=fffffc00 F=0 | =
SZ: F=0 | =
MAC0: 24=0 F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: 24=120 F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: F=0 | =
LLMxV: F=0 | =
LCMxV: F=0 | =
Done.
===== 05 SG2 F2 GTE 08 TO 17 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000400
GTE, one input at a time, lm 0, no other command bits. Cases: zero = every register 0;
unit = RT, LLM, LCM 1000h on the diagonal, the rest 0; V0 (100,200,400), V1 (110,220,440),
V2 (120,240,480), IR0 800, IR1 130, IR2 260, IR3 4C0, RGBC 40302010, SXY0-2 00200010
00400030 00600050, SZ0-3 100 200 300 400, MAC0 12345: each alone with the unit matrices.
TR (100,200,400), BK (110,220,440), FC (120,240,480), OFX A00000 OFY 780000, H 200, DQA
100, DQB 1400000, ZSF3 155, ZSF4 100: each alone, the rest 0. RTxV, LLMxV, LCMxV: that
matrix (800 100 200 / 300 900 400 / 500 600 A00, plus 10h for LLM, 20h for LCM) with V0,
V1, V2 and IR1-3 as above. Each row: sf 1 changes as reg=hex and F=FLAG; after | the
registers where sf 0 differs from sf 1 (63 is FLAG), or = when none.
op 08:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: F=0 | =
IR2: F=0 | =
IR3: F=0 | =
RGBC: F=0 | =
SXY: 24=ffffea00 F=0 | =
SZ: F=0 | =
MAC0: 24=0 F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: 24=120 F=0 | 24=0
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: F=0 | =
LLMxV: F=0 | =
LCMxV: F=0 | =
op 09:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: F=0 | =
IR2: F=0 | =
IR3: F=0 | =
RGBC: F=0 | =
SXY: 24=ffffe000 F=0 | =
SZ: F=0 | =
MAC0: 24=0 F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: 24=120 F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: F=0 | =
LLMxV: F=0 | =
LCMxV: F=0 | =
op 0A:
zero: F=0 | =
unit: 20=ffffff 21=ffffff F=81f80000 | =
V0: 20=ffffff 21=ffffff F=81f80000 | =
V1: 20=ffffff 21=ffffff F=81f80000 | =
V2: 20=ffffff 21=ffffff F=81f80000 | =
IR0: 20=ffffff 21=ffffff F=81f80000 | =
IR1: 9=7fff 20=ffffff 21=ffffff 22=ff 25=130000 28=1f F=81f80000 | =
IR2: 10=7fff 20=ffffff 21=ffffff 22=ff00 26=260000 28=3e0 F=81f80000 | =
IR3: 11=7fff 20=ffffff 21=ffffff 22=ff0000 27=4c0000 28=7c00 F=81f80000 | =
RGBC: 20=40ffffff 21=40ffffff 22=40000000 F=81f80000 | =
SXY: 20=ffffff 21=ffffff 24=fffff400 F=81f80000 | =
SZ: 20=ffffff 21=ffffff F=81f80000 | =
MAC0: 20=ffffff 21=ffffff 24=0 F=81f80000 | =
TR: F=0 | =
BK: 9=7fff 10=7fff 11=7fff 20=ffffff 21=ffffff 22=ffffff 25=110000 26=220000 27=440000 28=7fff F=81f80000 | =
FC: 24=120 F=0 | 24=0
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=7fff 10=7fff 11=7fff 20=ffffff 21=ffffff 22=ffffff 25=166a00 26=2cfa00 27=44ba00 28=7fff F=81f80000 | =
op 0D:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=0 10=130 11=fffffed0 26=130 27=fffffed0 28=40 F=0 | 10=7fff 11=ffff8000 26=130000 27=ffed0000 28=3e0 63=80c00000
IR2: 9=fffffda0 10=0 11=260 25=fffffda0 27=260 28=1000 F=0 | 9=ffff8000 11=7fff 25=ffda0000 27=260000 28=7c00 63=81400000
IR3: 10=fffffb40 11=0 26=fffffb40 28=0 F=0 | 10=ffff8000 26=ffb40000 63=80800000
RGBC: F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | 9=120 25=120 28=2
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=fffffe84 10=fffffe5e 11=85 25=fffffe84 26=fffffe5e 27=85 28=400 F=0 | 9=ffff8000 10=ffff8000 11=7fff 25=ffe84000 26=ffe5e000 27=85000 28=7c00 63=81c00000
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=0 10=0 11=0 28=0 F=0 | =
op 0E:
zero: F=0 | =
unit: 20=ffffff 21=ffffff F=81f80000 | =
V0: 20=ffffff 21=ffffff F=81f80000 | =
V1: 20=ffffff 21=ffffff F=81f80000 | =
V2: 20=ffffff 21=ffffff F=81f80000 | =
IR0: 20=ffffff 21=ffffff F=81f80000 | =
IR1: 9=7fff 10=7fff 11=ffff8000 20=ffffff 21=ffffff 22=ffff 25=130000 26=7fff000 27=ffed0000 28=3ff F=81f80000 | 27=f8000000
IR2: 10=0 20=ffffff 21=ffffff 28=0 F=81f80000 | =
IR3: 10=ffff8000 11=0 20=ffffff 21=ffffff 26=f8000000 28=0 F=81f80000 | =
RGBC: 20=40ffffff 21=40ffffff 22=40000000 F=81f80000 | =
SXY: 20=ffffff 21=ffffff F=81f80000 | =
SZ: 20=ffffff 21=ffffff F=81f80000 | =
MAC0: 20=ffffff 21=ffffff F=81f80000 | =
TR: F=0 | =
BK: 9=7fff 10=7fff 11=7fff 20=ffffff 21=ffffff 22=ffffff 25=110000 26=220000 27=440000 28=7fff F=81f80000 | =
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=80800000 | 63=80c00000
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=7fff 10=7fff 11=7fff 20=ffffff 21=ffffff 22=ffffff 25=9a600 26=3b600 27=61600 28=7fff F=81f80000 | =
op 15:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=0 28=0 F=0 | =
IR2: 10=0 28=0 F=0 | =
IR3: 11=0 28=0 F=0 | =
RGBC: 9=7ff 10=fff 11=17ff 22=40ffff7f 25=7ff 26=fff 27=17ff 28=7fef F=80000 | 9=7fff 10=7fff 11=7fff 22=40ffffff 25=7fff00 26=fffe00 27=17ffd00 28=7fff 63=81f80000
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | 63=81c00000
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=0 10=0 11=0 28=0 F=0 | =
op 17:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=0 28=0 F=0 | 63=81000000
IR2: 10=0 28=0 F=0 | 63=80800000
IR3: 11=0 28=0 F=0 | 63=400000
RGBC: 20=40000000 21=40000000 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: F=0 | 63=81c00000
FC: F=0 | 63=81c00000
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=0 10=0 11=0 28=0 F=0 | 63=81c00000
Done.
===== 06 SG3 F2 GTE 18 TO 1F | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000400
GTE, one input at a time, lm 0, no other command bits. Cases: zero = every register 0;
unit = RT, LLM, LCM 1000h on the diagonal, the rest 0; V0 (100,200,400), V1 (110,220,440),
V2 (120,240,480), IR0 800, IR1 130, IR2 260, IR3 4C0, RGBC 40302010, SXY0-2 00200010
00400030 00600050, SZ0-3 100 200 300 400, MAC0 12345: each alone with the unit matrices.
TR (100,200,400), BK (110,220,440), FC (120,240,480), OFX A00000 OFY 780000, H 200, DQA
100, DQB 1400000, ZSF3 155, ZSF4 100: each alone, the rest 0. RTxV, LLMxV, LCMxV: that
matrix (800 100 200 / 300 900 400 / 500 600 A00, plus 10h for LLM, 20h for LCM) with V0,
V1, V2 and IR1-3 as above. Each row: sf 1 changes as reg=hex and F=FLAG; after | the
registers where sf 0 differs from sf 1 (63 is FLAG), or = when none.
op 18:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=0 28=0 F=0 | =
IR2: 10=0 28=0 F=0 | =
IR3: 11=0 28=0 F=0 | =
RGBC: 20=40000000 21=40000000 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | 63=81c00000
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=0 10=0 11=0 28=0 F=0 | =
op 19:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=0 28=0 F=0 | =
IR2: 10=0 28=0 F=0 | =
IR3: 11=0 28=0 F=0 | =
RGBC: 21=40000000 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | 63=81c00000
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=0 10=0 11=0 28=0 F=0 | =
op 1D:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=0 28=0 F=0 | =
IR2: 10=0 28=0 F=0 | =
IR3: 11=0 28=0 F=0 | =
RGBC: 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=0 10=0 11=0 28=0 F=0 | =
op 1F:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=0 28=0 F=0 | =
IR2: 10=0 28=0 F=0 | =
IR3: 11=0 28=0 F=0 | =
RGBC: 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: 9=110 10=220 11=440 22=442211 25=110 26=220 27=440 28=2082 F=0 | 9=7fff 10=7fff 11=7fff 22=ffffff 25=110000 26=220000 27=440000 28=7fff 63=81f80000
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=0 10=0 11=0 28=0 F=0 | =
Done.
===== 07 SG4 F2 GTE 21 TO 23 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000400
GTE, one input at a time, lm 0, no other command bits. Cases: zero = every register 0;
unit = RT, LLM, LCM 1000h on the diagonal, the rest 0; V0 (100,200,400), V1 (110,220,440),
V2 (120,240,480), IR0 800, IR1 130, IR2 260, IR3 4C0, RGBC 40302010, SXY0-2 00200010
00400030 00600050, SZ0-3 100 200 300 400, MAC0 12345: each alone with the unit matrices.
TR (100,200,400), BK (110,220,440), FC (120,240,480), OFX A00000 OFY 780000, H 200, DQA
100, DQB 1400000, ZSF3 155, ZSF4 100: each alone, the rest 0. RTxV, LLMxV, LCMxV: that
matrix (800 100 200 / 300 900 400 / 500 600 A00, plus 10h for LLM, 20h for LCM) with V0,
V1, V2 and IR1-3 as above. Each row: sf 1 changes as reg=hex and F=FLAG; after | the
registers where sf 0 differs from sf 1 (63 is FLAG), or = when none.
op 21:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 22=13 25=130 F=0 | 9=7fff 22=ff 25=130000 28=1f 63=81200000
IR2: 22=2600 26=260 F=0 | 10=7fff 22=ff00 26=260000 28=3e0 63=80900000
IR3: 22=4c0000 27=4c0 F=0 | 11=7fff 22=ff0000 27=4c0000 28=7c00 63=480000
RGBC: 20=40000000 21=40000000 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: 9=110 10=220 11=440 20=442211 21=442211 22=442211 25=110 26=220 27=440 28=2082 F=0 | 9=7fff 10=7fff 11=7fff 20=ffffff 21=ffffff 22=ffffff 25=110000 26=220000 27=440000 28=7fff 63=81f80000
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=166 10=2cf 11=44b 22=442c16 25=166 26=2cf 27=44b 28=20a2 F=0 | 9=7fff 10=7fff 11=7fff 22=ffffff 25=166a00 26=2cfa00 27=44ba00 28=7fff 63=81f80000
op 22:
zero: 20=ff F=0 | 20=0
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 22=13 25=130 F=0 | 9=7fff 20=13 22=ff 25=130000 28=1f 63=81200000
IR2: 20=ff 22=2600 26=260 F=0 | 10=7fff 20=0 22=ff00 26=260000 28=3e0 63=80900000
IR3: 22=4c0000 27=4c0 F=0 | 11=7fff 22=ff0000 27=4c0000 28=7c00 63=480000
RGBC: 20=40000000 21=40000000 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: 9=110 10=220 11=440 20=442200 21=442211 22=442211 25=110 26=220 27=440 28=2082 F=0 | 9=7fff 10=7fff 11=7fff 20=ffff11 21=ffffff 22=ffffff 25=110000 26=220000 27=440000 28=7fff 63=81f80000
FC: 20=ff F=0 | 20=0
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=166 10=2cf 11=44b 22=442c16 25=166 26=2cf 27=44b 28=20a2 F=0 | 9=7fff 10=7fff 11=7fff 20=16 22=ffffff 25=166a00 26=2cfa00 27=44ba00 28=7fff 63=81f80000
op 23:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 22=13 25=130 F=0 | 9=7fff 22=ff 25=130000 28=1f 63=81200000
IR2: 22=2600 26=260 F=0 | 10=7fff 22=ff00 26=260000 28=3e0 63=80900000
IR3: 22=4c0000 27=4c0 F=0 | 11=7fff 22=ff0000 27=4c0000 28=7c00 63=480000
RGBC: 20=40000000 21=40000000 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: 9=110 10=220 11=440 20=440000 21=442211 22=442211 25=110 26=220 27=440 28=2082 F=0 | 9=7fff 10=7fff 11=7fff 20=ff0000 21=ffffff 22=ffffff 25=110000 26=220000 27=440000 28=7fff 63=81f80000
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=166 10=2cf 11=44b 22=442c16 25=166 26=2cf 27=44b 28=20a2 F=0 | 9=7fff 10=7fff 11=7fff 22=ffffff 25=166a00 26=2cfa00 27=44ba00 28=7fff 63=81f80000
Done.
===== 08 SG5 F2 GTE 24 TO 27 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000400
GTE, one input at a time, lm 0, no other command bits. Cases: zero = every register 0;
unit = RT, LLM, LCM 1000h on the diagonal, the rest 0; V0 (100,200,400), V1 (110,220,440),
V2 (120,240,480), IR0 800, IR1 130, IR2 260, IR3 4C0, RGBC 40302010, SXY0-2 00200010
00400030 00600050, SZ0-3 100 200 300 400, MAC0 12345: each alone with the unit matrices.
TR (100,200,400), BK (110,220,440), FC (120,240,480), OFX A00000 OFY 780000, H 200, DQA
100, DQB 1400000, ZSF3 155, ZSF4 100: each alone, the rest 0. RTxV, LLMxV, LCMxV: that
matrix (800 100 200 / 300 900 400 / 500 600 A00, plus 10h for LLM, 20h for LCM) with V0,
V1, V2 and IR1-3 as above. Each row: sf 1 changes as reg=hex and F=FLAG; after | the
registers where sf 0 differs from sf 1 (63 is FLAG), or = when none.
op 24:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 22=13 25=130 F=0 | 9=7fff 22=ff 25=130000 28=1f 63=81200000
IR2: 22=2600 26=260 F=0 | 10=7fff 22=ff00 26=260000 28=3e0 63=80900000
IR3: 22=4c0000 27=4c0 F=0 | 11=7fff 22=ff0000 27=4c0000 28=7c00 63=480000
RGBC: 21=40000000 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: 9=110 10=220 11=440 21=442211 22=442211 25=110 26=220 27=440 28=2082 F=0 | 9=7fff 10=7fff 11=7fff 21=ffffff 22=ffffff 25=110000 26=220000 27=440000 28=7fff 63=81f80000
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=166 10=2cf 11=44b 22=442c16 25=166 26=2cf 27=44b 28=20a2 F=0 | 9=7fff 10=7fff 11=7fff 22=ffffff 25=166a00 26=2cfa00 27=44ba00 28=7fff 63=81f80000
op 25:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 22=13 25=130 F=0 | 9=7fff 22=ff 25=130000 28=1f 63=81200000
IR2: 22=2600 26=260 F=0 | 10=7fff 22=ff00 26=260000 28=3e0 63=80900000
IR3: 22=4c0000 27=4c0 F=0 | 11=7fff 22=ff0000 27=4c0000 28=7c00 63=480000
RGBC: 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: 9=110 10=220 11=440 22=442211 25=110 26=220 27=440 28=2082 F=0 | 9=7fff 10=7fff 11=7fff 22=ffffff 25=110000 26=220000 27=440000 28=7fff 63=81f80000
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=166 10=2cf 11=44b 22=442c16 25=166 26=2cf 27=44b 28=20a2 F=0 | 9=7fff 10=7fff 11=7fff 22=ffffff 25=166a00 26=2cfa00 27=44ba00 28=7fff 63=81f80000
op 26:
zero: 22=ff F=0 | =
unit: 22=ff F=0 | =
V0: 22=ff F=0 | =
V1: 22=ff F=0 | =
V2: 22=ff F=0 | =
IR0: 22=ff F=0 | =
IR1: 22=ff F=0 | =
IR2: 22=26ff 26=260 F=0 | 10=7fff 22=ffff 26=260000 28=3e0 63=80900000
IR3: 22=4c00ff 27=4c0 F=0 | 11=7fff 22=ff00ff 27=4c0000 28=7c00 63=480000
RGBC: 22=400000ff F=0 | =
SXY: 22=ff F=0 | =
SZ: 22=ff F=0 | =
MAC0: 22=ff F=0 | =
TR: 22=ff F=0 | =
BK: 10=220 11=440 22=4422ff 26=220 27=440 28=2080 F=0 | 10=7fff 11=7fff 22=ffffff 26=220000 27=440000 28=7fe0 63=80d80000
FC: 22=ff F=0 | =
OF: 22=ff F=0 | =
H: 22=ff F=0 | =
DQA: 22=ff F=0 | =
DQB: 22=ff F=0 | =
ZSF3: 22=ff F=0 | =
ZSF4: 22=ff F=0 | =
RTxV: 10=0 11=0 22=ff 28=2 F=0 | =
LLMxV: 10=0 11=0 22=ff 28=2 F=0 | =
LCMxV: 10=2cf 11=44b 22=442cff 26=2cf 27=44b 28=20a2 F=0 | 10=7fff 11=7fff 22=ffffff 26=2cfa00 27=44ba00 28=7fe2 63=80d80000
op 27:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: F=0 | =
IR2: F=0 | =
IR3: 22=4c0000 27=4c0 F=0 | 11=7fff 22=ff0000 27=4c0000 28=7c00 63=480000
RGBC: 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: 11=440 22=440000 27=440 28=2000 F=0 | 11=7fff 22=ff0000 27=440000 28=7c00 63=480000
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 11=0 28=82 F=0 | =
LLMxV: 11=0 28=82 F=0 | =
LCMxV: 11=44b 22=440000 27=44b 28=2082 F=0 | 11=7fff 22=ff0000 27=44ba00 28=7c82 63=480000
Done.
===== 09 SG6 F2 GTE 2B TO 34 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000400
GTE, one input at a time, lm 0, no other command bits. Cases: zero = every register 0;
unit = RT, LLM, LCM 1000h on the diagonal, the rest 0; V0 (100,200,400), V1 (110,220,440),
V2 (120,240,480), IR0 800, IR1 130, IR2 260, IR3 4C0, RGBC 40302010, SXY0-2 00200010
00400030 00600050, SZ0-3 100 200 300 400, MAC0 12345: each alone with the unit matrices.
TR (100,200,400), BK (110,220,440), FC (120,240,480), OFX A00000 OFY 780000, H 200, DQA
100, DQB 1400000, ZSF3 155, ZSF4 100: each alone, the rest 0. RTxV, LLMxV, LCMxV: that
matrix (800 100 200 / 300 900 400 / 500 600 A00, plus 10h for LLM, 20h for LCM) with V0,
V1, V2 and IR1-3 as above. Each row: sf 1 changes as reg=hex and F=FLAG; after | the
registers where sf 0 differs from sf 1 (63 is FLAG), or = when none.
op 2B:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=0 28=0 F=0 | =
IR2: 10=0 28=0 F=0 | =
IR3: 11=0 28=0 F=0 | =
RGBC: 20=40000000 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | 63=81c00000
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=0 10=0 11=0 28=0 F=0 | =
op 2C:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: F=0 | =
IR2: F=0 | =
IR3: F=0 | =
RGBC: 20=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | 63=81c00000
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: F=0 | =
LLMxV: F=0 | =
LCMxV: F=0 | =
op 2F:
zero: F=80020000 | =
unit: F=80020000 | =
V0: 9=7fff 10=7fff 11=7fff 19=400 25=100000 26=200000 27=400000 28=7fff F=81800000 | =
V1: F=80020000 | =
V2: F=80020000 | =
IR0: 8=0 F=80020000 | =
IR1: 9=0 28=0 F=80020000 | =
IR2: 10=0 28=0 F=80020000 | =
IR3: 11=0 28=0 F=80020000 | =
RGBC: F=80020000 | =
SXY: 12=400030 13=600050 14=0 F=80020000 | =
SZ: 16=200 17=300 18=400 19=0 F=80020000 | =
MAC0: 24=0 F=80020000 | =
TR: 9=7fff 10=7fff 11=7fff 19=400 25=100000 26=200000 27=400000 28=7fff F=81800000 | =
BK: F=80020000 | =
FC: F=80020000 | =
OF: 14=7800a0 F=80020000 | =
H: F=80020000 | =
DQA: 8=1000 24=1ffff00 F=80021000 | =
DQB: 8=1000 24=1400000 F=80021000 | =
ZSF3: F=80020000 | =
ZSF4: F=80020000 | =
RTxV: 9=7fff 10=7fff 11=7fff 19=390 25=120000 26=250000 27=390000 28=7fff F=81800000 | =
LLMxV: 9=0 10=0 11=0 28=0 F=80020000 | =
LCMxV: 9=0 10=0 11=0 28=0 F=80020000 | =
op 34:
zero: F=80020000 | =
unit: F=80020000 | =
V0: F=80020000 | =
V1: 13=3ff021f F=80022000 | 13=3ff03ff 63=81836000
V2: 9=120 10=240 11=480 19=480 25=120 26=240 27=480 28=2482 F=80020000 | 9=7fff 10=7fff 11=7fff 25=120000 26=240000 27=480000 28=7fff 63=81820000
IR0: 8=0 F=80020000 | =
IR1: 9=0 28=0 F=80020000 | =
IR2: 10=0 28=0 F=80020000 | =
IR3: 11=0 28=0 F=80020000 | =
RGBC: F=80020000 | =
SXY: 12=0 13=0 14=0 F=80020000 | =
SZ: 16=300 17=400 18=0 19=0 F=80020000 | =
MAC0: 24=0 F=80020000 | =
TR: 9=100 10=200 11=400 13=3ff01ff 19=400 25=100 26=200 27=400 28=2082 F=80020000 | 9=7fff 10=7fff 11=7fff 13=3ff03ff 25=100000 26=200000 27=400000 28=7fff 63=81836000
BK: F=80020000 | =
FC: F=80020000 | =
OF: 12=7800a0 13=7800a0 14=7800a0 F=80020000 | =
H: F=80020000 | =
DQA: 8=1000 24=1ffff00 F=80021000 | =
DQB: 8=1000 24=1400000 F=80021000 | =
ZSF3: F=80020000 | =
ZSF4: F=80020000 | =
RTxV: 9=144 10=29a 11=402 13=3ff0263 19=402 25=144 26=29a 27=402 28=20a2 F=80022000 | 9=7fff 10=7fff 11=7fff 13=3ff03ff 25=144000 26=29a000 27=402000 28=7fff 63=81836000
LLMxV: 9=0 10=0 11=0 28=0 F=80020000 | =
LCMxV: 9=0 10=0 11=0 28=0 F=80020000 | =
Done.
===== 10 SG7 F2 GTE 35 TO 37 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000400
GTE, one input at a time, lm 0, no other command bits. Cases: zero = every register 0;
unit = RT, LLM, LCM 1000h on the diagonal, the rest 0; V0 (100,200,400), V1 (110,220,440),
V2 (120,240,480), IR0 800, IR1 130, IR2 260, IR3 4C0, RGBC 40302010, SXY0-2 00200010
00400030 00600050, SZ0-3 100 200 300 400, MAC0 12345: each alone with the unit matrices.
TR (100,200,400), BK (110,220,440), FC (120,240,480), OFX A00000 OFY 780000, H 200, DQA
100, DQB 1400000, ZSF3 155, ZSF4 100: each alone, the rest 0. RTxV, LLMxV, LCMxV: that
matrix (800 100 200 / 300 900 400 / 500 600 A00, plus 10h for LLM, 20h for LCM) with V0,
V1, V2 and IR1-3 as above. Each row: sf 1 changes as reg=hex and F=FLAG; after | the
registers where sf 0 differs from sf 1 (63 is FLAG), or = when none.
op 35:
zero: F=80020000 | =
unit: F=80020000 | =
V0: F=80020000 | =
V1: 13=3ff021f 19=220 F=80022000 | 13=3ff03ff 63=81836000
V2: 9=120 10=240 14=3ff023f 25=120 26=240 28=82 F=80022000 | 9=7fff 10=7fff 14=3ff03ff 25=120000 26=240000 28=3ff 63=81836000
IR0: 8=0 F=80020000 | =
IR1: 9=0 28=0 F=80020000 | =
IR2: 10=0 28=0 F=80020000 | =
IR3: F=80020000 | =
RGBC: F=80020000 | =
SXY: 12=0 13=0 14=0 F=80020000 | =
SZ: 16=300 17=400 18=0 19=0 F=80020000 | =
MAC0: 24=0 F=80020000 | =
TR: 9=100 10=200 13=3ff01ff 14=3ff01ff 25=100 26=200 28=82 F=80020000 | 9=7fff 10=7fff 13=3ff03ff 14=3ff03ff 25=100000 26=200000 28=3ff 63=81836000
BK: F=80020000 | =
FC: F=80020000 | =
OF: 12=7800a0 13=7800a0 14=7800a0 F=80020000 | =
H: F=80020000 | =
DQA: 8=1000 24=1ffff00 F=80021000 | =
DQB: 8=1000 24=1400000 F=80021000 | =
ZSF3: F=80020000 | =
ZSF4: F=80020000 | =
RTxV: 9=144 10=29a 13=3ff0263 19=110 25=144 26=29a 28=24a2 F=80022000 | 9=7fff 10=7fff 13=3ff03ff 25=144000 26=29a000 28=27ff 63=81836000
LLMxV: 9=0 10=0 28=2400 F=80020000 | =
LCMxV: 9=0 10=0 28=2400 F=80020000 | =
op 36:
zero: F=80020000 | =
unit: F=80020000 | =
V0: F=80020000 | =
V1: 13=3ff0000 F=80022000 | 63=80832000
V2: 9=120 10=240 14=3ff023f 25=120 26=240 28=82 F=80022000 | 9=7fff 10=7fff 14=3ff03ff 25=120000 26=240000 28=3ff 63=81836000
IR0: 8=0 F=80020000 | =
IR1: 9=0 28=0 F=80020000 | =
IR2: 10=0 28=0 F=80020000 | =
IR3: F=80020000 | =
RGBC: F=80020000 | =
SXY: 12=0 13=0 14=0 F=80020000 | =
SZ: 16=200 17=300 18=400 19=0 F=80020000 | =
MAC0: 24=0 F=80020000 | =
TR: 9=100 10=200 13=3ff0000 14=3ff01ff 25=100 26=200 28=82 F=80020000 | 9=7fff 10=7fff 14=3ff03ff 25=100000 26=200000 28=3ff 63=81836000
BK: F=80020000 | =
FC: F=80020000 | =
OF: 12=7800a0 13=7800a0 14=7800a0 F=80020000 | =
H: F=80020000 | =
DQA: 8=1000 24=1ffff00 F=80021000 | =
DQB: 8=1000 24=1400000 F=80021000 | =
ZSF3: F=80020000 | =
ZSF4: F=80020000 | =
RTxV: 9=144 10=29a 13=3ff0000 14=3ff0287 25=144 26=29a 28=24a2 F=80022000 | 9=7fff 10=7fff 14=3ff03ff 25=144000 26=29a000 28=27ff 63=81836000
LLMxV: 9=0 10=0 28=2400 F=80020000 | =
LCMxV: 9=0 10=0 28=2400 F=80020000 | =
op 37:
zero: F=80020000 | =
unit: F=80020000 | =
V0: F=80020000 | =
V1: 13=3ff0000 F=80022000 | 63=80832000
V2: 10=240 14=3ff0000 26=240 28=80 F=80022000 | 10=7fff 26=240000 28=3e0 63=80832000
IR0: 8=0 F=80020000 | =
IR1: 14=25f F=80020000 | =
IR2: 10=0 28=0 F=80020000 | =
IR3: F=80020000 | =
RGBC: F=80020000 | =
SXY: 12=0 13=0 14=0 F=80020000 | =
SZ: 16=200 17=300 18=400 19=0 F=80020000 | =
MAC0: 24=0 F=80020000 | =
TR: 10=200 13=3ff0000 14=3ff0000 26=200 28=80 F=80020000 | 10=7fff 26=200000 28=3e0 63=80832000
BK: F=80020000 | =
FC: F=80020000 | =
OF: 12=7800a0 13=7800a0 14=7800a0 F=80020000 | =
H: F=80020000 | =
DQA: 8=1000 24=1ffff00 F=80021000 | =
DQB: 8=1000 24=1400000 F=80021000 | =
ZSF3: F=80020000 | =
ZSF4: F=80020000 | =
RTxV: 10=29a 13=3ff0000 14=3ff025f 26=29a 28=24a2 F=80022000 | 10=7fff 26=29a000 28=27e2 63=80832000
LLMxV: 10=0 14=25f 28=2402 F=80020000 | =
LCMxV: 10=0 14=25f 28=2402 F=80020000 | =
Done.
===== 11 SG8 F2 GTE 38 TO 3B | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000400
GTE, one input at a time, lm 0, no other command bits. Cases: zero = every register 0;
unit = RT, LLM, LCM 1000h on the diagonal, the rest 0; V0 (100,200,400), V1 (110,220,440),
V2 (120,240,480), IR0 800, IR1 130, IR2 260, IR3 4C0, RGBC 40302010, SXY0-2 00200010
00400030 00600050, SZ0-3 100 200 300 400, MAC0 12345: each alone with the unit matrices.
TR (100,200,400), BK (110,220,440), FC (120,240,480), OFX A00000 OFY 780000, H 200, DQA
100, DQB 1400000, ZSF3 155, ZSF4 100: each alone, the rest 0. RTxV, LLMxV, LCMxV: that
matrix (800 100 200 / 300 900 400 / 500 600 A00, plus 10h for LLM, 20h for LCM) with V0,
V1, V2 and IR1-3 as above. Each row: sf 1 changes as reg=hex and F=FLAG; after | the
registers where sf 0 differs from sf 1 (63 is FLAG), or = when none.
op 38:
zero: F=80020000 | =
unit: F=80020000 | =
V0: F=80020000 | =
V1: F=80020000 | =
V2: 10=240 14=3ff0000 26=240 28=80 F=80022000 | 10=7fff 26=240000 28=3e0 63=80832000
IR0: 8=0 F=80020000 | =
IR1: 14=25f F=80020000 | =
IR2: 10=0 28=0 F=80020000 | =
IR3: F=80020000 | =
RGBC: F=80020000 | =
SXY: 12=0 13=0 14=0 F=80020000 | =
SZ: 16=200 17=300 18=400 19=0 F=80020000 | =
MAC0: 24=0 F=80020000 | =
TR: 10=200 14=3ff0000 26=200 28=80 F=80020000 | 10=7fff 26=200000 28=3e0 63=80832000
BK: F=80020000 | =
FC: F=80020000 | =
OF: 12=7800a0 13=7800a0 14=7800a0 F=80020000 | =
H: F=80020000 | =
DQA: 8=1000 24=1ffff00 F=80021000 | =
DQB: 8=1000 24=1400000 F=80021000 | =
ZSF3: F=80020000 | =
ZSF4: F=80020000 | =
RTxV: 10=29a 14=3ff025f 26=29a 28=24a2 F=80022000 | 10=7fff 26=29a000 28=27e2 63=80832000
LLMxV: 10=0 14=25f 28=2402 F=80020000 | =
LCMxV: 10=0 14=25f 28=2402 F=80020000 | =
op 39:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: 8=0 F=0 | =
IR1: 14=25f F=0 | =
IR2: 14=3ff0000 F=80002000 | =
IR3: F=0 | =
RGBC: F=0 | =
SXY: 12=0 13=0 14=0 F=0 | =
SZ: 16=200 17=300 18=400 19=0 F=0 | =
MAC0: 24=0 F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: 8=1000 24=1ffff00 F=1000 | =
DQB: 8=1000 24=1400000 F=1000 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 14=3ff025f F=80002000 | =
LLMxV: 14=3ff025f F=80002000 | =
LCMxV: 14=3ff025f F=80002000 | =
op 3A:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: 8=0 F=0 | =
IR1: 14=25f F=0 | =
IR2: 14=3ff0000 F=80002000 | =
IR3: F=0 | =
RGBC: F=0 | =
SXY: 12=600050 13=0 14=0 F=0 | =
SZ: 16=200 17=300 18=400 19=0 F=0 | =
MAC0: 24=0 F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: 8=1000 24=1ffff00 F=1000 | =
DQB: 8=1000 24=1400000 F=1000 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 14=3ff025f F=80002000 | =
LLMxV: 14=3ff025f F=80002000 | =
LCMxV: 14=3ff025f F=80002000 | =
op 3B:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: 8=0 F=0 | =
IR1: 14=25f F=0 | =
IR2: 14=3ff0000 F=80002000 | =
IR3: F=0 | =
RGBC: F=0 | =
SXY: 12=400030 13=600050 14=0 F=0 | =
SZ: F=0 | =
MAC0: 24=0 F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: 8=1000 24=1ffff00 F=1000 | =
DQB: 8=1000 24=1400000 F=1000 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 14=3ff025f F=80002000 | =
LLMxV: 14=3ff025f F=80002000 | =
LCMxV: 14=3ff025f F=80002000 | =
Done.
===== 12 SMS F2 MDEC SHORT | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000400
Short decodes by CPU at 8 bit (depth 1), unsigned, the 4bit/8bit block's tables
(kBlkQuant, kBlkScale). Pattern words: FE00h end code over a DC halfword, q_scale 1;
A has DC 16*i-256 in word i (i = 0 to 31), B has DC 240-16*i. At most 256 words shown.
No pattern (the tables were the last words in), then count 1, 1 words written: 80 words out, CRC A589EA50, status 8204FFFF
A8B7C2C8 787E8998 9AA8B4BA 6A707B8A 85949FA5 555B6675 77859197 474D5867
77859197 474D5867 85949FA5 555B6675 9AA8B4BA 6A707B8A A8B7C2C8 787E8998
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
Pattern A first (count 32: 512 words out, CRC CF32359C), then count 1, 1 words written: 496 words out, CRC 3410B6D8, status 8204FFFF
32414C52 02081422 69788389 393F4A59 B6C5D0D6 868C97A6 ECFBFFFF BCC2CEDC
ECFBFFFF BCC2CEDC B6C5D0D6 868C97A6 69788389 393F4A59 32414C52 02081422
48484848 48484848 48484848 48484848 48484848 48484848 48484848 48484848
48484848 48484848 48484848 48484848 48484848 48484848 48484848 48484848
4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C
4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C
50505050 50505050 50505050 50505050 50505050 50505050 50505050 50505050
50505050 50505050 50505050 50505050 50505050 50505050 50505050 50505050
54545454 54545454 54545454 54545454 54545454 54545454 54545454 54545454
54545454 54545454 54545454 54545454 54545454 54545454 54545454 54545454
58585858 58585858 58585858 58585858 58585858 58585858 58585858 58585858
58585858 58585858 58585858 58585858 58585858 58585858 58585858 58585858
5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C
5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C
60606060 60606060 60606060 60606060 60606060 60606060 60606060 60606060
60606060 60606060 60606060 60606060 60606060 60606060 60606060 60606060
64646464 64646464 64646464 64646464 64646464 64646464 64646464 64646464
64646464 64646464 64646464 64646464 64646464 64646464 64646464 64646464
68686868 68686868 68686868 68686868 68686868 68686868 68686868 68686868
68686868 68686868 68686868 68686868 68686868 68686868 68686868 68686868
6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C
6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C
70707070 70707070 70707070 70707070 70707070 70707070 70707070 70707070
70707070 70707070 70707070 70707070 70707070 70707070 70707070 70707070
74747474 74747474 74747474 74747474 74747474 74747474 74747474 74747474
74747474 74747474 74747474 74747474 74747474 74747474 74747474 74747474
78787878 78787878 78787878 78787878 78787878 78787878 78787878 78787878
78787878 78787878 78787878 78787878 78787878 78787878 78787878 78787878
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
Pattern B first (count 32: 512 words out, CRC BF7813E8), then count 1, 1 words written: 496 words out, CRC A468B6F1, status 8204FFFF
E6F5FFFF B6BCC7D6 B3C2CDD3 838995A3 6B7A858C 3B414D5B 39475359 080F1A29
39475359 080F1A29 6B7A858C 3B414D5B B3C2CDD3 838995A3 E6F5FFFF B6BCC7D6
B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4
B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4
B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0
B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0
ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC
ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC
A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8
A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8
A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4
A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C
9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C
98989898 98989898 98989898 98989898 98989898 98989898 98989898 98989898
98989898 98989898 98989898 98989898 98989898 98989898 98989898 98989898
94949494 94949494 94949494 94949494 94949494 94949494 94949494 94949494
94949494 94949494 94949494 94949494 94949494 94949494 94949494 94949494
90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090
90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090
8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C
8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C
88888888 88888888 88888888 88888888 88888888 88888888 88888888 88888888
88888888 88888888 88888888 88888888 88888888 88888888 88888888 88888888
84848484 84848484 84848484 84848484 84848484 84848484 84848484 84848484
84848484 84848484 84848484 84848484 84848484 84848484 84848484 84848484
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
No pattern (the tables were the last words in), then count 2, 2 words written: 480 words out, CRC CA80C555, status 8204FFFF
5694E2FF C79E6746 65A3F1FF D6AD7555 75B3FFFF E6BD8665 76B4FFFF E7BE8766
5C9AE8FF CDA46C4C 2B69B7EC 9C733C1B 003482B7 673E0600 00115F94 441B0000
B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0
B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0
ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC
ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC
A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8
A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8
A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4
A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C
9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C
98989898 98989898 98989898 98989898 98989898 98989898 98989898 98989898
98989898 98989898 98989898 98989898 98989898 98989898 98989898 98989898
94949494 94949494 94949494 94949494 94949494 94949494 94949494 94949494
94949494 94949494 94949494 94949494 94949494 94949494 94949494 94949494
90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090
90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090
8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C
8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C
88888888 88888888 88888888 88888888 88888888 88888888 88888888 88888888
88888888 88888888 88888888 88888888 88888888 88888888 88888888 88888888
84848484 84848484 84848484 84848484 84848484 84848484 84848484 84848484
84848484 84848484 84848484 84848484 84848484 84848484 84848484 84848484
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
78787878 78787878 78787878 78787878 78787878 78787878 78787878 78787878
78787878 78787878 78787878 78787878 78787878 78787878 78787878 78787878
Pattern A first (count 32: 512 words out, CRC CF32359C), then count 2, 2 words written: 480 words out, CRC 5D6A404E, status 8204FFFF
FDD99D70 2059ACEE FFE8AB7F 2E67BBFC FFF9BC8F 3F78CBFF FFF9BD90 4079CCFF
FFDFA376 265FB2F3 D3AF7245 002E81C3 9D793C10 00004C8D 7B561A00 0000296B
4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C
4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C
50505050 50505050 50505050 50505050 50505050 50505050 50505050 50505050
50505050 50505050 50505050 50505050 50505050 50505050 50505050 50505050
54545454 54545454 54545454 54545454 54545454 54545454 54545454 54545454
54545454 54545454 54545454 54545454 54545454 54545454 54545454 54545454
58585858 58585858 58585858 58585858 58585858 58585858 58585858 58585858
58585858 58585858 58585858 58585858 58585858 58585858 58585858 58585858
5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C
5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C
60606060 60606060 60606060 60606060 60606060 60606060 60606060 60606060
60606060 60606060 60606060 60606060 60606060 60606060 60606060 60606060
64646464 64646464 64646464 64646464 64646464 64646464 64646464 64646464
64646464 64646464 64646464 64646464 64646464 64646464 64646464 64646464
68686868 68686868 68686868 68686868 68686868 68686868 68686868 68686868
68686868 68686868 68686868 68686868 68686868 68686868 68686868 68686868
6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C
6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C
70707070 70707070 70707070 70707070 70707070 70707070 70707070 70707070
70707070 70707070 70707070 70707070 70707070 70707070 70707070 70707070
74747474 74747474 74747474 74747474 74747474 74747474 74747474 74747474
74747474 74747474 74747474 74747474 74747474 74747474 74747474 74747474
78787878 78787878 78787878 78787878 78787878 78787878 78787878 78787878
78787878 78787878 78787878 78787878 78787878 78787878 78787878 78787878
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
84848484 84848484 84848484 84848484 84848484 84848484 84848484 84848484
84848484 84848484 84848484 84848484 84848484 84848484 84848484 84848484
Pattern B first (count 32: 512 words out, CRC BF7813E8), then count 2, 2 words written: 480 words out, CRC CA80C555, status 8204FFFF
5694E2FF C79E6746 65A3F1FF D6AD7555 75B3FFFF E6BD8665 76B4FFFF E7BE8766
5C9AE8FF CDA46C4C 2B69B7EC 9C733C1B 003482B7 673E0600 00115F94 441B0000
B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0
B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0
ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC
ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC
A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8
A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8
A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4
A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C
9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C
98989898 98989898 98989898 98989898 98989898 98989898 98989898 98989898
98989898 98989898 98989898 98989898 98989898 98989898 98989898 98989898
94949494 94949494 94949494 94949494 94949494 94949494 94949494 94949494
94949494 94949494 94949494 94949494 94949494 94949494 94949494 94949494
90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090
90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090
8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C
8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C
88888888 88888888 88888888 88888888 88888888 88888888 88888888 88888888
88888888 88888888 88888888 88888888 88888888 88888888 88888888 88888888
84848484 84848484 84848484 84848484 84848484 84848484 84848484 84848484
84848484 84848484 84848484 84848484 84848484 84848484 84848484 84848484
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
78787878 78787878 78787878 78787878 78787878 78787878 78787878 78787878
78787878 78787878 78787878 78787878 78787878 78787878 78787878 78787878
Done.
===== 13 SSD F2 SPU DRAIN | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000400
SPU write FIFO drain to scratch at 30000h (32 halfwords filled EEEEh first), SPUCNT
transfer mode Stop after the wait, then all 32 read back by DMA. Pattern B000h + i.
By DMA, 16 words in one block; the wait counted from the DMA's end:
DMA, wait 0: 9 written, 0 EEEEh, 0 5555h, 23 other (first 1111) wwwwwwwww???????????????????????
DMA, wait 50: 11 written, 0 EEEEh, 0 5555h, 21 other (first 1111) wwwwwwwwwww?????????????????????
DMA, wait 100: 11 written, 0 EEEEh, 0 5555h, 21 other (first 1111) wwwwwwwwwww?????????????????????
DMA, wait 150: 11 written, 0 EEEEh, 0 5555h, 21 other (first 1111) wwwwwwwwwww?????????????????????
DMA, wait 200: 11 written, 0 EEEEh, 0 5555h, 21 other (first 1111) wwwwwwwwwww?????????????????????
DMA, wait 250: 11 written, 0 EEEEh, 0 5555h, 21 other (first 1111) wwwwwwwwwww?????????????????????
DMA, wait 300: 14 written, 0 EEEEh, 0 5555h, 18 other (first 0007) wwwwwwwwwwwwww??????????????????
DMA, wait 350: 15 written, 0 EEEEh, 0 5555h, 17 other (first 1111) wwwwwwwwwwwwwww?????????????????
DMA, wait 400: 18 written, 0 EEEEh, 0 5555h, 14 other (first 0009) wwwwwwwwwwwwwwwwww??????????????
DMA, wait 450: 19 written, 0 EEEEh, 0 5555h, 13 other (first 1111) wwwwwwwwwwwwwwwwwww?????????????
DMA, wait 500: 22 written, 0 EEEEh, 0 5555h, 10 other (first 000B) wwwwwwwwwwwwwwwwwwwwww??????????
DMA, wait 550: 24 written, 0 EEEEh, 0 5555h, 8 other (first 000C) wwwwwwwwwwwwwwwwwwwwwwww????????
DMA, wait 600: 27 written, 0 EEEEh, 0 5555h, 5 other (first 1111) wwwwwwwwwwwwwwwwwwwwwwwwwww?????
DMA, wait 650: 28 written, 0 EEEEh, 0 5555h, 4 other (first 000E) wwwwwwwwwwwwwwwwwwwwwwwwwwww????
DMA, wait 700: 31 written, 0 EEEEh, 0 5555h, 1 other (first 1111) wwwwwwwwwwwwwwwwwwwwwwwwwwwwwww?
DMA, wait 750: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
DMA, wait 800: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
DMA, wait 850: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
DMA, wait 900: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
By hand, 16 halfwords (B000h-B00Fh) to the FIFO, then Manual Write; the wait counted
from the SPUCNT store:
manual, wait 0: 0 written, 0 EEEEh, 0 5555h, 32 other (first B003) ????????????????????????????????
manual, wait 50: 0 written, 0 EEEEh, 0 5555h, 32 other (first B003) ????????????????????????????????
manual, wait 100: 0 written, 0 EEEEh, 0 5555h, 32 other (first B003) ????????????????????????????????
manual, wait 150: 0 written, 0 EEEEh, 0 5555h, 32 other (first B001) ????????????????????????????????
manual, wait 200: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 250: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 300: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 350: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 400: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 450: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 500: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 550: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 600: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 650: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 700: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 750: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 800: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 850: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 900: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
SPUSTAT after the Manual Write store, status@timer 2:
0800@53 0800@86 0800@119 0800@152 0800@185 0800@218 0C10@251 0C10@284
0C10@317 0C10@350 0C10@383 0C10@416 0C10@451 0C10@484 0C10@517 0C10@550
0C10@583 0C10@616 0C10@649 0C10@683 0C10@716 0C10@749 0C10@782 0C10@815
manual, wait 3000: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
Done.
===== 14 SMR F2 MDEC RESET | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000400
MDEC reset. Each row starts from a 15 bit decode with the input full (status read just
before, shown once), writes timer 2's mode, MDEC1 80000000h, then N nops, then reads
MDEC1 and timer 2. Run twice from the same state: cold, then warm. status@timer 2.
Status before the reset: E60400DF
0 nops: cold E6040040@13, warm E6040040@6
10 nops: cold 80040000@34, warm 80040000@14
20 nops: cold 80040000@55, warm 80040000@24
30 nops: cold 80040000@74, warm 80040000@34
40 nops: cold 80040000@100, warm 80040000@44
50 nops: cold 80040000@124, warm 80040000@54
60 nops: cold 80040000@149, warm 80040000@64
70 nops: cold 80040000@169, warm 80040000@74
80 nops: cold 80040000@192, warm 80040000@84
90 nops: cold 80040000@214, warm 80040000@159
100 nops: cold 80040000@236, warm 80040000@104
110 nops: cold 80040000@258, warm 80040000@178
120 nops: cold 80040000@284, warm 80040000@134
130 nops: cold 80040000@303, warm 80040000@134
140 nops: cold 80040000@331, warm 80040000@144
150 nops: cold 80040000@352, warm 80040000@154
160 nops: cold 80040000@374, warm 80040000@201
170 nops: cold 80040000@397, warm 80040000@209
180 nops: cold 80040000@423, warm 80040000@228
190 nops: cold 80040000@442, warm 80040000@194
200 nops: cold 80040000@465, warm 80040000@204
Enables after a reset. From idle (a reset 2000 cycles before): MDEC1 80000000h, N nops,
MDEC1 60000000h, then MDEC1 and timer 2 read at once (status@timer 2); the status again
2000 cycles on; MDEC0 40000000h (luminance quant table) and the status; its 16 words by
DMA0 (cycles, or timeout after 200000 polls) and the status after. Run cold, then warm.
Enables rows, each with a DMA0 that times out if the enables were lost: not run in this table.
Done.
===== 15 SDS F2 DMA SPU COST | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 00000400
DMA4 SPU write, SyncMode 1, to 30000h, delay register 1F801014h = 200931E1h (it was
200931E1). Cycles from the CHCR write until bit 24 clears, three times each.
Blocks of 1 words x 256 (256 words): 16346 16346 16338
Blocks of 2 words x 128 (256 words): 16301 16301 16301
Blocks of 3 words x 85 (255 words): 16245 16389 16347
Blocks of 4 words x 64 (256 words): 18070 18069 18069
Blocks of 5 words x 51 (255 words): 17597 17608 17601
Blocks of 6 words x 42 (252 words): 17024 17012 17012
Blocks of 8 words x 32 (256 words): 17067 17072 17072
Blocks of 12 words x 21 (252 words): 15809 15809 15809
Blocks of 16 words x 16 (256 words): 16883 16883 16883
Blocks of 24 words x 10 (240 words): 10425 10383 10383
Blocks of 31 words x 8 (248 words): 8170 8135 8133
Blocks of 32 words x 8 (256 words): 8160 8202 8202
SyncMode 0, which the CPU cannot poll during: not run in this table.
Done.
27 September 2026 run 5
===== 00 RUN | BIOS 19951204 System ROM Version 3.0 11/18/96 A
15 tests
A chain program, linked at 80010000
Saved on the card in slot 2, from image 1
COP0 at start: BPC 00000000 BDA 80024F50 TAR BFC02BAC DCIC 00000000 BadVaddr 800154CE BDAM FFFFFFFF
BPCM 00000000 SR 40000000 Cause 00000020 EPC 801132F8 PRId 00000002
===== 01 SDI F2 DICR POLL | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 800154CE
DICR written with timer 2 zeroed just before it. Interrupts off (SR IEc 0) throughout.
DICR 0 is the scale: its loop runs all 300 turns, so timer 2 over 300 gives one turn.
I_STAT bit 3, a loop of one I_STAT load a turn (lw, addiu, andi, sltiu, sltu, and, bnez, nop):
DICR 00000000: the bit never set in 300 turns; timer 2 after them 3622
DICR 00008000: the bit was set on turn 2; timer 2 after the loop 24
DICR 00008000: the bit was set on turn 2; timer 2 after the loop 24
DICR 00008000: the bit was set on turn 2; timer 2 after the loop 24
I_STAT bit 3, eight I_STAT loads back to back:
DICR 00000000: I_STAT bit 3 after each of the 8 loads: 0 0 0 0 0 0 0 0; timer 2 after them 53
DICR 00008000: I_STAT bit 3 after each of the 8 loads: 0 0 1 1 1 1 1 1; timer 2 after them 32
DICR 00008000: I_STAT bit 3 after each of the 8 loads: 0 0 1 1 1 1 1 1; timer 2 after them 32
DICR 00008000: I_STAT bit 3 after each of the 8 loads: 0 0 1 1 1 1 1 1; timer 2 after them 32
CAUSE.IP2, a loop of one mfc0 CAUSE a turn (the same loop), I_MASK 00000008:
DICR 00000000: the bit never set in 300 turns; timer 2 after them 2420
DICR 00008000: the bit was set on turn 2; timer 2 after the loop 16
DICR 00008000: the bit was set on turn 2; timer 2 after the loop 16
DICR 00008000: the bit was set on turn 2; timer 2 after the loop 16
CAUSE.IP2, eight mfc0 CAUSE back to back, I_MASK 00000008:
DICR 00000000: CAUSE.IP2 after each of the 8 loads: 0 0 0 0 0 0 0 0; timer 2 after them 25
DICR 00008000: CAUSE.IP2 after each of the 8 loads: 0 0 0 0 0 0 0 1; timer 2 after them 8
DICR 00008000: CAUSE.IP2 after each of the 8 loads: 0 0 0 0 0 0 0 1; timer 2 after them 8
DICR 00008000: CAUSE.IP2 after each of the 8 loads: 0 0 0 0 0 0 0 1; timer 2 after them 8
DICR was 00000000 and is back to 0, then its enables.
Done.
===== 02 SIM F2 IMASK UPPER | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 800154CE
I_MASK's upper half. Each row stores to I_MASK and loads it back; the value is
12345678h unless the row says otherwise. Interrupts off. The RAM word is 5AA5C33Ch, the
BIOS word at BFC00100h is its date, the scratchpad word is written 7EE71234h first.
a: sw $9,1074h($8) (AD091074h), lw (code at 80016048): cached 3C090678 then 12340678, uncached 03E00678
b: sw $10,1074h($8) (AD0A1074h), lw (code at 80016068): cached 12340678 then 12340678, uncached 03E00678
c: sw $9,4($11) (AD690004h), lw (code at 8001608C): cached 12340678 then 12340678, uncached 03E00678
d: value 0000FFFFh, sw $9,1074h($8), lw (code at 800160B0): cached 000007FF then 000007FF, uncached 03E007FF
e: sw, lw of RAM, nop, lw (code at 800160CC): cached 5AA50678 then 5AA50678, uncached 03E00678
f: sw, lw of BIOS BFC00100h, nop, lw (code at 800160FC): cached 3C090678 then 27BD0678, uncached 03E00678
g: sw, lw of GPUSTAT, nop, lw (code at 80016128): cached 00000678 then 27BD0678, uncached 03E00678
h: sw, lw of scratchpad, nop, lw (code at 80016150): cached 3C090678 then 27BD0678, uncached 03E00678
i: sw, lw of I_STAT, nop, lw (code at 80016178): cached 00000678 then 27BD0678, uncached 03E00678
j: lw of RAM, nop, sw, lw (code at 800161A0): cached 12340678 then 12340678, uncached 03E00678
k: sw, 4 nops, lw (code at 800161D0): cached 00000678 then 27BD0678, uncached 03E00678
l: sw, lw of timer 2's counter, nop, lw (code at 80016200): cached AFB00678 then 27BD0678, uncached 03E00678
GPUSTAT now 5606200F. I_MASK back to 24840009.
Done.
===== 03 STH F2 T1 HBLANK SYNC1 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 800154CE
Timer1 sync mode 1 (reset at vblank), set at the vblank IRQ (I_STAT bit 0, polled);
timer 2 counts system cycles from then. Each sample is timer 2 then timer 1 (t:v).
Hblank clock (mode 0103h), run 1, every sample (141):
47033:21 47082:21 47124:21 47175:22 47226:22 47277:22 47319:22 47370:22
47421:22 47472:22 47527:22 47569:22 47620:22 47671:22 47722:22 47773:22
47824:22 47875:22 47926:22 47977:22 48019:22 48070:22 48121:22 48172:22
48223:22 48274:22 48325:22 48376:22 48427:22 48469:22 48520:22 48571:22
48622:22 48673:22 48724:22 48775:22 48826:22 48877:22 48919:22 48970:22
49021:22 49072:22 49123:22 49174:22 49225:22 49276:22 49327:23 49369:23
49420:23 49471:23 49522:23 49575:23 49626:23 49677:23 49719:23 49770:23
49821:23 49872:23 49923:23 49974:23 50025:23 50076:23 50127:23 50169:23
50220:23 50271:23 50322:23 50373:23 50424:23 50475:23 50526:23 50577:23
50619:23 50670:23 50721:23 50772:23 50823:23 50874:23 50925:23 50976:23
51027:23 51069:23 51120:23 51171:23 51222:23 51273:23 51324:23 51375:23
51426:23 51477:24 51519:24 51570:24 51623:24 51674:24 51725:24 51776:24
51827:24 51869:24 51920:24 51971:0 52022:0 52073:0 52124:0 52175:0
52226:0 52277:0 52319:0 52370:0 52421:0 52472:0 52523:0 52574:0
52625:0 52676:0 52727:0 52769:0 52820:0 52871:0 52922:0 52973:0
53024:0 53075:0 53126:0 53177:0 53219:0 53270:0 53321:0 53372:0
53423:0 53474:0 53525:0 53576:0 53627:0 53671:0 53722:0 53773:0
53824:0 53875:0 53927:0 53969:0 54020:0
Hblank clock (mode 0103h), run 1, 141 samples; where timer 1 changes: 47124:21->47175:22 49276:22->49327:23 51426:23->51477:24 51920:24->51971:0
Hblank clock (mode 0103h), run 2, 141 samples; where timer 1 changes: 47082:21->47124:22 49270:22->49321:23 51420:23->51471:24 51923:24->51974:0
Hblank clock (mode 0103h), run 3, 141 samples; where timer 1 changes: 47124:21->47175:22 49274:22->49325:23 51424:23->51475:24 51977:24->52019:0
Hblank clock (mode 0103h), run 4, 141 samples; where timer 1 changes: 47129:21->47171:22 49270:22->49321:23 51420:23->51471:24 51972:24->52023:0
System clock (mode 0003h), 141 samples; where timer 1 drops: 49376:49376->49427:4; last sample 54025:4602
Done.
===== 04 SG1 F2 GTE 02 TO 07 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 800154CE
GTE, one input at a time, lm 0, no other command bits. Cases: zero = every register 0;
unit = RT, LLM, LCM 1000h on the diagonal, the rest 0; V0 (100,200,400), V1 (110,220,440),
V2 (120,240,480), IR0 800, IR1 130, IR2 260, IR3 4C0, RGBC 40302010, SXY0-2 00200010
00400030 00600050, SZ0-3 100 200 300 400, MAC0 12345: each alone with the unit matrices.
TR (100,200,400), BK (110,220,440), FC (120,240,480), OFX A00000 OFY 780000, H 200, DQA
100, DQB 1400000, ZSF3 155, ZSF4 100: each alone, the rest 0. RTxV, LLMxV, LCMxV: that
matrix (800 100 200 / 300 900 400 / 500 600 A00, plus 10h for LLM, 20h for LCM) with V0,
V1, V2 and IR1-3 as above. Each row: sf 1 changes as reg=hex and F=FLAG; after | the
registers where sf 0 differs from sf 1 (63 is FLAG), or = when none.
op 02:
zero: F=80020000 | =
unit: F=80020000 | =
V0: 9=100 10=200 19=100 25=100 26=200 28=82 F=0 | 9=7fff 10=7fff 25=100000 26=200000 28=3ff 63=81800000
V1: F=80020000 | =
V2: F=80020000 | =
IR0: 8=0 F=80020000 | =
IR1: 9=0 28=0 F=80020000 | =
IR2: 10=0 28=0 F=80020000 | =
IR3: F=80020000 | =
RGBC: F=80020000 | =
SXY: 12=400030 13=600050 14=0 F=80020000 | =
SZ: 16=200 17=300 18=400 19=0 F=80020000 | =
MAC0: 24=0 F=80020000 | =
TR: 9=100 10=200 14=3ff01ff 25=100 26=200 28=82 F=80020000 | 9=7fff 10=7fff 14=3ff03ff 25=100000 26=200000 28=3ff 63=81836000
BK: F=80020000 | =
FC: F=80020000 | =
OF: 14=7800a0 F=80020000 | =
H: F=80020000 | =
DQA: 8=1000 24=1ffff00 F=80021000 | =
DQB: 8=1000 24=1400000 F=80021000 | =
ZSF3: F=80020000 | =
ZSF4: F=80020000 | =
RTxV: 9=120 10=250 19=80 25=120 26=250 F=0 | 9=7fff 10=7fff 25=120000 26=250000 28=27ff 63=81800000
LLMxV: 9=0 10=0 28=2400 F=80020000 | =
LCMxV: 9=0 10=0 28=2400 F=80020000 | =
op 03:
zero: F=80020000 | =
unit: F=80020000 | =
V0: 10=200 14=3ff0000 26=200 28=80 F=80020000 | 10=7fff 26=200000 28=3e0 63=80832000
V1: F=80020000 | =
V2: F=80020000 | =
IR0: 8=0 F=80020000 | =
IR1: 14=25f F=80020000 | =
IR2: 10=0 28=0 F=80020000 | =
IR3: F=80020000 | =
RGBC: F=80020000 | =
SXY: 12=400030 13=600050 14=0 F=80020000 | =
SZ: 16=200 17=300 18=400 19=0 F=80020000 | =
MAC0: 24=0 F=80020000 | =
TR: 10=200 14=3ff0000 26=200 28=80 F=80020000 | 10=7fff 26=200000 28=3e0 63=80832000
BK: F=80020000 | =
FC: F=80020000 | =
OF: 14=7800a0 F=80020000 | =
H: F=80020000 | =
DQA: 8=1000 24=1ffff00 F=80021000 | =
DQB: 8=1000 24=1400000 F=80021000 | =
ZSF3: F=80020000 | =
ZSF4: F=80020000 | =
RTxV: 10=250 14=3ff025f 26=250 F=80022000 | 10=7fff 26=250000 28=27e2 63=80832000
LLMxV: 10=0 14=25f 28=2402 F=80020000 | =
LCMxV: 10=0 14=25f 28=2402 F=80020000 | =
op 04:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: 8=0 F=0 | =
IR1: 14=25f F=0 | =
IR2: 14=3ff0000 F=80002000 | =
IR3: F=0 | =
RGBC: F=0 | =
SXY: 12=400030 13=600050 14=0 F=0 | =
SZ: F=0 | =
MAC0: 24=0 F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: 8=1000 24=1ffff00 F=1000 | =
DQB: 8=1000 24=1400000 F=1000 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 14=3ff025f F=80002000 | =
LLMxV: 14=3ff025f F=80002000 | =
LCMxV: 14=3ff025f F=80002000 | =
op 07:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: F=0 | =
IR2: F=0 | =
IR3: F=0 | =
RGBC: F=0 | =
SXY: 24=fffffc00 F=0 | =
SZ: F=0 | =
MAC0: 24=0 F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: 24=120 F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: F=0 | =
LLMxV: F=0 | =
LCMxV: F=0 | =
Done.
===== 05 SG2 F2 GTE 08 TO 17 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 800154CE
GTE, one input at a time, lm 0, no other command bits. Cases: zero = every register 0;
unit = RT, LLM, LCM 1000h on the diagonal, the rest 0; V0 (100,200,400), V1 (110,220,440),
V2 (120,240,480), IR0 800, IR1 130, IR2 260, IR3 4C0, RGBC 40302010, SXY0-2 00200010
00400030 00600050, SZ0-3 100 200 300 400, MAC0 12345: each alone with the unit matrices.
TR (100,200,400), BK (110,220,440), FC (120,240,480), OFX A00000 OFY 780000, H 200, DQA
100, DQB 1400000, ZSF3 155, ZSF4 100: each alone, the rest 0. RTxV, LLMxV, LCMxV: that
matrix (800 100 200 / 300 900 400 / 500 600 A00, plus 10h for LLM, 20h for LCM) with V0,
V1, V2 and IR1-3 as above. Each row: sf 1 changes as reg=hex and F=FLAG; after | the
registers where sf 0 differs from sf 1 (63 is FLAG), or = when none.
op 08:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: F=0 | =
IR2: F=0 | =
IR3: F=0 | =
RGBC: F=0 | =
SXY: 24=ffffea00 F=0 | =
SZ: F=0 | =
MAC0: 24=0 F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: 24=120 F=0 | 24=0
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: F=0 | =
LLMxV: F=0 | =
LCMxV: F=0 | =
op 09:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: F=0 | =
IR2: F=0 | =
IR3: F=0 | =
RGBC: F=0 | =
SXY: 24=ffffe000 F=0 | =
SZ: F=0 | =
MAC0: 24=0 F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: 24=120 F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: F=0 | =
LLMxV: F=0 | =
LCMxV: F=0 | =
op 0A:
zero: F=0 | =
unit: 20=ffffff 21=ffffff F=81f80000 | =
V0: 20=ffffff 21=ffffff F=81f80000 | =
V1: 20=ffffff 21=ffffff F=81f80000 | =
V2: 20=ffffff 21=ffffff F=81f80000 | =
IR0: 20=ffffff 21=ffffff F=81f80000 | =
IR1: 9=7fff 20=ffffff 21=ffffff 22=ff 25=130000 28=1f F=81f80000 | =
IR2: 10=7fff 20=ffffff 21=ffffff 22=ff00 26=260000 28=3e0 F=81f80000 | =
IR3: 11=7fff 20=ffffff 21=ffffff 22=ff0000 27=4c0000 28=7c00 F=81f80000 | =
RGBC: 20=40ffffff 21=40ffffff 22=40000000 F=81f80000 | =
SXY: 20=ffffff 21=ffffff 24=fffff400 F=81f80000 | =
SZ: 20=ffffff 21=ffffff F=81f80000 | =
MAC0: 20=ffffff 21=ffffff 24=0 F=81f80000 | =
TR: F=0 | =
BK: 9=7fff 10=7fff 11=7fff 20=ffffff 21=ffffff 22=ffffff 25=110000 26=220000 27=440000 28=7fff F=81f80000 | =
FC: 24=120 F=0 | 24=0
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=7fff 10=7fff 11=7fff 20=ffffff 21=ffffff 22=ffffff 25=166a00 26=2cfa00 27=44ba00 28=7fff F=81f80000 | =
op 0D:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=0 10=130 11=fffffed0 26=130 27=fffffed0 28=40 F=0 | 10=7fff 11=ffff8000 26=130000 27=ffed0000 28=3e0 63=80c00000
IR2: 9=fffffda0 10=0 11=260 25=fffffda0 27=260 28=1000 F=0 | 9=ffff8000 11=7fff 25=ffda0000 27=260000 28=7c00 63=81400000
IR3: 10=fffffb40 11=0 26=fffffb40 28=0 F=0 | 10=ffff8000 26=ffb40000 63=80800000
RGBC: F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | 9=120 25=120 28=2
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=fffffe84 10=fffffe5e 11=85 25=fffffe84 26=fffffe5e 27=85 28=400 F=0 | 9=ffff8000 10=ffff8000 11=7fff 25=ffe84000 26=ffe5e000 27=85000 28=7c00 63=81c00000
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=0 10=0 11=0 28=0 F=0 | =
op 0E:
zero: F=0 | =
unit: 20=ffffff 21=ffffff F=81f80000 | =
V0: 20=ffffff 21=ffffff F=81f80000 | =
V1: 20=ffffff 21=ffffff F=81f80000 | =
V2: 20=ffffff 21=ffffff F=81f80000 | =
IR0: 20=ffffff 21=ffffff F=81f80000 | =
IR1: 9=7fff 10=7fff 11=ffff8000 20=ffffff 21=ffffff 22=ffff 25=130000 26=7fff000 27=ffed0000 28=3ff F=81f80000 | 27=f8000000
IR2: 10=0 20=ffffff 21=ffffff 28=0 F=81f80000 | =
IR3: 10=ffff8000 11=0 20=ffffff 21=ffffff 26=f8000000 28=0 F=81f80000 | =
RGBC: 20=40ffffff 21=40ffffff 22=40000000 F=81f80000 | =
SXY: 20=ffffff 21=ffffff F=81f80000 | =
SZ: 20=ffffff 21=ffffff F=81f80000 | =
MAC0: 20=ffffff 21=ffffff F=81f80000 | =
TR: F=0 | =
BK: 9=7fff 10=7fff 11=7fff 20=ffffff 21=ffffff 22=ffffff 25=110000 26=220000 27=440000 28=7fff F=81f80000 | =
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=80800000 | 63=80c00000
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=7fff 10=7fff 11=7fff 20=ffffff 21=ffffff 22=ffffff 25=9a600 26=3b600 27=61600 28=7fff F=81f80000 | =
op 15:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=0 28=0 F=0 | =
IR2: 10=0 28=0 F=0 | =
IR3: 11=0 28=0 F=0 | =
RGBC: 9=7ff 10=fff 11=17ff 22=40ffff7f 25=7ff 26=fff 27=17ff 28=7fef F=80000 | 9=7fff 10=7fff 11=7fff 22=40ffffff 25=7fff00 26=fffe00 27=17ffd00 28=7fff 63=81f80000
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | 63=81c00000
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=0 10=0 11=0 28=0 F=0 | =
op 17:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=0 28=0 F=0 | 63=81000000
IR2: 10=0 28=0 F=0 | 63=80800000
IR3: 11=0 28=0 F=0 | 63=400000
RGBC: 20=40000000 21=40000000 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: F=0 | 63=81c00000
FC: F=0 | 63=81c00000
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=0 10=0 11=0 28=0 F=0 | 63=81c00000
Done.
===== 06 SG3 F2 GTE 18 TO 1F | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 800154CE
GTE, one input at a time, lm 0, no other command bits. Cases: zero = every register 0;
unit = RT, LLM, LCM 1000h on the diagonal, the rest 0; V0 (100,200,400), V1 (110,220,440),
V2 (120,240,480), IR0 800, IR1 130, IR2 260, IR3 4C0, RGBC 40302010, SXY0-2 00200010
00400030 00600050, SZ0-3 100 200 300 400, MAC0 12345: each alone with the unit matrices.
TR (100,200,400), BK (110,220,440), FC (120,240,480), OFX A00000 OFY 780000, H 200, DQA
100, DQB 1400000, ZSF3 155, ZSF4 100: each alone, the rest 0. RTxV, LLMxV, LCMxV: that
matrix (800 100 200 / 300 900 400 / 500 600 A00, plus 10h for LLM, 20h for LCM) with V0,
V1, V2 and IR1-3 as above. Each row: sf 1 changes as reg=hex and F=FLAG; after | the
registers where sf 0 differs from sf 1 (63 is FLAG), or = when none.
op 18:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=0 28=0 F=0 | =
IR2: 10=0 28=0 F=0 | =
IR3: 11=0 28=0 F=0 | =
RGBC: 20=40000000 21=40000000 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | 63=81c00000
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=0 10=0 11=0 28=0 F=0 | =
op 19:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=0 28=0 F=0 | =
IR2: 10=0 28=0 F=0 | =
IR3: 11=0 28=0 F=0 | =
RGBC: 21=40000000 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | 63=81c00000
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=0 10=0 11=0 28=0 F=0 | =
op 1D:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=0 28=0 F=0 | =
IR2: 10=0 28=0 F=0 | =
IR3: 11=0 28=0 F=0 | =
RGBC: 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=0 10=0 11=0 28=0 F=0 | =
op 1F:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=0 28=0 F=0 | =
IR2: 10=0 28=0 F=0 | =
IR3: 11=0 28=0 F=0 | =
RGBC: 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: 9=110 10=220 11=440 22=442211 25=110 26=220 27=440 28=2082 F=0 | 9=7fff 10=7fff 11=7fff 22=ffffff 25=110000 26=220000 27=440000 28=7fff 63=81f80000
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=0 10=0 11=0 28=0 F=0 | =
Done.
===== 07 SG4 F2 GTE 21 TO 23 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 800154CE
GTE, one input at a time, lm 0, no other command bits. Cases: zero = every register 0;
unit = RT, LLM, LCM 1000h on the diagonal, the rest 0; V0 (100,200,400), V1 (110,220,440),
V2 (120,240,480), IR0 800, IR1 130, IR2 260, IR3 4C0, RGBC 40302010, SXY0-2 00200010
00400030 00600050, SZ0-3 100 200 300 400, MAC0 12345: each alone with the unit matrices.
TR (100,200,400), BK (110,220,440), FC (120,240,480), OFX A00000 OFY 780000, H 200, DQA
100, DQB 1400000, ZSF3 155, ZSF4 100: each alone, the rest 0. RTxV, LLMxV, LCMxV: that
matrix (800 100 200 / 300 900 400 / 500 600 A00, plus 10h for LLM, 20h for LCM) with V0,
V1, V2 and IR1-3 as above. Each row: sf 1 changes as reg=hex and F=FLAG; after | the
registers where sf 0 differs from sf 1 (63 is FLAG), or = when none.
op 21:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 22=13 25=130 F=0 | 9=7fff 22=ff 25=130000 28=1f 63=81200000
IR2: 22=2600 26=260 F=0 | 10=7fff 22=ff00 26=260000 28=3e0 63=80900000
IR3: 22=4c0000 27=4c0 F=0 | 11=7fff 22=ff0000 27=4c0000 28=7c00 63=480000
RGBC: 20=40000000 21=40000000 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: 9=110 10=220 11=440 20=442211 21=442211 22=442211 25=110 26=220 27=440 28=2082 F=0 | 9=7fff 10=7fff 11=7fff 20=ffffff 21=ffffff 22=ffffff 25=110000 26=220000 27=440000 28=7fff 63=81f80000
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=166 10=2cf 11=44b 22=442c16 25=166 26=2cf 27=44b 28=20a2 F=0 | 9=7fff 10=7fff 11=7fff 22=ffffff 25=166a00 26=2cfa00 27=44ba00 28=7fff 63=81f80000
op 22:
zero: 20=ff F=0 | 20=0
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 22=13 25=130 F=0 | 9=7fff 20=13 22=ff 25=130000 28=1f 63=81200000
IR2: 20=ff 22=2600 26=260 F=0 | 10=7fff 20=0 22=ff00 26=260000 28=3e0 63=80900000
IR3: 22=4c0000 27=4c0 F=0 | 11=7fff 22=ff0000 27=4c0000 28=7c00 63=480000
RGBC: 20=40000000 21=40000000 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: 9=110 10=220 11=440 20=442200 21=442211 22=442211 25=110 26=220 27=440 28=2082 F=0 | 9=7fff 10=7fff 11=7fff 20=ffff11 21=ffffff 22=ffffff 25=110000 26=220000 27=440000 28=7fff 63=81f80000
FC: 20=ff F=0 | 20=0
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=166 10=2cf 11=44b 22=442c16 25=166 26=2cf 27=44b 28=20a2 F=0 | 9=7fff 10=7fff 11=7fff 20=16 22=ffffff 25=166a00 26=2cfa00 27=44ba00 28=7fff 63=81f80000
op 23:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 22=13 25=130 F=0 | 9=7fff 22=ff 25=130000 28=1f 63=81200000
IR2: 22=2600 26=260 F=0 | 10=7fff 22=ff00 26=260000 28=3e0 63=80900000
IR3: 22=4c0000 27=4c0 F=0 | 11=7fff 22=ff0000 27=4c0000 28=7c00 63=480000
RGBC: 20=40000000 21=40000000 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: 9=110 10=220 11=440 20=440000 21=442211 22=442211 25=110 26=220 27=440 28=2082 F=0 | 9=7fff 10=7fff 11=7fff 20=ff0000 21=ffffff 22=ffffff 25=110000 26=220000 27=440000 28=7fff 63=81f80000
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=166 10=2cf 11=44b 22=442c16 25=166 26=2cf 27=44b 28=20a2 F=0 | 9=7fff 10=7fff 11=7fff 22=ffffff 25=166a00 26=2cfa00 27=44ba00 28=7fff 63=81f80000
Done.
===== 08 SG5 F2 GTE 24 TO 27 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 800154CE
GTE, one input at a time, lm 0, no other command bits. Cases: zero = every register 0;
unit = RT, LLM, LCM 1000h on the diagonal, the rest 0; V0 (100,200,400), V1 (110,220,440),
V2 (120,240,480), IR0 800, IR1 130, IR2 260, IR3 4C0, RGBC 40302010, SXY0-2 00200010
00400030 00600050, SZ0-3 100 200 300 400, MAC0 12345: each alone with the unit matrices.
TR (100,200,400), BK (110,220,440), FC (120,240,480), OFX A00000 OFY 780000, H 200, DQA
100, DQB 1400000, ZSF3 155, ZSF4 100: each alone, the rest 0. RTxV, LLMxV, LCMxV: that
matrix (800 100 200 / 300 900 400 / 500 600 A00, plus 10h for LLM, 20h for LCM) with V0,
V1, V2 and IR1-3 as above. Each row: sf 1 changes as reg=hex and F=FLAG; after | the
registers where sf 0 differs from sf 1 (63 is FLAG), or = when none.
op 24:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 22=13 25=130 F=0 | 9=7fff 22=ff 25=130000 28=1f 63=81200000
IR2: 22=2600 26=260 F=0 | 10=7fff 22=ff00 26=260000 28=3e0 63=80900000
IR3: 22=4c0000 27=4c0 F=0 | 11=7fff 22=ff0000 27=4c0000 28=7c00 63=480000
RGBC: 21=40000000 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: 9=110 10=220 11=440 21=442211 22=442211 25=110 26=220 27=440 28=2082 F=0 | 9=7fff 10=7fff 11=7fff 21=ffffff 22=ffffff 25=110000 26=220000 27=440000 28=7fff 63=81f80000
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=166 10=2cf 11=44b 22=442c16 25=166 26=2cf 27=44b 28=20a2 F=0 | 9=7fff 10=7fff 11=7fff 22=ffffff 25=166a00 26=2cfa00 27=44ba00 28=7fff 63=81f80000
op 25:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 22=13 25=130 F=0 | 9=7fff 22=ff 25=130000 28=1f 63=81200000
IR2: 22=2600 26=260 F=0 | 10=7fff 22=ff00 26=260000 28=3e0 63=80900000
IR3: 22=4c0000 27=4c0 F=0 | 11=7fff 22=ff0000 27=4c0000 28=7c00 63=480000
RGBC: 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: 9=110 10=220 11=440 22=442211 25=110 26=220 27=440 28=2082 F=0 | 9=7fff 10=7fff 11=7fff 22=ffffff 25=110000 26=220000 27=440000 28=7fff 63=81f80000
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=166 10=2cf 11=44b 22=442c16 25=166 26=2cf 27=44b 28=20a2 F=0 | 9=7fff 10=7fff 11=7fff 22=ffffff 25=166a00 26=2cfa00 27=44ba00 28=7fff 63=81f80000
op 26:
zero: 22=ff F=0 | =
unit: 22=ff F=0 | =
V0: 22=ff F=0 | =
V1: 22=ff F=0 | =
V2: 22=ff F=0 | =
IR0: 22=ff F=0 | =
IR1: 22=ff F=0 | =
IR2: 22=26ff 26=260 F=0 | 10=7fff 22=ffff 26=260000 28=3e0 63=80900000
IR3: 22=4c00ff 27=4c0 F=0 | 11=7fff 22=ff00ff 27=4c0000 28=7c00 63=480000
RGBC: 22=400000ff F=0 | =
SXY: 22=ff F=0 | =
SZ: 22=ff F=0 | =
MAC0: 22=ff F=0 | =
TR: 22=ff F=0 | =
BK: 10=220 11=440 22=4422ff 26=220 27=440 28=2080 F=0 | 10=7fff 11=7fff 22=ffffff 26=220000 27=440000 28=7fe0 63=80d80000
FC: 22=ff F=0 | =
OF: 22=ff F=0 | =
H: 22=ff F=0 | =
DQA: 22=ff F=0 | =
DQB: 22=ff F=0 | =
ZSF3: 22=ff F=0 | =
ZSF4: 22=ff F=0 | =
RTxV: 10=0 11=0 22=ff 28=2 F=0 | =
LLMxV: 10=0 11=0 22=ff 28=2 F=0 | =
LCMxV: 10=2cf 11=44b 22=442cff 26=2cf 27=44b 28=20a2 F=0 | 10=7fff 11=7fff 22=ffffff 26=2cfa00 27=44ba00 28=7fe2 63=80d80000
op 27:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: F=0 | =
IR2: F=0 | =
IR3: 22=4c0000 27=4c0 F=0 | 11=7fff 22=ff0000 27=4c0000 28=7c00 63=480000
RGBC: 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: 11=440 22=440000 27=440 28=2000 F=0 | 11=7fff 22=ff0000 27=440000 28=7c00 63=480000
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 11=0 28=82 F=0 | =
LLMxV: 11=0 28=82 F=0 | =
LCMxV: 11=44b 22=440000 27=44b 28=2082 F=0 | 11=7fff 22=ff0000 27=44ba00 28=7c82 63=480000
Done.
===== 09 SG6 F2 GTE 2B TO 34 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 800154CE
GTE, one input at a time, lm 0, no other command bits. Cases: zero = every register 0;
unit = RT, LLM, LCM 1000h on the diagonal, the rest 0; V0 (100,200,400), V1 (110,220,440),
V2 (120,240,480), IR0 800, IR1 130, IR2 260, IR3 4C0, RGBC 40302010, SXY0-2 00200010
00400030 00600050, SZ0-3 100 200 300 400, MAC0 12345: each alone with the unit matrices.
TR (100,200,400), BK (110,220,440), FC (120,240,480), OFX A00000 OFY 780000, H 200, DQA
100, DQB 1400000, ZSF3 155, ZSF4 100: each alone, the rest 0. RTxV, LLMxV, LCMxV: that
matrix (800 100 200 / 300 900 400 / 500 600 A00, plus 10h for LLM, 20h for LCM) with V0,
V1, V2 and IR1-3 as above. Each row: sf 1 changes as reg=hex and F=FLAG; after | the
registers where sf 0 differs from sf 1 (63 is FLAG), or = when none.
op 2B:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=0 28=0 F=0 | =
IR2: 10=0 28=0 F=0 | =
IR3: 11=0 28=0 F=0 | =
RGBC: 21=40000000 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | 63=81c00000
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=0 10=0 11=0 28=0 F=0 | =
op 2C:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=0 28=0 F=0 | =
IR2: 10=0 28=0 F=0 | =
IR3: 11=0 28=0 F=0 | =
RGBC: 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | 63=81c00000
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=0 10=0 11=0 28=0 F=0 | =
op 2F:
zero: F=80020000 | =
unit: F=80020000 | =
V0: 9=7fff 10=7fff 11=7fff 19=400 25=100000 26=200000 27=400000 28=7fff F=81800000 | =
V1: F=80020000 | =
V2: F=80020000 | =
IR0: 8=0 F=80020000 | =
IR1: 9=0 28=0 F=80020000 | =
IR2: 10=0 28=0 F=80020000 | =
IR3: 11=0 28=0 F=80020000 | =
RGBC: F=80020000 | =
SXY: 12=400030 13=600050 14=0 F=80020000 | =
SZ: 16=200 17=300 18=400 19=0 F=80020000 | =
MAC0: 24=0 F=80020000 | =
TR: 9=7fff 10=7fff 11=7fff 19=400 25=100000 26=200000 27=400000 28=7fff F=81800000 | =
BK: F=80020000 | =
FC: F=80020000 | =
OF: 14=7800a0 F=80020000 | =
H: F=80020000 | =
DQA: 8=1000 24=1ffff00 F=80021000 | =
DQB: 8=1000 24=1400000 F=80021000 | =
ZSF3: F=80020000 | =
ZSF4: F=80020000 | =
RTxV: 9=7fff 10=7fff 11=7fff 19=390 25=120000 26=250000 27=390000 28=7fff F=81800000 | =
LLMxV: 9=0 10=0 11=0 28=0 F=80020000 | =
LCMxV: 9=0 10=0 11=0 28=0 F=80020000 | =
op 34:
zero: F=80020000 | =
unit: F=80020000 | =
V0: F=80020000 | =
V1: 13=3ff021f F=80022000 | 13=3ff03ff 63=81836000
V2: 9=120 10=240 11=480 19=480 25=120 26=240 27=480 28=2482 F=80020000 | 9=7fff 10=7fff 11=7fff 25=120000 26=240000 27=480000 28=7fff 63=81820000
IR0: 8=0 F=80020000 | =
IR1: 9=0 28=0 F=80020000 | =
IR2: 10=0 28=0 F=80020000 | =
IR3: 11=0 28=0 F=80020000 | =
RGBC: F=80020000 | =
SXY: 12=0 13=0 14=0 F=80020000 | =
SZ: 16=300 17=400 18=0 19=0 F=80020000 | =
MAC0: 24=0 F=80020000 | =
TR: 9=100 10=200 11=400 13=3ff01ff 19=400 25=100 26=200 27=400 28=2082 F=80020000 | 9=7fff 10=7fff 11=7fff 13=3ff03ff 25=100000 26=200000 27=400000 28=7fff 63=81836000
BK: F=80020000 | =
FC: F=80020000 | =
OF: 12=7800a0 13=7800a0 14=7800a0 F=80020000 | =
H: F=80020000 | =
DQA: 8=1000 24=1ffff00 F=80021000 | =
DQB: 8=1000 24=1400000 F=80021000 | =
ZSF3: F=80020000 | =
ZSF4: F=80020000 | =
RTxV: 9=144 10=29a 11=402 13=3ff0263 19=402 25=144 26=29a 27=402 28=20a2 F=80022000 | 9=7fff 10=7fff 11=7fff 13=3ff03ff 25=144000 26=29a000 27=402000 28=7fff 63=81836000
LLMxV: 9=0 10=0 11=0 28=0 F=80020000 | =
LCMxV: 9=0 10=0 11=0 28=0 F=80020000 | =
Done.
===== 10 SG7 F2 GTE 35 TO 37 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 800154CE
GTE, one input at a time, lm 0, no other command bits. Cases: zero = every register 0;
unit = RT, LLM, LCM 1000h on the diagonal, the rest 0; V0 (100,200,400), V1 (110,220,440),
V2 (120,240,480), IR0 800, IR1 130, IR2 260, IR3 4C0, RGBC 40302010, SXY0-2 00200010
00400030 00600050, SZ0-3 100 200 300 400, MAC0 12345: each alone with the unit matrices.
TR (100,200,400), BK (110,220,440), FC (120,240,480), OFX A00000 OFY 780000, H 200, DQA
100, DQB 1400000, ZSF3 155, ZSF4 100: each alone, the rest 0. RTxV, LLMxV, LCMxV: that
matrix (800 100 200 / 300 900 400 / 500 600 A00, plus 10h for LLM, 20h for LCM) with V0,
V1, V2 and IR1-3 as above. Each row: sf 1 changes as reg=hex and F=FLAG; after | the
registers where sf 0 differs from sf 1 (63 is FLAG), or = when none.
op 35:
zero: F=80020000 | =
unit: F=80020000 | =
V0: F=80020000 | =
V1: 13=3ff021f 19=220 F=80022000 | 13=3ff03ff 63=81836000
V2: 9=120 10=240 14=3ff023f 25=120 26=240 28=82 F=80022000 | 9=7fff 10=7fff 14=3ff03ff 25=120000 26=240000 28=3ff 63=81836000
IR0: 8=0 F=80020000 | =
IR1: 9=0 28=0 F=80020000 | =
IR2: 10=0 28=0 F=80020000 | =
IR3: F=80020000 | =
RGBC: F=80020000 | =
SXY: 12=0 13=0 14=0 F=80020000 | =
SZ: 16=300 17=400 18=0 19=0 F=80020000 | =
MAC0: 24=0 F=80020000 | =
TR: 9=100 10=200 13=3ff01ff 14=3ff01ff 25=100 26=200 28=82 F=80020000 | 9=7fff 10=7fff 13=3ff03ff 14=3ff03ff 25=100000 26=200000 28=3ff 63=81836000
BK: F=80020000 | =
FC: F=80020000 | =
OF: 12=7800a0 13=7800a0 14=7800a0 F=80020000 | =
H: F=80020000 | =
DQA: 8=1000 24=1ffff00 F=80021000 | =
DQB: 8=1000 24=1400000 F=80021000 | =
ZSF3: F=80020000 | =
ZSF4: F=80020000 | =
RTxV: 9=144 10=29a 13=3ff0263 19=110 25=144 26=29a 28=24a2 F=80022000 | 9=7fff 10=7fff 13=3ff03ff 25=144000 26=29a000 28=27ff 63=81836000
LLMxV: 9=0 10=0 28=2400 F=80020000 | =
LCMxV: 9=0 10=0 28=2400 F=80020000 | =
op 36:
zero: F=80020000 | =
unit: F=80020000 | =
V0: F=80020000 | =
V1: 13=3ff0000 F=80022000 | 63=80832000
V2: 9=120 10=240 14=3ff023f 25=120 26=240 28=82 F=80022000 | 9=7fff 10=7fff 14=3ff03ff 25=120000 26=240000 28=3ff 63=81836000
IR0: 8=0 F=80020000 | =
IR1: 9=0 28=0 F=80020000 | =
IR2: 10=0 28=0 F=80020000 | =
IR3: F=80020000 | =
RGBC: F=80020000 | =
SXY: 12=0 13=0 14=0 F=80020000 | =
SZ: 16=200 17=300 18=400 19=0 F=80020000 | =
MAC0: 24=0 F=80020000 | =
TR: 9=100 10=200 13=3ff0000 14=3ff01ff 25=100 26=200 28=82 F=80020000 | 9=7fff 10=7fff 14=3ff03ff 25=100000 26=200000 28=3ff 63=81836000
BK: F=80020000 | =
FC: F=80020000 | =
OF: 12=7800a0 13=7800a0 14=7800a0 F=80020000 | =
H: F=80020000 | =
DQA: 8=1000 24=1ffff00 F=80021000 | =
DQB: 8=1000 24=1400000 F=80021000 | =
ZSF3: F=80020000 | =
ZSF4: F=80020000 | =
RTxV: 9=144 10=29a 13=3ff0000 14=3ff0287 25=144 26=29a 28=24a2 F=80022000 | 9=7fff 10=7fff 14=3ff03ff 25=144000 26=29a000 28=27ff 63=81836000
LLMxV: 9=0 10=0 28=2400 F=80020000 | =
LCMxV: 9=0 10=0 28=2400 F=80020000 | =
op 37:
zero: F=80020000 | =
unit: F=80020000 | =
V0: F=80020000 | =
V1: 13=3ff0000 F=80022000 | 63=80832000
V2: 10=240 14=3ff0000 26=240 28=80 F=80022000 | 10=7fff 26=240000 28=3e0 63=80832000
IR0: 8=0 F=80020000 | =
IR1: 14=25f F=80020000 | =
IR2: 10=0 28=0 F=80020000 | =
IR3: F=80020000 | =
RGBC: F=80020000 | =
SXY: 12=0 13=0 14=0 F=80020000 | =
SZ: 16=200 17=300 18=400 19=0 F=80020000 | =
MAC0: 24=0 F=80020000 | =
TR: 10=200 13=3ff0000 14=3ff0000 26=200 28=80 F=80020000 | 10=7fff 26=200000 28=3e0 63=80832000
BK: F=80020000 | =
FC: F=80020000 | =
OF: 12=7800a0 13=7800a0 14=7800a0 F=80020000 | =
H: F=80020000 | =
DQA: 8=1000 24=1ffff00 F=80021000 | =
DQB: 8=1000 24=1400000 F=80021000 | =
ZSF3: F=80020000 | =
ZSF4: F=80020000 | =
RTxV: 10=29a 13=3ff0000 14=3ff025f 26=29a 28=24a2 F=80022000 | 10=7fff 26=29a000 28=27e2 63=80832000
LLMxV: 10=0 14=25f 28=2402 F=80020000 | =
LCMxV: 10=0 14=25f 28=2402 F=80020000 | =
Done.
===== 11 SG8 F2 GTE 38 TO 3B | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 800154CE
GTE, one input at a time, lm 0, no other command bits. Cases: zero = every register 0;
unit = RT, LLM, LCM 1000h on the diagonal, the rest 0; V0 (100,200,400), V1 (110,220,440),
V2 (120,240,480), IR0 800, IR1 130, IR2 260, IR3 4C0, RGBC 40302010, SXY0-2 00200010
00400030 00600050, SZ0-3 100 200 300 400, MAC0 12345: each alone with the unit matrices.
TR (100,200,400), BK (110,220,440), FC (120,240,480), OFX A00000 OFY 780000, H 200, DQA
100, DQB 1400000, ZSF3 155, ZSF4 100: each alone, the rest 0. RTxV, LLMxV, LCMxV: that
matrix (800 100 200 / 300 900 400 / 500 600 A00, plus 10h for LLM, 20h for LCM) with V0,
V1, V2 and IR1-3 as above. Each row: sf 1 changes as reg=hex and F=FLAG; after | the
registers where sf 0 differs from sf 1 (63 is FLAG), or = when none.
op 38:
zero: F=80020000 | =
unit: F=80020000 | =
V0: F=80020000 | =
V1: F=80020000 | =
V2: 10=240 14=3ff0000 26=240 28=80 F=80022000 | 10=7fff 26=240000 28=3e0 63=80832000
IR0: 8=0 F=80020000 | =
IR1: 14=25f F=80020000 | =
IR2: 10=0 28=0 F=80020000 | =
IR3: F=80020000 | =
RGBC: F=80020000 | =
SXY: 12=0 13=0 14=0 F=80020000 | =
SZ: 16=200 17=300 18=400 19=0 F=80020000 | =
MAC0: 24=0 F=80020000 | =
TR: 10=200 14=3ff0000 26=200 28=80 F=80020000 | 10=7fff 26=200000 28=3e0 63=80832000
BK: F=80020000 | =
FC: F=80020000 | =
OF: 12=7800a0 13=7800a0 14=7800a0 F=80020000 | =
H: F=80020000 | =
DQA: 8=1000 24=1ffff00 F=80021000 | =
DQB: 8=1000 24=1400000 F=80021000 | =
ZSF3: F=80020000 | =
ZSF4: F=80020000 | =
RTxV: 10=29a 14=3ff025f 26=29a 28=24a2 F=80022000 | 10=7fff 26=29a000 28=27e2 63=80832000
LLMxV: 10=0 14=25f 28=2402 F=80020000 | =
LCMxV: 10=0 14=25f 28=2402 F=80020000 | =
op 39:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: 8=0 F=0 | =
IR1: 14=25f F=0 | =
IR2: 14=3ff0000 F=80002000 | =
IR3: F=0 | =
RGBC: F=0 | =
SXY: 12=0 13=0 14=0 F=0 | =
SZ: 16=200 17=300 18=400 19=0 F=0 | =
MAC0: 24=0 F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: 8=1000 24=1ffff00 F=1000 | =
DQB: 8=1000 24=1400000 F=1000 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 14=3ff025f F=80002000 | =
LLMxV: 14=3ff025f F=80002000 | =
LCMxV: 14=3ff025f F=80002000 | =
op 3A:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: 8=0 F=0 | =
IR1: 14=25f F=0 | =
IR2: 14=3ff0000 F=80002000 | =
IR3: F=0 | =
RGBC: F=0 | =
SXY: 12=600050 13=0 14=0 F=0 | =
SZ: 16=200 17=300 18=400 19=0 F=0 | =
MAC0: 24=0 F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: 8=1000 24=1ffff00 F=1000 | =
DQB: 8=1000 24=1400000 F=1000 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 14=3ff025f F=80002000 | =
LLMxV: 14=3ff025f F=80002000 | =
LCMxV: 14=3ff025f F=80002000 | =
op 3B:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: 8=0 F=0 | =
IR1: 14=25f F=0 | =
IR2: 14=3ff0000 F=80002000 | =
IR3: F=0 | =
RGBC: F=0 | =
SXY: 12=400030 13=600050 14=0 F=0 | =
SZ: F=0 | =
MAC0: 24=0 F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: 8=1000 24=1ffff00 F=1000 | =
DQB: 8=1000 24=1400000 F=1000 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 14=3ff025f F=80002000 | =
LLMxV: 14=3ff025f F=80002000 | =
LCMxV: 14=3ff025f F=80002000 | =
Done.
===== 12 SMS F2 MDEC SHORT | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 800154CE
Short decodes by CPU at 8 bit (depth 1), unsigned, the 4bit/8bit block's tables
(kBlkQuant, kBlkScale). Pattern words: FE00h end code over a DC halfword, q_scale 1;
A has DC 16*i-256 in word i (i = 0 to 31), B has DC 240-16*i. At most 256 words shown.
No pattern (the tables were the last words in), then count 1, 1 words written: 80 words out, CRC A589EA50, status 8204FFFF
A8B7C2C8 787E8998 9AA8B4BA 6A707B8A 85949FA5 555B6675 77859197 474D5867
77859197 474D5867 85949FA5 555B6675 9AA8B4BA 6A707B8A A8B7C2C8 787E8998
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
Pattern A first (count 32: 512 words out, CRC CF32359C), then count 1, 1 words written: 496 words out, CRC 3410B6D8, status 8204FFFF
32414C52 02081422 69788389 393F4A59 B6C5D0D6 868C97A6 ECFBFFFF BCC2CEDC
ECFBFFFF BCC2CEDC B6C5D0D6 868C97A6 69788389 393F4A59 32414C52 02081422
48484848 48484848 48484848 48484848 48484848 48484848 48484848 48484848
48484848 48484848 48484848 48484848 48484848 48484848 48484848 48484848
4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C
4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C
50505050 50505050 50505050 50505050 50505050 50505050 50505050 50505050
50505050 50505050 50505050 50505050 50505050 50505050 50505050 50505050
54545454 54545454 54545454 54545454 54545454 54545454 54545454 54545454
54545454 54545454 54545454 54545454 54545454 54545454 54545454 54545454
58585858 58585858 58585858 58585858 58585858 58585858 58585858 58585858
58585858 58585858 58585858 58585858 58585858 58585858 58585858 58585858
5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C
5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C
60606060 60606060 60606060 60606060 60606060 60606060 60606060 60606060
60606060 60606060 60606060 60606060 60606060 60606060 60606060 60606060
64646464 64646464 64646464 64646464 64646464 64646464 64646464 64646464
64646464 64646464 64646464 64646464 64646464 64646464 64646464 64646464
68686868 68686868 68686868 68686868 68686868 68686868 68686868 68686868
68686868 68686868 68686868 68686868 68686868 68686868 68686868 68686868
6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C
6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C
70707070 70707070 70707070 70707070 70707070 70707070 70707070 70707070
70707070 70707070 70707070 70707070 70707070 70707070 70707070 70707070
74747474 74747474 74747474 74747474 74747474 74747474 74747474 74747474
74747474 74747474 74747474 74747474 74747474 74747474 74747474 74747474
78787878 78787878 78787878 78787878 78787878 78787878 78787878 78787878
78787878 78787878 78787878 78787878 78787878 78787878 78787878 78787878
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
Pattern B first (count 32: 512 words out, CRC BF7813E8), then count 1, 1 words written: 496 words out, CRC A468B6F1, status 8204FFFF
E6F5FFFF B6BCC7D6 B3C2CDD3 838995A3 6B7A858C 3B414D5B 39475359 080F1A29
39475359 080F1A29 6B7A858C 3B414D5B B3C2CDD3 838995A3 E6F5FFFF B6BCC7D6
B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4
B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4
B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0
B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0
ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC
ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC
A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8
A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8
A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4
A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C
9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C
98989898 98989898 98989898 98989898 98989898 98989898 98989898 98989898
98989898 98989898 98989898 98989898 98989898 98989898 98989898 98989898
94949494 94949494 94949494 94949494 94949494 94949494 94949494 94949494
94949494 94949494 94949494 94949494 94949494 94949494 94949494 94949494
90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090
90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090
8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C
8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C
88888888 88888888 88888888 88888888 88888888 88888888 88888888 88888888
88888888 88888888 88888888 88888888 88888888 88888888 88888888 88888888
84848484 84848484 84848484 84848484 84848484 84848484 84848484 84848484
84848484 84848484 84848484 84848484 84848484 84848484 84848484 84848484
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
No pattern (the tables were the last words in), then count 2, 2 words written: 480 words out, CRC CA80C555, status 8204FFFF
5694E2FF C79E6746 65A3F1FF D6AD7555 75B3FFFF E6BD8665 76B4FFFF E7BE8766
5C9AE8FF CDA46C4C 2B69B7EC 9C733C1B 003482B7 673E0600 00115F94 441B0000
B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0
B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0
ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC
ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC
A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8
A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8
A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4
A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C
9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C
98989898 98989898 98989898 98989898 98989898 98989898 98989898 98989898
98989898 98989898 98989898 98989898 98989898 98989898 98989898 98989898
94949494 94949494 94949494 94949494 94949494 94949494 94949494 94949494
94949494 94949494 94949494 94949494 94949494 94949494 94949494 94949494
90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090
90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090
8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C
8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C
88888888 88888888 88888888 88888888 88888888 88888888 88888888 88888888
88888888 88888888 88888888 88888888 88888888 88888888 88888888 88888888
84848484 84848484 84848484 84848484 84848484 84848484 84848484 84848484
84848484 84848484 84848484 84848484 84848484 84848484 84848484 84848484
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
78787878 78787878 78787878 78787878 78787878 78787878 78787878 78787878
78787878 78787878 78787878 78787878 78787878 78787878 78787878 78787878
Pattern A first (count 32: 512 words out, CRC CF32359C), then count 2, 2 words written: 480 words out, CRC 5D6A404E, status 8204FFFF
FDD99D70 2059ACEE FFE8AB7F 2E67BBFC FFF9BC8F 3F78CBFF FFF9BD90 4079CCFF
FFDFA376 265FB2F3 D3AF7245 002E81C3 9D793C10 00004C8D 7B561A00 0000296B
4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C
4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C
50505050 50505050 50505050 50505050 50505050 50505050 50505050 50505050
50505050 50505050 50505050 50505050 50505050 50505050 50505050 50505050
54545454 54545454 54545454 54545454 54545454 54545454 54545454 54545454
54545454 54545454 54545454 54545454 54545454 54545454 54545454 54545454
58585858 58585858 58585858 58585858 58585858 58585858 58585858 58585858
58585858 58585858 58585858 58585858 58585858 58585858 58585858 58585858
5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C
5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C
60606060 60606060 60606060 60606060 60606060 60606060 60606060 60606060
60606060 60606060 60606060 60606060 60606060 60606060 60606060 60606060
64646464 64646464 64646464 64646464 64646464 64646464 64646464 64646464
64646464 64646464 64646464 64646464 64646464 64646464 64646464 64646464
68686868 68686868 68686868 68686868 68686868 68686868 68686868 68686868
68686868 68686868 68686868 68686868 68686868 68686868 68686868 68686868
6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C
6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C
70707070 70707070 70707070 70707070 70707070 70707070 70707070 70707070
70707070 70707070 70707070 70707070 70707070 70707070 70707070 70707070
74747474 74747474 74747474 74747474 74747474 74747474 74747474 74747474
74747474 74747474 74747474 74747474 74747474 74747474 74747474 74747474
78787878 78787878 78787878 78787878 78787878 78787878 78787878 78787878
78787878 78787878 78787878 78787878 78787878 78787878 78787878 78787878
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
84848484 84848484 84848484 84848484 84848484 84848484 84848484 84848484
84848484 84848484 84848484 84848484 84848484 84848484 84848484 84848484
Pattern B first (count 32: 512 words out, CRC BF7813E8), then count 2, 2 words written: 480 words out, CRC CA80C555, status 8204FFFF
5694E2FF C79E6746 65A3F1FF D6AD7555 75B3FFFF E6BD8665 76B4FFFF E7BE8766
5C9AE8FF CDA46C4C 2B69B7EC 9C733C1B 003482B7 673E0600 00115F94 441B0000
B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0
B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0
ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC
ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC
A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8
A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8
A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4
A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C
9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C
98989898 98989898 98989898 98989898 98989898 98989898 98989898 98989898
98989898 98989898 98989898 98989898 98989898 98989898 98989898 98989898
94949494 94949494 94949494 94949494 94949494 94949494 94949494 94949494
94949494 94949494 94949494 94949494 94949494 94949494 94949494 94949494
90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090
90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090
8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C
8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C
88888888 88888888 88888888 88888888 88888888 88888888 88888888 88888888
88888888 88888888 88888888 88888888 88888888 88888888 88888888 88888888
84848484 84848484 84848484 84848484 84848484 84848484 84848484 84848484
84848484 84848484 84848484 84848484 84848484 84848484 84848484 84848484
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
78787878 78787878 78787878 78787878 78787878 78787878 78787878 78787878
78787878 78787878 78787878 78787878 78787878 78787878 78787878 78787878
Done.
===== 13 SSD F2 SPU DRAIN | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 800154CE
SPU write FIFO drain to scratch at 30000h (32 halfwords filled EEEEh first), SPUCNT
transfer mode Stop after the wait, then all 32 read back by DMA. Pattern B000h + i.
By DMA, 16 words in one block; the wait counted from the DMA's end:
DMA, wait 0: 9 written, 0 EEEEh, 0 5555h, 23 other (first 1111) wwwwwwwww???????????????????????
DMA, wait 50: 10 written, 0 EEEEh, 0 5555h, 22 other (first 0005) wwwwwwwwww??????????????????????
DMA, wait 100: 10 written, 0 EEEEh, 0 5555h, 22 other (first 0005) wwwwwwwwww??????????????????????
DMA, wait 150: 10 written, 0 EEEEh, 0 5555h, 22 other (first 0005) wwwwwwwwww??????????????????????
DMA, wait 200: 10 written, 0 EEEEh, 0 5555h, 22 other (first 0005) wwwwwwwwww??????????????????????
DMA, wait 250: 11 written, 0 EEEEh, 0 5555h, 21 other (first 1111) wwwwwwwwwww?????????????????????
DMA, wait 300: 14 written, 0 EEEEh, 0 5555h, 18 other (first 0007) wwwwwwwwwwwwww??????????????????
DMA, wait 350: 16 written, 0 EEEEh, 0 5555h, 16 other (first 0008) wwwwwwwwwwwwwwww????????????????
DMA, wait 400: 18 written, 0 EEEEh, 0 5555h, 14 other (first 0009) wwwwwwwwwwwwwwwwww??????????????
DMA, wait 450: 20 written, 0 EEEEh, 0 5555h, 12 other (first 000A) wwwwwwwwwwwwwwwwwwww????????????
DMA, wait 500: 22 written, 0 EEEEh, 0 5555h, 10 other (first 000B) wwwwwwwwwwwwwwwwwwwwww??????????
DMA, wait 550: 25 written, 0 EEEEh, 0 5555h, 7 other (first 1111) wwwwwwwwwwwwwwwwwwwwwwwww???????
DMA, wait 600: 26 written, 0 EEEEh, 0 5555h, 6 other (first 000D) wwwwwwwwwwwwwwwwwwwwwwwwww??????
DMA, wait 650: 29 written, 0 EEEEh, 0 5555h, 3 other (first 1111) wwwwwwwwwwwwwwwwwwwwwwwwwwwww???
DMA, wait 700: 30 written, 0 EEEEh, 0 5555h, 2 other (first 000F) wwwwwwwwwwwwwwwwwwwwwwwwwwwwww??
DMA, wait 750: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
DMA, wait 800: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
DMA, wait 850: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
DMA, wait 900: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
By hand, 16 halfwords (B000h-B00Fh) to the FIFO, then Manual Write; the wait counted
from the SPUCNT store:
manual, wait 0: 0 written, 0 EEEEh, 0 5555h, 32 other (first B002) ????????????????????????????????
manual, wait 50: 0 written, 0 EEEEh, 0 5555h, 32 other (first B002) ????????????????????????????????
manual, wait 100: 0 written, 0 EEEEh, 0 5555h, 32 other (first B002) ????????????????????????????????
manual, wait 150: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 200: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 250: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 300: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 350: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 400: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 450: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 500: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 550: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 600: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 650: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 700: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 750: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 800: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 850: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 900: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
SPUSTAT after the Manual Write store, status@timer 2:
0000@53 0000@86 0000@119 0000@152 0000@185 0000@218 0410@251 0410@284
0410@317 0410@350 0410@383 0410@416 0410@449 0410@482 0410@515 0410@548
0410@581 0410@614 0410@647 0410@680 0410@713 0410@746 0410@779 0410@814
manual, wait 3000: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
Done.
===== 14 SMR F2 MDEC RESET | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 800154CE
MDEC reset. Each row starts from a 15 bit decode with the input full (status read just
before, shown once), writes timer 2's mode, MDEC1 80000000h, then N nops, then reads
MDEC1 and timer 2. Run twice from the same state: cold, then warm. status@timer 2.
Status before the reset: E60400DF
0 nops: cold E6040040@13, warm E6040040@6
10 nops: cold 80040000@29, warm 80040000@14
20 nops: cold 80040000@55, warm 80040000@24
30 nops: cold 80040000@78, warm 80040000@34
40 nops: cold 80040000@106, warm 80040000@44
50 nops: cold 80040000@123, warm 80040000@54
60 nops: cold 80040000@149, warm 80040000@64
70 nops: cold 80040000@169, warm 80040000@74
80 nops: cold 80040000@192, warm 80040000@84
90 nops: cold 80040000@214, warm 80040000@159
100 nops: cold 80040000@236, warm 80040000@104
110 nops: cold 80040000@258, warm 80040000@178
120 nops: cold 80040000@284, warm 80040000@134
130 nops: cold 80040000@303, warm 80040000@134
140 nops: cold 80040000@331, warm 80040000@144
150 nops: cold 80040000@352, warm 80040000@154
160 nops: cold 80040000@374, warm 80040000@201
170 nops: cold 80040000@393, warm 80040000@209
180 nops: cold 80040000@422, warm 80040000@228
190 nops: cold 80040000@438, warm 80040000@194
200 nops: cold 80040000@468, warm 80040000@204
Enables after a reset. From idle (a reset 2000 cycles before): MDEC1 80000000h, N nops,
MDEC1 60000000h, then MDEC1 and timer 2 read at once (status@timer 2); the status again
2000 cycles on; MDEC0 40000000h (luminance quant table) and the status; its 16 words by
DMA0 (cycles, or timeout after 200000 polls) and the status after. Run cold, then warm.
Enables rows, each with a DMA0 that times out if the enables were lost: not run in this table.
Done.
===== 15 SDS F2 DMA SPU COST | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 800154CE
DMA4 SPU write, SyncMode 1, to 30000h, delay register 1F801014h = 200931E1h (it was
200931E1). Cycles from the CHCR write until bit 24 clears, three times each.
Blocks of 1 words x 256 (256 words): 16396 16345 16348
Blocks of 2 words x 128 (256 words): 16293 16268 16298
Blocks of 3 words x 85 (255 words): 17625 17171 16204
Blocks of 4 words x 64 (256 words): 18048 18072 18072
Blocks of 5 words x 51 (255 words): 17596 17562 17576
Blocks of 6 words x 42 (252 words): 17022 17014 17014
Blocks of 8 words x 32 (256 words): 17043 17043 17043
Blocks of 12 words x 21 (252 words): 15829 15828 15828
Blocks of 16 words x 16 (256 words): 16873 16850 16849
Blocks of 24 words x 10 (240 words): 10411 10394 10394
Blocks of 31 words x 8 (248 words): 8103 8158 8117
Blocks of 32 words x 8 (256 words): 8169 8135 8162
SyncMode 0, which the CPU cannot poll during: not run in this table.
Done.
28 September 2026
===== 00 RUN | BIOS 19951204 System ROM Version 3.0 11/18/96 A
15 tests
A chain program, linked at 80010000
Saved on the card in slot 2, from image 1
COP0 at start: BPC 00000000 BDA 80024F50 TAR BFC02BAC DCIC 00000000 BadVaddr 800154CE BDAM FFFFFFFF
BPCM 00000000 SR 40000000 Cause 00000020 EPC 801132F8 PRId 00000002
===== 01 SDI F2 DICR POLL | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 800154CE
DICR written with timer 2 zeroed just before it. Interrupts off (SR IEc 0) throughout.
DICR 0 is the scale: its loop runs all 300 turns, so timer 2 over 300 gives one turn.
I_STAT bit 3, a loop of one I_STAT load a turn (lw, addiu, andi, sltiu, sltu, and, bnez, nop):
DICR 00000000: the bit never set in 300 turns; timer 2 after them 3622
DICR 00008000: the bit was set on turn 2; timer 2 after the loop 24
DICR 00008000: the bit was set on turn 2; timer 2 after the loop 24
DICR 00008000: the bit was set on turn 2; timer 2 after the loop 24
I_STAT bit 3, eight I_STAT loads back to back:
DICR 00000000: I_STAT bit 3 after each of the 8 loads: 0 0 0 0 0 0 0 0; timer 2 after them 53
DICR 00008000: I_STAT bit 3 after each of the 8 loads: 0 0 1 1 1 1 1 1; timer 2 after them 32
DICR 00008000: I_STAT bit 3 after each of the 8 loads: 0 0 1 1 1 1 1 1; timer 2 after them 32
DICR 00008000: I_STAT bit 3 after each of the 8 loads: 0 0 1 1 1 1 1 1; timer 2 after them 32
CAUSE.IP2, a loop of one mfc0 CAUSE a turn (the same loop), I_MASK 00000008:
DICR 00000000: the bit never set in 300 turns; timer 2 after them 2420
DICR 00008000: the bit was set on turn 2; timer 2 after the loop 16
DICR 00008000: the bit was set on turn 2; timer 2 after the loop 16
DICR 00008000: the bit was set on turn 2; timer 2 after the loop 16
CAUSE.IP2, eight mfc0 CAUSE back to back, I_MASK 00000008:
DICR 00000000: CAUSE.IP2 after each of the 8 loads: 0 0 0 0 0 0 0 0; timer 2 after them 25
DICR 00008000: CAUSE.IP2 after each of the 8 loads: 0 0 0 0 0 0 0 1; timer 2 after them 8
DICR 00008000: CAUSE.IP2 after each of the 8 loads: 0 0 0 0 0 0 0 1; timer 2 after them 8
DICR 00008000: CAUSE.IP2 after each of the 8 loads: 0 0 0 0 0 0 0 1; timer 2 after them 8
DICR was 00000000 and is back to 0, then its enables.
Done.
===== 02 SIM F2 IMASK UPPER | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 800154CE
I_MASK's upper half. Each row stores to I_MASK and loads it back; the value is
12345678h unless the row says otherwise. Interrupts off. The RAM word is 5AA5C33Ch, the
BIOS word at BFC00100h is its date, the scratchpad word is written 7EE71234h first.
a: sw $9,1074h($8) (AD091074h), lw (code at 80016048): cached 3C090678 then 12340678, uncached 03E00678
b: sw $10,1074h($8) (AD0A1074h), lw (code at 80016068): cached 12340678 then 12340678, uncached 03E00678
c: sw $9,4($11) (AD690004h), lw (code at 8001608C): cached 12340678 then 12340678, uncached 03E00678
d: value 0000FFFFh, sw $9,1074h($8), lw (code at 800160B0): cached 000007FF then 000007FF, uncached 03E007FF
e: sw, lw of RAM, nop, lw (code at 800160CC): cached 5AA50678 then 5AA50678, uncached 03E00678
f: sw, lw of BIOS BFC00100h, nop, lw (code at 800160FC): cached 3C090678 then 27BD0678, uncached 03E00678
g: sw, lw of GPUSTAT, nop, lw (code at 80016128): cached 00000678 then 27BD0678, uncached 03E00678
h: sw, lw of scratchpad, nop, lw (code at 80016150): cached 3C090678 then 27BD0678, uncached 03E00678
i: sw, lw of I_STAT, nop, lw (code at 80016178): cached 00000678 then 27BD0678, uncached 03E00678
j: lw of RAM, nop, sw, lw (code at 800161A0): cached 12340678 then 12340678, uncached 03E00678
k: sw, 4 nops, lw (code at 800161D0): cached 00000678 then 27BD0678, uncached 03E00678
l: sw, lw of timer 2's counter, nop, lw (code at 80016200): cached AFB00678 then 27BD0678, uncached 03E00678
GPUSTAT now 5606200F. I_MASK back to 24840009.
Done.
===== 03 STH F2 T1 HBLANK SYNC1 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 800154CE
Timer1 sync mode 1 (reset at vblank), set at the vblank IRQ (I_STAT bit 0, polled);
timer 2 counts system cycles from then. Each sample is timer 2 then timer 1 (t:v).
Hblank clock (mode 0103h), run 1, every sample (141):
47033:21 47082:21 47124:21 47175:22 47226:22 47277:22 47319:22 47370:22
47421:22 47472:22 47523:22 47574:22 47625:22 47676:22 47727:22 47769:22
47820:22 47871:22 47922:22 47973:22 48024:22 48075:22 48126:22 48177:22
48219:22 48270:22 48321:22 48372:22 48423:22 48474:22 48525:22 48576:22
48627:22 48669:22 48720:22 48772:22 48823:22 48874:22 48925:22 48976:22
49028:22 49070:22 49121:22 49172:22 49223:22 49274:22 49325:23 49376:23
49427:23 49469:23 49520:23 49571:23 49622:23 49673:23 49724:23 49775:23
49826:23 49877:23 49919:23 49970:23 50021:23 50072:23 50123:23 50174:23
50225:23 50276:23 50327:23 50369:23 50420:23 50471:23 50522:23 50573:23
50624:23 50675:23 50726:23 50777:23 50820:23 50871:23 50922:23 50973:23
51024:23 51076:23 51127:23 51169:23 51220:23 51271:23 51322:23 51373:23
51424:23 51475:24 51526:24 51577:24 51619:24 51670:24 51721:24 51772:24
51823:24 51874:24 51925:24 51976:24 52027:0 52069:0 52120:0 52171:0
52222:0 52273:0 52324:0 52375:0 52426:0 52477:0 52519:0 52570:0
52621:0 52672:0 52723:0 52774:0 52825:0 52876:0 52927:0 52969:0
53020:0 53071:0 53124:0 53175:0 53226:0 53277:0 53319:0 53370:0
53421:0 53472:0 53523:0 53574:0 53625:0 53676:0 53727:0 53769:0
53820:0 53871:0 53922:0 53973:0 54024:0
Hblank clock (mode 0103h), run 1, 141 samples; where timer 1 changes: 47124:21->47175:22 49274:22->49325:23 51424:23->51475:24 51976:24->52027:0
Hblank clock (mode 0103h), run 2, 141 samples; where timer 1 changes: 47121:21->47172:22 49274:22->49326:23 51425:23->51476:24 51926:24->51977:0
Hblank clock (mode 0103h), run 3, 141 samples; where timer 1 changes: 47124:21->47175:22 49272:22->49323:23 51422:23->51473:24 51974:24->52025:0
Hblank clock (mode 0103h), run 4, 141 samples; where timer 1 changes: 47125:21->47176:22 49274:22->49325:23 51424:23->51475:24 51976:24->52027:0
System clock (mode 0003h), 141 samples; where timer 1 drops: 49419:49419->49470:44; last sample 54026:4600
Done.
===== 04 SG1 F2 GTE 02 TO 07 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 800154CE
GTE, one input at a time, lm 0, no other command bits. Cases: zero = every register 0;
unit = RT, LLM, LCM 1000h on the diagonal, the rest 0; V0 (100,200,400), V1 (110,220,440),
V2 (120,240,480), IR0 800, IR1 130, IR2 260, IR3 4C0, RGBC 40302010, SXY0-2 00200010
00400030 00600050, SZ0-3 100 200 300 400, MAC0 12345: each alone with the unit matrices.
TR (100,200,400), BK (110,220,440), FC (120,240,480), OFX A00000 OFY 780000, H 200, DQA
100, DQB 1400000, ZSF3 155, ZSF4 100: each alone, the rest 0. RTxV, LLMxV, LCMxV: that
matrix (800 100 200 / 300 900 400 / 500 600 A00, plus 10h for LLM, 20h for LCM) with V0,
V1, V2 and IR1-3 as above. Each row: sf 1 changes as reg=hex and F=FLAG; after | the
registers where sf 0 differs from sf 1 (63 is FLAG), or = when none.
op 02:
zero: F=80020000 | =
unit: F=80020000 | =
V0: 9=100 10=200 19=100 25=100 26=200 28=82 F=0 | 9=7fff 10=7fff 25=100000 26=200000 28=3ff 63=81800000
V1: F=80020000 | =
V2: F=80020000 | =
IR0: 8=0 F=80020000 | =
IR1: 9=0 28=0 F=80020000 | =
IR2: 10=0 28=0 F=80020000 | =
IR3: F=80020000 | =
RGBC: F=80020000 | =
SXY: 12=400030 13=600050 14=0 F=80020000 | =
SZ: 16=200 17=300 18=400 19=0 F=80020000 | =
MAC0: 24=0 F=80020000 | =
TR: 9=100 10=200 14=3ff01ff 25=100 26=200 28=82 F=80020000 | 9=7fff 10=7fff 14=3ff03ff 25=100000 26=200000 28=3ff 63=81836000
BK: F=80020000 | =
FC: F=80020000 | =
OF: 14=7800a0 F=80020000 | =
H: F=80020000 | =
DQA: 8=1000 24=1ffff00 F=80021000 | =
DQB: 8=1000 24=1400000 F=80021000 | =
ZSF3: F=80020000 | =
ZSF4: F=80020000 | =
RTxV: 9=120 10=250 19=80 25=120 26=250 F=0 | 9=7fff 10=7fff 25=120000 26=250000 28=27ff 63=81800000
LLMxV: 9=0 10=0 28=2400 F=80020000 | =
LCMxV: 9=0 10=0 28=2400 F=80020000 | =
op 03:
zero: F=80020000 | =
unit: F=80020000 | =
V0: 10=200 14=3ff0000 26=200 28=80 F=80020000 | 10=7fff 26=200000 28=3e0 63=80832000
V1: F=80020000 | =
V2: F=80020000 | =
IR0: 8=0 F=80020000 | =
IR1: 14=25f F=80020000 | =
IR2: 10=0 28=0 F=80020000 | =
IR3: F=80020000 | =
RGBC: F=80020000 | =
SXY: 12=400030 13=600050 14=0 F=80020000 | =
SZ: 16=200 17=300 18=400 19=0 F=80020000 | =
MAC0: 24=0 F=80020000 | =
TR: 10=200 14=3ff0000 26=200 28=80 F=80020000 | 10=7fff 26=200000 28=3e0 63=80832000
BK: F=80020000 | =
FC: F=80020000 | =
OF: 14=7800a0 F=80020000 | =
H: F=80020000 | =
DQA: 8=1000 24=1ffff00 F=80021000 | =
DQB: 8=1000 24=1400000 F=80021000 | =
ZSF3: F=80020000 | =
ZSF4: F=80020000 | =
RTxV: 10=250 14=3ff025f 26=250 F=80022000 | 10=7fff 26=250000 28=27e2 63=80832000
LLMxV: 10=0 14=25f 28=2402 F=80020000 | =
LCMxV: 10=0 14=25f 28=2402 F=80020000 | =
op 04:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: 8=0 F=0 | =
IR1: 14=25f F=0 | =
IR2: 14=3ff0000 F=80002000 | =
IR3: F=0 | =
RGBC: F=0 | =
SXY: 12=400030 13=600050 14=0 F=0 | =
SZ: F=0 | =
MAC0: 24=0 F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: 8=1000 24=1ffff00 F=1000 | =
DQB: 8=1000 24=1400000 F=1000 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 14=3ff025f F=80002000 | =
LLMxV: 14=3ff025f F=80002000 | =
LCMxV: 14=3ff025f F=80002000 | =
op 07:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: F=0 | =
IR2: F=0 | =
IR3: F=0 | =
RGBC: F=0 | =
SXY: 24=fffffc00 F=0 | =
SZ: F=0 | =
MAC0: 24=0 F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: 24=120 F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: F=0 | =
LLMxV: F=0 | =
LCMxV: F=0 | =
Done.
===== 05 SG2 F2 GTE 08 TO 17 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 800154CE
GTE, one input at a time, lm 0, no other command bits. Cases: zero = every register 0;
unit = RT, LLM, LCM 1000h on the diagonal, the rest 0; V0 (100,200,400), V1 (110,220,440),
V2 (120,240,480), IR0 800, IR1 130, IR2 260, IR3 4C0, RGBC 40302010, SXY0-2 00200010
00400030 00600050, SZ0-3 100 200 300 400, MAC0 12345: each alone with the unit matrices.
TR (100,200,400), BK (110,220,440), FC (120,240,480), OFX A00000 OFY 780000, H 200, DQA
100, DQB 1400000, ZSF3 155, ZSF4 100: each alone, the rest 0. RTxV, LLMxV, LCMxV: that
matrix (800 100 200 / 300 900 400 / 500 600 A00, plus 10h for LLM, 20h for LCM) with V0,
V1, V2 and IR1-3 as above. Each row: sf 1 changes as reg=hex and F=FLAG; after | the
registers where sf 0 differs from sf 1 (63 is FLAG), or = when none.
op 08:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: F=0 | =
IR2: F=0 | =
IR3: F=0 | =
RGBC: F=0 | =
SXY: 24=ffffea00 F=0 | =
SZ: F=0 | =
MAC0: 24=0 F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: 24=120 F=0 | 24=0
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: F=0 | =
LLMxV: F=0 | =
LCMxV: F=0 | =
op 09:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: F=0 | =
IR2: F=0 | =
IR3: F=0 | =
RGBC: F=0 | =
SXY: 24=ffffe000 F=0 | =
SZ: F=0 | =
MAC0: 24=0 F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: 24=120 F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: F=0 | =
LLMxV: F=0 | =
LCMxV: F=0 | =
op 0A:
zero: F=0 | =
unit: 20=ffffff 21=ffffff F=81f80000 | =
V0: 20=ffffff 21=ffffff F=81f80000 | =
V1: 20=ffffff 21=ffffff F=81f80000 | =
V2: 20=ffffff 21=ffffff F=81f80000 | =
IR0: 20=ffffff 21=ffffff F=81f80000 | =
IR1: 9=7fff 20=ffffff 21=ffffff 22=ff 25=130000 28=1f F=81f80000 | =
IR2: 10=7fff 20=ffffff 21=ffffff 22=ff00 26=260000 28=3e0 F=81f80000 | =
IR3: 11=7fff 20=ffffff 21=ffffff 22=ff0000 27=4c0000 28=7c00 F=81f80000 | =
RGBC: 20=40ffffff 21=40ffffff 22=40000000 F=81f80000 | =
SXY: 20=ffffff 21=ffffff 24=fffff400 F=81f80000 | =
SZ: 20=ffffff 21=ffffff F=81f80000 | =
MAC0: 20=ffffff 21=ffffff 24=0 F=81f80000 | =
TR: F=0 | =
BK: 9=7fff 10=7fff 11=7fff 20=ffffff 21=ffffff 22=ffffff 25=110000 26=220000 27=440000 28=7fff F=81f80000 | =
FC: 24=120 F=0 | 24=0
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=7fff 10=7fff 11=7fff 20=ffffff 21=ffffff 22=ffffff 25=166a00 26=2cfa00 27=44ba00 28=7fff F=81f80000 | =
op 0D:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=0 10=130 11=fffffed0 26=130 27=fffffed0 28=40 F=0 | 10=7fff 11=ffff8000 26=130000 27=ffed0000 28=3e0 63=80c00000
IR2: 9=fffffda0 10=0 11=260 25=fffffda0 27=260 28=1000 F=0 | 9=ffff8000 11=7fff 25=ffda0000 27=260000 28=7c00 63=81400000
IR3: 10=fffffb40 11=0 26=fffffb40 28=0 F=0 | 10=ffff8000 26=ffb40000 63=80800000
RGBC: F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | 9=120 25=120 28=2
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=fffffe84 10=fffffe5e 11=85 25=fffffe84 26=fffffe5e 27=85 28=400 F=0 | 9=ffff8000 10=ffff8000 11=7fff 25=ffe84000 26=ffe5e000 27=85000 28=7c00 63=81c00000
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=0 10=0 11=0 28=0 F=0 | =
op 0E:
zero: F=0 | =
unit: 20=ffffff 21=ffffff F=81f80000 | =
V0: 20=ffffff 21=ffffff F=81f80000 | =
V1: 20=ffffff 21=ffffff F=81f80000 | =
V2: 20=ffffff 21=ffffff F=81f80000 | =
IR0: 20=ffffff 21=ffffff F=81f80000 | =
IR1: 9=7fff 10=7fff 11=ffff8000 20=ffffff 21=ffffff 22=ffff 25=130000 26=7fff000 27=ffed0000 28=3ff F=81f80000 | 27=f8000000
IR2: 10=0 20=ffffff 21=ffffff 28=0 F=81f80000 | =
IR3: 10=ffff8000 11=0 20=ffffff 21=ffffff 26=f8000000 28=0 F=81f80000 | =
RGBC: 20=40ffffff 21=40ffffff 22=40000000 F=81f80000 | =
SXY: 20=ffffff 21=ffffff F=81f80000 | =
SZ: 20=ffffff 21=ffffff F=81f80000 | =
MAC0: 20=ffffff 21=ffffff F=81f80000 | =
TR: F=0 | =
BK: 9=7fff 10=7fff 11=7fff 20=ffffff 21=ffffff 22=ffffff 25=110000 26=220000 27=440000 28=7fff F=81f80000 | =
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=80800000 | 63=80c00000
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=7fff 10=7fff 11=7fff 20=ffffff 21=ffffff 22=ffffff 25=9a600 26=3b600 27=61600 28=7fff F=81f80000 | =
op 15:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=0 28=0 F=0 | =
IR2: 10=0 28=0 F=0 | =
IR3: 11=0 28=0 F=0 | =
RGBC: 9=7ff 10=fff 11=17ff 22=40ffff7f 25=7ff 26=fff 27=17ff 28=7fef F=80000 | 9=7fff 10=7fff 11=7fff 22=40ffffff 25=7fff00 26=fffe00 27=17ffd00 28=7fff 63=81f80000
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | 63=81c00000
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=0 10=0 11=0 28=0 F=0 | =
op 17:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=0 28=0 F=0 | 63=81000000
IR2: 10=0 28=0 F=0 | 63=80800000
IR3: 11=0 28=0 F=0 | 63=400000
RGBC: 20=40000000 21=40000000 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: F=0 | 63=81c00000
FC: F=0 | 63=81c00000
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=0 10=0 11=0 28=0 F=0 | 63=81c00000
Done.
===== 06 SG3 F2 GTE 18 TO 1F | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 800154CE
GTE, one input at a time, lm 0, no other command bits. Cases: zero = every register 0;
unit = RT, LLM, LCM 1000h on the diagonal, the rest 0; V0 (100,200,400), V1 (110,220,440),
V2 (120,240,480), IR0 800, IR1 130, IR2 260, IR3 4C0, RGBC 40302010, SXY0-2 00200010
00400030 00600050, SZ0-3 100 200 300 400, MAC0 12345: each alone with the unit matrices.
TR (100,200,400), BK (110,220,440), FC (120,240,480), OFX A00000 OFY 780000, H 200, DQA
100, DQB 1400000, ZSF3 155, ZSF4 100: each alone, the rest 0. RTxV, LLMxV, LCMxV: that
matrix (800 100 200 / 300 900 400 / 500 600 A00, plus 10h for LLM, 20h for LCM) with V0,
V1, V2 and IR1-3 as above. Each row: sf 1 changes as reg=hex and F=FLAG; after | the
registers where sf 0 differs from sf 1 (63 is FLAG), or = when none.
op 18:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=0 28=0 F=0 | =
IR2: 10=0 28=0 F=0 | =
IR3: 11=0 28=0 F=0 | =
RGBC: 20=40000000 21=40000000 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | 63=81c00000
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=0 10=0 11=0 28=0 F=0 | =
op 19:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=0 28=0 F=0 | =
IR2: 10=0 28=0 F=0 | =
IR3: 11=0 28=0 F=0 | =
RGBC: 21=40000000 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | 63=81c00000
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=0 10=0 11=0 28=0 F=0 | =
op 1D:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=0 28=0 F=0 | =
IR2: 10=0 28=0 F=0 | =
IR3: 11=0 28=0 F=0 | =
RGBC: 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=0 10=0 11=0 28=0 F=0 | =
op 1F:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=0 28=0 F=0 | =
IR2: 10=0 28=0 F=0 | =
IR3: 11=0 28=0 F=0 | =
RGBC: 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: 9=110 10=220 11=440 22=442211 25=110 26=220 27=440 28=2082 F=0 | 9=7fff 10=7fff 11=7fff 22=ffffff 25=110000 26=220000 27=440000 28=7fff 63=81f80000
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=0 10=0 11=0 28=0 F=0 | =
Done.
===== 07 SG4 F2 GTE 21 TO 23 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 800154CE
GTE, one input at a time, lm 0, no other command bits. Cases: zero = every register 0;
unit = RT, LLM, LCM 1000h on the diagonal, the rest 0; V0 (100,200,400), V1 (110,220,440),
V2 (120,240,480), IR0 800, IR1 130, IR2 260, IR3 4C0, RGBC 40302010, SXY0-2 00200010
00400030 00600050, SZ0-3 100 200 300 400, MAC0 12345: each alone with the unit matrices.
TR (100,200,400), BK (110,220,440), FC (120,240,480), OFX A00000 OFY 780000, H 200, DQA
100, DQB 1400000, ZSF3 155, ZSF4 100: each alone, the rest 0. RTxV, LLMxV, LCMxV: that
matrix (800 100 200 / 300 900 400 / 500 600 A00, plus 10h for LLM, 20h for LCM) with V0,
V1, V2 and IR1-3 as above. Each row: sf 1 changes as reg=hex and F=FLAG; after | the
registers where sf 0 differs from sf 1 (63 is FLAG), or = when none.
op 21:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 22=13 25=130 F=0 | 9=7fff 22=ff 25=130000 28=1f 63=81200000
IR2: 22=2600 26=260 F=0 | 10=7fff 22=ff00 26=260000 28=3e0 63=80900000
IR3: 22=4c0000 27=4c0 F=0 | 11=7fff 22=ff0000 27=4c0000 28=7c00 63=480000
RGBC: 20=40000000 21=40000000 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: 9=110 10=220 11=440 20=442211 21=442211 22=442211 25=110 26=220 27=440 28=2082 F=0 | 9=7fff 10=7fff 11=7fff 20=ffffff 21=ffffff 22=ffffff 25=110000 26=220000 27=440000 28=7fff 63=81f80000
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=166 10=2cf 11=44b 22=442c16 25=166 26=2cf 27=44b 28=20a2 F=0 | 9=7fff 10=7fff 11=7fff 22=ffffff 25=166a00 26=2cfa00 27=44ba00 28=7fff 63=81f80000
op 22:
zero: 20=ff F=0 | 20=0
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 22=13 25=130 F=0 | 9=7fff 20=13 22=ff 25=130000 28=1f 63=81200000
IR2: 20=ff 22=2600 26=260 F=0 | 10=7fff 20=0 22=ff00 26=260000 28=3e0 63=80900000
IR3: 22=4c0000 27=4c0 F=0 | 11=7fff 22=ff0000 27=4c0000 28=7c00 63=480000
RGBC: 20=40000000 21=40000000 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: 9=110 10=220 11=440 20=442200 21=442211 22=442211 25=110 26=220 27=440 28=2082 F=0 | 9=7fff 10=7fff 11=7fff 20=ffff11 21=ffffff 22=ffffff 25=110000 26=220000 27=440000 28=7fff 63=81f80000
FC: 20=ff F=0 | 20=0
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=166 10=2cf 11=44b 22=442c16 25=166 26=2cf 27=44b 28=20a2 F=0 | 9=7fff 10=7fff 11=7fff 20=16 22=ffffff 25=166a00 26=2cfa00 27=44ba00 28=7fff 63=81f80000
op 23:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 22=13 25=130 F=0 | 9=7fff 22=ff 25=130000 28=1f 63=81200000
IR2: 22=2600 26=260 F=0 | 10=7fff 22=ff00 26=260000 28=3e0 63=80900000
IR3: 22=4c0000 27=4c0 F=0 | 11=7fff 22=ff0000 27=4c0000 28=7c00 63=480000
RGBC: 20=40000000 21=40000000 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: 9=110 10=220 11=440 20=440000 21=442211 22=442211 25=110 26=220 27=440 28=2082 F=0 | 9=7fff 10=7fff 11=7fff 20=ff0000 21=ffffff 22=ffffff 25=110000 26=220000 27=440000 28=7fff 63=81f80000
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=166 10=2cf 11=44b 22=442c16 25=166 26=2cf 27=44b 28=20a2 F=0 | 9=7fff 10=7fff 11=7fff 22=ffffff 25=166a00 26=2cfa00 27=44ba00 28=7fff 63=81f80000
Done.
===== 08 SG5 F2 GTE 24 TO 27 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 800154CE
GTE, one input at a time, lm 0, no other command bits. Cases: zero = every register 0;
unit = RT, LLM, LCM 1000h on the diagonal, the rest 0; V0 (100,200,400), V1 (110,220,440),
V2 (120,240,480), IR0 800, IR1 130, IR2 260, IR3 4C0, RGBC 40302010, SXY0-2 00200010
00400030 00600050, SZ0-3 100 200 300 400, MAC0 12345: each alone with the unit matrices.
TR (100,200,400), BK (110,220,440), FC (120,240,480), OFX A00000 OFY 780000, H 200, DQA
100, DQB 1400000, ZSF3 155, ZSF4 100: each alone, the rest 0. RTxV, LLMxV, LCMxV: that
matrix (800 100 200 / 300 900 400 / 500 600 A00, plus 10h for LLM, 20h for LCM) with V0,
V1, V2 and IR1-3 as above. Each row: sf 1 changes as reg=hex and F=FLAG; after | the
registers where sf 0 differs from sf 1 (63 is FLAG), or = when none.
op 24:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 22=13 25=130 F=0 | 9=7fff 22=ff 25=130000 28=1f 63=81200000
IR2: 22=2600 26=260 F=0 | 10=7fff 22=ff00 26=260000 28=3e0 63=80900000
IR3: 22=4c0000 27=4c0 F=0 | 11=7fff 22=ff0000 27=4c0000 28=7c00 63=480000
RGBC: 21=40000000 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: 9=110 10=220 11=440 21=442211 22=442211 25=110 26=220 27=440 28=2082 F=0 | 9=7fff 10=7fff 11=7fff 21=ffffff 22=ffffff 25=110000 26=220000 27=440000 28=7fff 63=81f80000
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=166 10=2cf 11=44b 22=442c16 25=166 26=2cf 27=44b 28=20a2 F=0 | 9=7fff 10=7fff 11=7fff 22=ffffff 25=166a00 26=2cfa00 27=44ba00 28=7fff 63=81f80000
op 25:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 22=13 25=130 F=0 | 9=7fff 22=ff 25=130000 28=1f 63=81200000
IR2: 22=2600 26=260 F=0 | 10=7fff 22=ff00 26=260000 28=3e0 63=80900000
IR3: 22=4c0000 27=4c0 F=0 | 11=7fff 22=ff0000 27=4c0000 28=7c00 63=480000
RGBC: 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: 9=110 10=220 11=440 22=442211 25=110 26=220 27=440 28=2082 F=0 | 9=7fff 10=7fff 11=7fff 22=ffffff 25=110000 26=220000 27=440000 28=7fff 63=81f80000
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=166 10=2cf 11=44b 22=442c16 25=166 26=2cf 27=44b 28=20a2 F=0 | 9=7fff 10=7fff 11=7fff 22=ffffff 25=166a00 26=2cfa00 27=44ba00 28=7fff 63=81f80000
op 26:
zero: 22=ff F=0 | =
unit: 22=ff F=0 | =
V0: 22=ff F=0 | =
V1: 22=ff F=0 | =
V2: 22=ff F=0 | =
IR0: 22=ff F=0 | =
IR1: 22=ff F=0 | =
IR2: 22=26ff 26=260 F=0 | 10=7fff 22=ffff 26=260000 28=3e0 63=80900000
IR3: 22=4c00ff 27=4c0 F=0 | 11=7fff 22=ff00ff 27=4c0000 28=7c00 63=480000
RGBC: 22=400000ff F=0 | =
SXY: 22=ff F=0 | =
SZ: 22=ff F=0 | =
MAC0: 22=ff F=0 | =
TR: 22=ff F=0 | =
BK: 10=220 11=440 22=4422ff 26=220 27=440 28=2080 F=0 | 10=7fff 11=7fff 22=ffffff 26=220000 27=440000 28=7fe0 63=80d80000
FC: 22=ff F=0 | =
OF: 22=ff F=0 | =
H: 22=ff F=0 | =
DQA: 22=ff F=0 | =
DQB: 22=ff F=0 | =
ZSF3: 22=ff F=0 | =
ZSF4: 22=ff F=0 | =
RTxV: 10=0 11=0 22=ff 28=2 F=0 | =
LLMxV: 10=0 11=0 22=ff 28=2 F=0 | =
LCMxV: 10=2cf 11=44b 22=442cff 26=2cf 27=44b 28=20a2 F=0 | 10=7fff 11=7fff 22=ffffff 26=2cfa00 27=44ba00 28=7fe2 63=80d80000
op 27:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: F=0 | =
IR2: F=0 | =
IR3: 22=4c0000 27=4c0 F=0 | 11=7fff 22=ff0000 27=4c0000 28=7c00 63=480000
RGBC: 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: 11=440 22=440000 27=440 28=2000 F=0 | 11=7fff 22=ff0000 27=440000 28=7c00 63=480000
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 11=0 28=82 F=0 | =
LLMxV: 11=0 28=82 F=0 | =
LCMxV: 11=44b 22=440000 27=44b 28=2082 F=0 | 11=7fff 22=ff0000 27=44ba00 28=7c82 63=480000
Done.
===== 09 SG6 F2 GTE 2B TO 34 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 800154CE
GTE, one input at a time, lm 0, no other command bits. Cases: zero = every register 0;
unit = RT, LLM, LCM 1000h on the diagonal, the rest 0; V0 (100,200,400), V1 (110,220,440),
V2 (120,240,480), IR0 800, IR1 130, IR2 260, IR3 4C0, RGBC 40302010, SXY0-2 00200010
00400030 00600050, SZ0-3 100 200 300 400, MAC0 12345: each alone with the unit matrices.
TR (100,200,400), BK (110,220,440), FC (120,240,480), OFX A00000 OFY 780000, H 200, DQA
100, DQB 1400000, ZSF3 155, ZSF4 100: each alone, the rest 0. RTxV, LLMxV, LCMxV: that
matrix (800 100 200 / 300 900 400 / 500 600 A00, plus 10h for LLM, 20h for LCM) with V0,
V1, V2 and IR1-3 as above. Each row: sf 1 changes as reg=hex and F=FLAG; after | the
registers where sf 0 differs from sf 1 (63 is FLAG), or = when none.
op 2B:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=0 28=0 F=0 | =
IR2: 10=0 28=0 F=0 | =
IR3: 11=0 28=0 F=0 | =
RGBC: 21=40000000 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | 63=81c00000
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=0 10=0 11=0 28=0 F=0 | =
op 2C:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: F=0 | =
IR1: 9=0 28=0 F=0 | =
IR2: 10=0 28=0 F=0 | =
IR3: 11=0 28=0 F=0 | =
RGBC: 22=40000000 F=0 | =
SXY: F=0 | =
SZ: F=0 | =
MAC0: F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | 63=81c00000
OF: F=0 | =
H: F=0 | =
DQA: F=0 | =
DQB: F=0 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 9=0 10=0 11=0 28=0 F=0 | =
LLMxV: 9=0 10=0 11=0 28=0 F=0 | =
LCMxV: 9=0 10=0 11=0 28=0 F=0 | =
op 2F:
zero: F=80020000 | =
unit: F=80020000 | =
V0: 9=7fff 10=7fff 11=7fff 19=400 25=100000 26=200000 27=400000 28=7fff F=81800000 | =
V1: F=80020000 | =
V2: F=80020000 | =
IR0: 8=0 F=80020000 | =
IR1: 9=0 28=0 F=80020000 | =
IR2: 10=0 28=0 F=80020000 | =
IR3: 11=0 28=0 F=80020000 | =
RGBC: F=80020000 | =
SXY: 12=400030 13=600050 14=0 F=80020000 | =
SZ: 16=200 17=300 18=400 19=0 F=80020000 | =
MAC0: 24=0 F=80020000 | =
TR: 9=7fff 10=7fff 11=7fff 19=400 25=100000 26=200000 27=400000 28=7fff F=81800000 | =
BK: F=80020000 | =
FC: F=80020000 | =
OF: 14=7800a0 F=80020000 | =
H: F=80020000 | =
DQA: 8=1000 24=1ffff00 F=80021000 | =
DQB: 8=1000 24=1400000 F=80021000 | =
ZSF3: F=80020000 | =
ZSF4: F=80020000 | =
RTxV: 9=7fff 10=7fff 11=7fff 19=390 25=120000 26=250000 27=390000 28=7fff F=81800000 | =
LLMxV: 9=0 10=0 11=0 28=0 F=80020000 | =
LCMxV: 9=0 10=0 11=0 28=0 F=80020000 | =
op 34:
zero: F=80020000 | =
unit: F=80020000 | =
V0: F=80020000 | =
V1: 13=3ff021f F=80022000 | 13=3ff03ff 63=81836000
V2: 9=120 10=240 11=480 19=480 25=120 26=240 27=480 28=2482 F=80020000 | 9=7fff 10=7fff 11=7fff 25=120000 26=240000 27=480000 28=7fff 63=81820000
IR0: 8=0 F=80020000 | =
IR1: 9=0 28=0 F=80020000 | =
IR2: 10=0 28=0 F=80020000 | =
IR3: 11=0 28=0 F=80020000 | =
RGBC: F=80020000 | =
SXY: 12=0 13=0 14=0 F=80020000 | =
SZ: 16=300 17=400 18=0 19=0 F=80020000 | =
MAC0: 24=0 F=80020000 | =
TR: 9=100 10=200 11=400 13=3ff01ff 19=400 25=100 26=200 27=400 28=2082 F=80020000 | 9=7fff 10=7fff 11=7fff 13=3ff03ff 25=100000 26=200000 27=400000 28=7fff 63=81836000
BK: F=80020000 | =
FC: F=80020000 | =
OF: 12=7800a0 13=7800a0 14=7800a0 F=80020000 | =
H: F=80020000 | =
DQA: 8=1000 24=1ffff00 F=80021000 | =
DQB: 8=1000 24=1400000 F=80021000 | =
ZSF3: F=80020000 | =
ZSF4: F=80020000 | =
RTxV: 9=144 10=29a 11=402 13=3ff0263 19=402 25=144 26=29a 27=402 28=20a2 F=80022000 | 9=7fff 10=7fff 11=7fff 13=3ff03ff 25=144000 26=29a000 27=402000 28=7fff 63=81836000
LLMxV: 9=0 10=0 11=0 28=0 F=80020000 | =
LCMxV: 9=0 10=0 11=0 28=0 F=80020000 | =
Done.
===== 10 SG7 F2 GTE 35 TO 37 | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 800154CE
GTE, one input at a time, lm 0, no other command bits. Cases: zero = every register 0;
unit = RT, LLM, LCM 1000h on the diagonal, the rest 0; V0 (100,200,400), V1 (110,220,440),
V2 (120,240,480), IR0 800, IR1 130, IR2 260, IR3 4C0, RGBC 40302010, SXY0-2 00200010
00400030 00600050, SZ0-3 100 200 300 400, MAC0 12345: each alone with the unit matrices.
TR (100,200,400), BK (110,220,440), FC (120,240,480), OFX A00000 OFY 780000, H 200, DQA
100, DQB 1400000, ZSF3 155, ZSF4 100: each alone, the rest 0. RTxV, LLMxV, LCMxV: that
matrix (800 100 200 / 300 900 400 / 500 600 A00, plus 10h for LLM, 20h for LCM) with V0,
V1, V2 and IR1-3 as above. Each row: sf 1 changes as reg=hex and F=FLAG; after | the
registers where sf 0 differs from sf 1 (63 is FLAG), or = when none.
op 35:
zero: F=80020000 | =
unit: F=80020000 | =
V0: F=80020000 | =
V1: 13=3ff021f 19=220 F=80022000 | 13=3ff03ff 63=81836000
V2: 9=120 10=240 14=3ff023f 25=120 26=240 28=82 F=80022000 | 9=7fff 10=7fff 14=3ff03ff 25=120000 26=240000 28=3ff 63=81836000
IR0: 8=0 F=80020000 | =
IR1: 9=0 28=0 F=80020000 | =
IR2: 10=0 28=0 F=80020000 | =
IR3: F=80020000 | =
RGBC: F=80020000 | =
SXY: 12=0 13=0 14=0 F=80020000 | =
SZ: 16=300 17=400 18=0 19=0 F=80020000 | =
MAC0: 24=0 F=80020000 | =
TR: 9=100 10=200 13=3ff01ff 14=3ff01ff 25=100 26=200 28=82 F=80020000 | 9=7fff 10=7fff 13=3ff03ff 14=3ff03ff 25=100000 26=200000 28=3ff 63=81836000
BK: F=80020000 | =
FC: F=80020000 | =
OF: 12=7800a0 13=7800a0 14=7800a0 F=80020000 | =
H: F=80020000 | =
DQA: 8=1000 24=1ffff00 F=80021000 | =
DQB: 8=1000 24=1400000 F=80021000 | =
ZSF3: F=80020000 | =
ZSF4: F=80020000 | =
RTxV: 9=144 10=29a 13=3ff0263 19=110 25=144 26=29a 28=24a2 F=80022000 | 9=7fff 10=7fff 13=3ff03ff 25=144000 26=29a000 28=27ff 63=81836000
LLMxV: 9=0 10=0 28=2400 F=80020000 | =
LCMxV: 9=0 10=0 28=2400 F=80020000 | =
op 36:
zero: F=80020000 | =
unit: F=80020000 | =
V0: F=80020000 | =
V1: 13=3ff0000 F=80022000 | 63=80832000
V2: 9=120 10=240 14=3ff023f 25=120 26=240 28=82 F=80022000 | 9=7fff 10=7fff 14=3ff03ff 25=120000 26=240000 28=3ff 63=81836000
IR0: 8=0 F=80020000 | =
IR1: 9=0 28=0 F=80020000 | =
IR2: 10=0 28=0 F=80020000 | =
IR3: F=80020000 | =
RGBC: F=80020000 | =
SXY: 12=0 13=0 14=0 F=80020000 | =
SZ: 16=200 17=300 18=400 19=0 F=80020000 | =
MAC0: 24=0 F=80020000 | =
TR: 9=100 10=200 13=3ff0000 14=3ff01ff 25=100 26=200 28=82 F=80020000 | 9=7fff 10=7fff 14=3ff03ff 25=100000 26=200000 28=3ff 63=81836000
BK: F=80020000 | =
FC: F=80020000 | =
OF: 12=7800a0 13=7800a0 14=7800a0 F=80020000 | =
H: F=80020000 | =
DQA: 8=1000 24=1ffff00 F=80021000 | =
DQB: 8=1000 24=1400000 F=80021000 | =
ZSF3: F=80020000 | =
ZSF4: F=80020000 | =
RTxV: 9=144 10=29a 13=3ff0000 14=3ff0287 25=144 26=29a 28=24a2 F=80022000 | 9=7fff 10=7fff 14=3ff03ff 25=144000 26=29a000 28=27ff 63=81836000
LLMxV: 9=0 10=0 28=2400 F=80020000 | =
LCMxV: 9=0 10=0 28=2400 F=80020000 | =
op 37:
zero: F=80020000 | =
unit: F=80020000 | =
V0: F=80020000 | =
V1: 13=3ff0000 F=80022000 | 63=80832000
V2: 10=240 14=3ff0000 26=240 28=80 F=80022000 | 10=7fff 26=240000 28=3e0 63=80832000
IR0: 8=0 F=80020000 | =
IR1: 14=25f F=80020000 | =
IR2: 10=0 28=0 F=80020000 | =
IR3: F=80020000 | =
RGBC: F=80020000 | =
SXY: 12=0 13=0 14=0 F=80020000 | =
SZ: 16=200 17=300 18=400 19=0 F=80020000 | =
MAC0: 24=0 F=80020000 | =
TR: 10=200 13=3ff0000 14=3ff0000 26=200 28=80 F=80020000 | 10=7fff 26=200000 28=3e0 63=80832000
BK: F=80020000 | =
FC: F=80020000 | =
OF: 12=7800a0 13=7800a0 14=7800a0 F=80020000 | =
H: F=80020000 | =
DQA: 8=1000 24=1ffff00 F=80021000 | =
DQB: 8=1000 24=1400000 F=80021000 | =
ZSF3: F=80020000 | =
ZSF4: F=80020000 | =
RTxV: 10=29a 13=3ff0000 14=3ff025f 26=29a 28=24a2 F=80022000 | 10=7fff 26=29a000 28=27e2 63=80832000
LLMxV: 10=0 14=25f 28=2402 F=80020000 | =
LCMxV: 10=0 14=25f 28=2402 F=80020000 | =
Done.
===== 11 SG8 F2 GTE 38 TO 3B | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 800154CE
GTE, one input at a time, lm 0, no other command bits. Cases: zero = every register 0;
unit = RT, LLM, LCM 1000h on the diagonal, the rest 0; V0 (100,200,400), V1 (110,220,440),
V2 (120,240,480), IR0 800, IR1 130, IR2 260, IR3 4C0, RGBC 40302010, SXY0-2 00200010
00400030 00600050, SZ0-3 100 200 300 400, MAC0 12345: each alone with the unit matrices.
TR (100,200,400), BK (110,220,440), FC (120,240,480), OFX A00000 OFY 780000, H 200, DQA
100, DQB 1400000, ZSF3 155, ZSF4 100: each alone, the rest 0. RTxV, LLMxV, LCMxV: that
matrix (800 100 200 / 300 900 400 / 500 600 A00, plus 10h for LLM, 20h for LCM) with V0,
V1, V2 and IR1-3 as above. Each row: sf 1 changes as reg=hex and F=FLAG; after | the
registers where sf 0 differs from sf 1 (63 is FLAG), or = when none.
op 38:
zero: F=80020000 | =
unit: F=80020000 | =
V0: F=80020000 | =
V1: F=80020000 | =
V2: 10=240 14=3ff0000 26=240 28=80 F=80022000 | 10=7fff 26=240000 28=3e0 63=80832000
IR0: 8=0 F=80020000 | =
IR1: 14=25f F=80020000 | =
IR2: 10=0 28=0 F=80020000 | =
IR3: F=80020000 | =
RGBC: F=80020000 | =
SXY: 12=0 13=0 14=0 F=80020000 | =
SZ: 16=200 17=300 18=400 19=0 F=80020000 | =
MAC0: 24=0 F=80020000 | =
TR: 10=200 14=3ff0000 26=200 28=80 F=80020000 | 10=7fff 26=200000 28=3e0 63=80832000
BK: F=80020000 | =
FC: F=80020000 | =
OF: 12=7800a0 13=7800a0 14=7800a0 F=80020000 | =
H: F=80020000 | =
DQA: 8=1000 24=1ffff00 F=80021000 | =
DQB: 8=1000 24=1400000 F=80021000 | =
ZSF3: F=80020000 | =
ZSF4: F=80020000 | =
RTxV: 10=29a 14=3ff025f 26=29a 28=24a2 F=80022000 | 10=7fff 26=29a000 28=27e2 63=80832000
LLMxV: 10=0 14=25f 28=2402 F=80020000 | =
LCMxV: 10=0 14=25f 28=2402 F=80020000 | =
op 39:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: 8=0 F=0 | =
IR1: 14=25f F=0 | =
IR2: 14=3ff0000 F=80002000 | =
IR3: F=0 | =
RGBC: F=0 | =
SXY: 12=0 13=0 14=0 F=0 | =
SZ: 16=200 17=300 18=400 19=0 F=0 | =
MAC0: 24=0 F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: 8=1000 24=1ffff00 F=1000 | =
DQB: 8=1000 24=1400000 F=1000 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 14=3ff025f F=80002000 | =
LLMxV: 14=3ff025f F=80002000 | =
LCMxV: 14=3ff025f F=80002000 | =
op 3A:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: 8=0 F=0 | =
IR1: 14=25f F=0 | =
IR2: 14=3ff0000 F=80002000 | =
IR3: F=0 | =
RGBC: F=0 | =
SXY: 12=600050 13=0 14=0 F=0 | =
SZ: 16=200 17=300 18=400 19=0 F=0 | =
MAC0: 24=0 F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: 8=1000 24=1ffff00 F=1000 | =
DQB: 8=1000 24=1400000 F=1000 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 14=3ff025f F=80002000 | =
LLMxV: 14=3ff025f F=80002000 | =
LCMxV: 14=3ff025f F=80002000 | =
op 3B:
zero: F=0 | =
unit: F=0 | =
V0: F=0 | =
V1: F=0 | =
V2: F=0 | =
IR0: 8=0 F=0 | =
IR1: 14=25f F=0 | =
IR2: 14=3ff0000 F=80002000 | =
IR3: F=0 | =
RGBC: F=0 | =
SXY: 12=400030 13=600050 14=0 F=0 | =
SZ: F=0 | =
MAC0: 24=0 F=0 | =
TR: F=0 | =
BK: F=0 | =
FC: F=0 | =
OF: F=0 | =
H: F=0 | =
DQA: 8=1000 24=1ffff00 F=1000 | =
DQB: 8=1000 24=1400000 F=1000 | =
ZSF3: F=0 | =
ZSF4: F=0 | =
RTxV: 14=3ff025f F=80002000 | =
LLMxV: 14=3ff025f F=80002000 | =
LCMxV: 14=3ff025f F=80002000 | =
Done.
===== 12 SMS F2 MDEC SHORT | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 800154CE
Short decodes by CPU at 8 bit (depth 1), unsigned, the 4bit/8bit block's tables
(kBlkQuant, kBlkScale). Pattern words: FE00h end code over a DC halfword, q_scale 1;
A has DC 16*i-256 in word i (i = 0 to 31), B has DC 240-16*i. At most 256 words shown.
No pattern (the tables were the last words in), then count 1, 1 words written: 80 words out, CRC A589EA50, status 8204FFFF
A8B7C2C8 787E8998 9AA8B4BA 6A707B8A 85949FA5 555B6675 77859197 474D5867
77859197 474D5867 85949FA5 555B6675 9AA8B4BA 6A707B8A A8B7C2C8 787E8998
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
Pattern A first (count 32: 512 words out, CRC CF32359C), then count 1, 1 words written: 496 words out, CRC 3410B6D8, status 8204FFFF
32414C52 02081422 69788389 393F4A59 B6C5D0D6 868C97A6 ECFBFFFF BCC2CEDC
ECFBFFFF BCC2CEDC B6C5D0D6 868C97A6 69788389 393F4A59 32414C52 02081422
48484848 48484848 48484848 48484848 48484848 48484848 48484848 48484848
48484848 48484848 48484848 48484848 48484848 48484848 48484848 48484848
4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C
4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C
50505050 50505050 50505050 50505050 50505050 50505050 50505050 50505050
50505050 50505050 50505050 50505050 50505050 50505050 50505050 50505050
54545454 54545454 54545454 54545454 54545454 54545454 54545454 54545454
54545454 54545454 54545454 54545454 54545454 54545454 54545454 54545454
58585858 58585858 58585858 58585858 58585858 58585858 58585858 58585858
58585858 58585858 58585858 58585858 58585858 58585858 58585858 58585858
5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C
5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C
60606060 60606060 60606060 60606060 60606060 60606060 60606060 60606060
60606060 60606060 60606060 60606060 60606060 60606060 60606060 60606060
64646464 64646464 64646464 64646464 64646464 64646464 64646464 64646464
64646464 64646464 64646464 64646464 64646464 64646464 64646464 64646464
68686868 68686868 68686868 68686868 68686868 68686868 68686868 68686868
68686868 68686868 68686868 68686868 68686868 68686868 68686868 68686868
6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C
6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C
70707070 70707070 70707070 70707070 70707070 70707070 70707070 70707070
70707070 70707070 70707070 70707070 70707070 70707070 70707070 70707070
74747474 74747474 74747474 74747474 74747474 74747474 74747474 74747474
74747474 74747474 74747474 74747474 74747474 74747474 74747474 74747474
78787878 78787878 78787878 78787878 78787878 78787878 78787878 78787878
78787878 78787878 78787878 78787878 78787878 78787878 78787878 78787878
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
Pattern B first (count 32: 512 words out, CRC BF7813E8), then count 1, 1 words written: 496 words out, CRC A468B6F1, status 8204FFFF
E6F5FFFF B6BCC7D6 B3C2CDD3 838995A3 6B7A858C 3B414D5B 39475359 080F1A29
39475359 080F1A29 6B7A858C 3B414D5B B3C2CDD3 838995A3 E6F5FFFF B6BCC7D6
B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4
B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4 B4B4B4B4
B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0
B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0
ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC
ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC
A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8
A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8
A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4
A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C
9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C
98989898 98989898 98989898 98989898 98989898 98989898 98989898 98989898
98989898 98989898 98989898 98989898 98989898 98989898 98989898 98989898
94949494 94949494 94949494 94949494 94949494 94949494 94949494 94949494
94949494 94949494 94949494 94949494 94949494 94949494 94949494 94949494
90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090
90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090
8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C
8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C
88888888 88888888 88888888 88888888 88888888 88888888 88888888 88888888
88888888 88888888 88888888 88888888 88888888 88888888 88888888 88888888
84848484 84848484 84848484 84848484 84848484 84848484 84848484 84848484
84848484 84848484 84848484 84848484 84848484 84848484 84848484 84848484
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
No pattern (the tables were the last words in), then count 2, 2 words written: 480 words out, CRC CA80C555, status 8204FFFF
5694E2FF C79E6746 65A3F1FF D6AD7555 75B3FFFF E6BD8665 76B4FFFF E7BE8766
5C9AE8FF CDA46C4C 2B69B7EC 9C733C1B 003482B7 673E0600 00115F94 441B0000
B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0
B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0
ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC
ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC
A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8
A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8
A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4
A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C
9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C
98989898 98989898 98989898 98989898 98989898 98989898 98989898 98989898
98989898 98989898 98989898 98989898 98989898 98989898 98989898 98989898
94949494 94949494 94949494 94949494 94949494 94949494 94949494 94949494
94949494 94949494 94949494 94949494 94949494 94949494 94949494 94949494
90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090
90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090
8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C
8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C
88888888 88888888 88888888 88888888 88888888 88888888 88888888 88888888
88888888 88888888 88888888 88888888 88888888 88888888 88888888 88888888
84848484 84848484 84848484 84848484 84848484 84848484 84848484 84848484
84848484 84848484 84848484 84848484 84848484 84848484 84848484 84848484
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
78787878 78787878 78787878 78787878 78787878 78787878 78787878 78787878
78787878 78787878 78787878 78787878 78787878 78787878 78787878 78787878
Pattern A first (count 32: 512 words out, CRC CF32359C), then count 2, 2 words written: 480 words out, CRC 5D6A404E, status 8204FFFF
FDD99D70 2059ACEE FFE8AB7F 2E67BBFC FFF9BC8F 3F78CBFF FFF9BD90 4079CCFF
FFDFA376 265FB2F3 D3AF7245 002E81C3 9D793C10 00004C8D 7B561A00 0000296B
4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C
4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C 4C4C4C4C
50505050 50505050 50505050 50505050 50505050 50505050 50505050 50505050
50505050 50505050 50505050 50505050 50505050 50505050 50505050 50505050
54545454 54545454 54545454 54545454 54545454 54545454 54545454 54545454
54545454 54545454 54545454 54545454 54545454 54545454 54545454 54545454
58585858 58585858 58585858 58585858 58585858 58585858 58585858 58585858
58585858 58585858 58585858 58585858 58585858 58585858 58585858 58585858
5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C
5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C 5C5C5C5C
60606060 60606060 60606060 60606060 60606060 60606060 60606060 60606060
60606060 60606060 60606060 60606060 60606060 60606060 60606060 60606060
64646464 64646464 64646464 64646464 64646464 64646464 64646464 64646464
64646464 64646464 64646464 64646464 64646464 64646464 64646464 64646464
68686868 68686868 68686868 68686868 68686868 68686868 68686868 68686868
68686868 68686868 68686868 68686868 68686868 68686868 68686868 68686868
6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C
6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C 6C6C6C6C
70707070 70707070 70707070 70707070 70707070 70707070 70707070 70707070
70707070 70707070 70707070 70707070 70707070 70707070 70707070 70707070
74747474 74747474 74747474 74747474 74747474 74747474 74747474 74747474
74747474 74747474 74747474 74747474 74747474 74747474 74747474 74747474
78787878 78787878 78787878 78787878 78787878 78787878 78787878 78787878
78787878 78787878 78787878 78787878 78787878 78787878 78787878 78787878
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
84848484 84848484 84848484 84848484 84848484 84848484 84848484 84848484
84848484 84848484 84848484 84848484 84848484 84848484 84848484 84848484
Pattern B first (count 32: 512 words out, CRC BF7813E8), then count 2, 2 words written: 480 words out, CRC CA80C555, status 8204FFFF
5694E2FF C79E6746 65A3F1FF D6AD7555 75B3FFFF E6BD8665 76B4FFFF E7BE8766
5C9AE8FF CDA46C4C 2B69B7EC 9C733C1B 003482B7 673E0600 00115F94 441B0000
B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0
B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0 B0B0B0B0
ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC
ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC ACACACAC
A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8
A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8 A8A8A8A8
A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4
A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4 A4A4A4A4
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0 A0A0A0A0
9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C
9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C 9C9C9C9C
98989898 98989898 98989898 98989898 98989898 98989898 98989898 98989898
98989898 98989898 98989898 98989898 98989898 98989898 98989898 98989898
94949494 94949494 94949494 94949494 94949494 94949494 94949494 94949494
94949494 94949494 94949494 94949494 94949494 94949494 94949494 94949494
90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090
90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090
8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C
8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C 8C8C8C8C
88888888 88888888 88888888 88888888 88888888 88888888 88888888 88888888
88888888 88888888 88888888 88888888 88888888 88888888 88888888 88888888
84848484 84848484 84848484 84848484 84848484 84848484 84848484 84848484
84848484 84848484 84848484 84848484 84848484 84848484 84848484 84848484
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
80808080 80808080 80808080 80808080 80808080 80808080 80808080 80808080
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C 7C7C7C7C
78787878 78787878 78787878 78787878 78787878 78787878 78787878 78787878
78787878 78787878 78787878 78787878 78787878 78787878 78787878 78787878
Done.
===== 13 SSD F2 SPU DRAIN | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 800154CE
SPU write FIFO drain to scratch at 30000h (32 halfwords filled EEEEh first), SPUCNT
transfer mode Stop after the wait, then all 32 read back by DMA. Pattern B000h + i.
By DMA, 16 words in one block; the wait counted from the DMA's end:
DMA, wait 0: 9 written, 0 EEEEh, 0 5555h, 23 other (first 1111) wwwwwwwww???????????????????????
DMA, wait 50: 11 written, 0 EEEEh, 0 5555h, 21 other (first 1111) wwwwwwwwwww?????????????????????
DMA, wait 100: 11 written, 0 EEEEh, 0 5555h, 21 other (first 1111) wwwwwwwwwww?????????????????????
DMA, wait 150: 11 written, 0 EEEEh, 0 5555h, 21 other (first 1111) wwwwwwwwwww?????????????????????
DMA, wait 200: 11 written, 0 EEEEh, 0 5555h, 21 other (first 1111) wwwwwwwwwww?????????????????????
DMA, wait 250: 12 written, 0 EEEEh, 0 5555h, 20 other (first 0006) wwwwwwwwwwww????????????????????
DMA, wait 300: 14 written, 0 EEEEh, 0 5555h, 18 other (first 0007) wwwwwwwwwwwwww??????????????????
DMA, wait 350: 16 written, 0 EEEEh, 0 5555h, 16 other (first 0008) wwwwwwwwwwwwwwww????????????????
DMA, wait 400: 18 written, 0 EEEEh, 0 5555h, 14 other (first 0009) wwwwwwwwwwwwwwwwww??????????????
DMA, wait 450: 21 written, 0 EEEEh, 0 5555h, 11 other (first 1111) wwwwwwwwwwwwwwwwwwwww???????????
DMA, wait 500: 23 written, 0 EEEEh, 0 5555h, 9 other (first 1111) wwwwwwwwwwwwwwwwwwwwwww?????????
DMA, wait 550: 24 written, 0 EEEEh, 0 5555h, 8 other (first 000C) wwwwwwwwwwwwwwwwwwwwwwww????????
DMA, wait 600: 27 written, 0 EEEEh, 0 5555h, 5 other (first 1111) wwwwwwwwwwwwwwwwwwwwwwwwwww?????
DMA, wait 650: 28 written, 0 EEEEh, 0 5555h, 4 other (first 000E) wwwwwwwwwwwwwwwwwwwwwwwwwwww????
DMA, wait 700: 31 written, 0 EEEEh, 0 5555h, 1 other (first 1111) wwwwwwwwwwwwwwwwwwwwwwwwwwwwwww?
DMA, wait 750: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
DMA, wait 800: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
DMA, wait 850: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
DMA, wait 900: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
By hand, 16 halfwords (B000h-B00Fh) to the FIFO, then Manual Write; the wait counted
from the SPUCNT store:
manual, wait 0: 0 written, 0 EEEEh, 0 5555h, 32 other (first B002) ????????????????????????????????
manual, wait 50: 0 written, 0 EEEEh, 0 5555h, 32 other (first B002) ????????????????????????????????
manual, wait 100: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 150: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 200: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 250: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 300: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 350: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 400: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 450: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 500: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 550: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 600: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 650: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 700: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 750: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 800: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 850: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
manual, wait 900: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
SPUSTAT after the Manual Write store, status@timer 2:
0000@53 0000@86 0000@119 0000@154 0000@187 0000@220 0410@253 0410@286
0410@319 0410@352 0410@386 0410@419 0410@452 0410@485 0410@518 0410@551
0410@584 0410@617 0410@650 0410@683 0410@716 0410@749 0410@782 0410@815
manual, wait 3000: 32 written, 0 EEEEh, 0 5555h, 0 other wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww
Done.
===== 14 SMR F2 MDEC RESET | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 800154CE
MDEC reset. Each row starts from a 15 bit decode with the input full (status read just
before, shown once), writes timer 2's mode, MDEC1 80000000h, then N nops, then reads
MDEC1 and timer 2. Run twice from the same state: cold, then warm. status@timer 2.
Status before the reset: E60400DF
0 nops: cold E6040000@13, warm E6040040@6
10 nops: cold 80040000@29, warm 80040000@14
20 nops: cold 80040000@55, warm 80040000@24
30 nops: cold 80040000@78, warm 80040000@34
40 nops: cold 80040000@106, warm 80040000@44
50 nops: cold 80040000@123, warm 80040000@54
60 nops: cold 80040000@149, warm 80040000@64
70 nops: cold 80040000@169, warm 80040000@74
80 nops: cold 80040000@192, warm 80040000@84
90 nops: cold 80040000@214, warm 80040000@159
100 nops: cold 80040000@236, warm 80040000@104
110 nops: cold 80040000@258, warm 80040000@178
120 nops: cold 80040000@284, warm 80040000@134
130 nops: cold 80040000@303, warm 80040000@134
140 nops: cold 80040000@331, warm 80040000@144
150 nops: cold 80040000@352, warm 80040000@154
160 nops: cold 80040000@374, warm 80040000@201
170 nops: cold 80040000@393, warm 80040000@209
180 nops: cold 80040000@419, warm 80040000@228
190 nops: cold 80040000@438, warm 80040000@194
200 nops: cold 80040000@468, warm 80040000@204
Enables after a reset. From idle (a reset 2000 cycles before): MDEC1 80000000h, N nops,
MDEC1 60000000h, then MDEC1 and timer 2 read at once (status@timer 2); the status again
2000 cycles on; MDEC0 40000000h (luminance quant table) and the status; its 16 words by
DMA0 (cycles, or timeout after 200000 polls) and the status after. Run cold, then warm.
Enables rows, each with a DMA0 that times out if the enables were lost: not run in this table.
Done.
===== 15 SDS F2 DMA SPU COST | BIOS 19951204 System ROM Version 3.0 11/18/96 A
BadVaddr as the group starts: 800154CE
DMA4 SPU write, SyncMode 1, to 30000h, delay register 1F801014h = 200931E1h (it was
200931E1). Cycles from the CHCR write until bit 24 clears, three times each.
Blocks of 1 words x 256 (256 words): 16345 16335 16334
Blocks of 2 words x 128 (256 words): 16297 16297 16297
Blocks of 3 words x 85 (255 words): 17188 17181 17181
Blocks of 4 words x 64 (256 words): 18079 18063 18063
Blocks of 5 words x 51 (255 words): 17611 17573 17595
Blocks of 6 words x 42 (252 words): 17004 17010 17010
Blocks of 8 words x 32 (256 words): 17042 17066 17066
Blocks of 12 words x 21 (252 words): 15825 15799 15837
Blocks of 16 words x 16 (256 words): 16864 16861 16862
Blocks of 24 words x 10 (240 words): 10374 10374 10374
Blocks of 31 words x 8 (248 words): 8137 8143 8143
Blocks of 32 words x 8 (256 words): 8138 8138 8138
SyncMode 0, which the CPU cannot poll during: not run in this table.
Done.
References
Categories: Hardware tests